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1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | interrupt-parent = <&icoll>; | |
16 | ||
17 | cpus { | |
18 | cpu@0 { | |
19 | compatible = "arm,arm926ejs"; | |
20 | }; | |
21 | }; | |
22 | ||
23 | apb@80000000 { | |
24 | compatible = "simple-bus"; | |
25 | #address-cells = <1>; | |
26 | #size-cells = <1>; | |
27 | reg = <0x80000000 0x80000>; | |
28 | ranges; | |
29 | ||
30 | apbh@80000000 { | |
31 | compatible = "simple-bus"; | |
32 | #address-cells = <1>; | |
33 | #size-cells = <1>; | |
34 | reg = <0x80000000 0x3c900>; | |
35 | ranges; | |
36 | ||
37 | icoll: interrupt-controller@80000000 { | |
38 | compatible = "fsl,imx28-icoll", "fsl,mxs-icoll"; | |
39 | interrupt-controller; | |
40 | #interrupt-cells = <1>; | |
41 | reg = <0x80000000 0x2000>; | |
42 | }; | |
43 | ||
44 | hsadc@80002000 { | |
45 | reg = <0x80002000 2000>; | |
46 | interrupts = <13 87>; | |
47 | status = "disabled"; | |
48 | }; | |
49 | ||
50 | dma-apbh@80004000 { | |
51 | reg = <0x80004000 2000>; | |
52 | status = "disabled"; | |
53 | }; | |
54 | ||
55 | perfmon@80006000 { | |
56 | reg = <0x80006000 800>; | |
57 | interrupts = <27>; | |
58 | status = "disabled"; | |
59 | }; | |
60 | ||
61 | bch@8000a000 { | |
62 | reg = <0x8000a000 2000>; | |
63 | interrupts = <41>; | |
64 | status = "disabled"; | |
65 | }; | |
66 | ||
67 | gpmi@8000c000 { | |
68 | reg = <0x8000c000 2000>; | |
69 | interrupts = <42 88>; | |
70 | status = "disabled"; | |
71 | }; | |
72 | ||
73 | ssp0: ssp@80010000 { | |
74 | reg = <0x80010000 2000>; | |
75 | interrupts = <96 82>; | |
76 | status = "disabled"; | |
77 | }; | |
78 | ||
79 | ssp1: ssp@80012000 { | |
80 | reg = <0x80012000 2000>; | |
81 | interrupts = <97 83>; | |
82 | status = "disabled"; | |
83 | }; | |
84 | ||
85 | ssp2: ssp@80014000 { | |
86 | reg = <0x80014000 2000>; | |
87 | interrupts = <98 84>; | |
88 | status = "disabled"; | |
89 | }; | |
90 | ||
91 | ssp3: ssp@80016000 { | |
92 | reg = <0x80016000 2000>; | |
93 | interrupts = <99 85>; | |
94 | status = "disabled"; | |
95 | }; | |
96 | ||
97 | pinctrl@80018000 { | |
98 | #address-cells = <1>; | |
99 | #size-cells = <0>; | |
100 | compatible = "fsl,imx28-pinctrl"; | |
101 | reg = <0x80018000 2000>; | |
102 | ||
103 | duart_pins_a: duart@0 { | |
104 | reg = <0>; | |
105 | fsl,pinmux-ids = <0x3102 0x3112>; | |
106 | fsl,drive-strength = <0>; | |
107 | fsl,voltage = <1>; | |
108 | fsl,pull-up = <0>; | |
109 | }; | |
110 | ||
111 | mac0_pins_a: mac0@0 { | |
112 | reg = <0>; | |
113 | fsl,pinmux-ids = <0x4000 0x4010 0x4020 | |
114 | 0x4030 0x4040 0x4060 0x4070 | |
115 | 0x4080 0x4100>; | |
116 | fsl,drive-strength = <1>; | |
117 | fsl,voltage = <1>; | |
118 | fsl,pull-up = <1>; | |
119 | }; | |
120 | ||
121 | mac1_pins_a: mac1@0 { | |
122 | reg = <0>; | |
123 | fsl,pinmux-ids = <0x40f1 0x4091 0x40a1 | |
124 | 0x40e1 0x40b1 0x40c1>; | |
125 | fsl,drive-strength = <1>; | |
126 | fsl,voltage = <1>; | |
127 | fsl,pull-up = <1>; | |
128 | }; | |
129 | }; | |
130 | ||
131 | digctl@8001c000 { | |
132 | reg = <0x8001c000 2000>; | |
133 | interrupts = <89>; | |
134 | status = "disabled"; | |
135 | }; | |
136 | ||
137 | etm@80022000 { | |
138 | reg = <0x80022000 2000>; | |
139 | status = "disabled"; | |
140 | }; | |
141 | ||
142 | dma-apbx@80024000 { | |
143 | reg = <0x80024000 2000>; | |
144 | status = "disabled"; | |
145 | }; | |
146 | ||
147 | dcp@80028000 { | |
148 | reg = <0x80028000 2000>; | |
149 | interrupts = <52 53 54>; | |
150 | status = "disabled"; | |
151 | }; | |
152 | ||
153 | pxp@8002a000 { | |
154 | reg = <0x8002a000 2000>; | |
155 | interrupts = <39>; | |
156 | status = "disabled"; | |
157 | }; | |
158 | ||
159 | ocotp@8002c000 { | |
160 | reg = <0x8002c000 2000>; | |
161 | status = "disabled"; | |
162 | }; | |
163 | ||
164 | axi-ahb@8002e000 { | |
165 | reg = <0x8002e000 2000>; | |
166 | status = "disabled"; | |
167 | }; | |
168 | ||
169 | lcdif@80030000 { | |
170 | reg = <0x80030000 2000>; | |
171 | interrupts = <38 86>; | |
172 | status = "disabled"; | |
173 | }; | |
174 | ||
175 | can0: can@80032000 { | |
176 | reg = <0x80032000 2000>; | |
177 | interrupts = <8>; | |
178 | status = "disabled"; | |
179 | }; | |
180 | ||
181 | can1: can@80034000 { | |
182 | reg = <0x80034000 2000>; | |
183 | interrupts = <9>; | |
184 | status = "disabled"; | |
185 | }; | |
186 | ||
187 | simdbg@8003c000 { | |
188 | reg = <0x8003c000 200>; | |
189 | status = "disabled"; | |
190 | }; | |
191 | ||
192 | simgpmisel@8003c200 { | |
193 | reg = <0x8003c200 100>; | |
194 | status = "disabled"; | |
195 | }; | |
196 | ||
197 | simsspsel@8003c300 { | |
198 | reg = <0x8003c300 100>; | |
199 | status = "disabled"; | |
200 | }; | |
201 | ||
202 | simmemsel@8003c400 { | |
203 | reg = <0x8003c400 100>; | |
204 | status = "disabled"; | |
205 | }; | |
206 | ||
207 | gpiomon@8003c500 { | |
208 | reg = <0x8003c500 100>; | |
209 | status = "disabled"; | |
210 | }; | |
211 | ||
212 | simenet@8003c700 { | |
213 | reg = <0x8003c700 100>; | |
214 | status = "disabled"; | |
215 | }; | |
216 | ||
217 | armjtag@8003c800 { | |
218 | reg = <0x8003c800 100>; | |
219 | status = "disabled"; | |
220 | }; | |
221 | }; | |
222 | ||
223 | apbx@80040000 { | |
224 | compatible = "simple-bus"; | |
225 | #address-cells = <1>; | |
226 | #size-cells = <1>; | |
227 | reg = <0x80040000 0x40000>; | |
228 | ranges; | |
229 | ||
230 | clkctl@80040000 { | |
231 | reg = <0x80040000 2000>; | |
232 | status = "disabled"; | |
233 | }; | |
234 | ||
235 | saif0: saif@80042000 { | |
236 | reg = <0x80042000 2000>; | |
237 | interrupts = <59 80>; | |
238 | status = "disabled"; | |
239 | }; | |
240 | ||
241 | power@80044000 { | |
242 | reg = <0x80044000 2000>; | |
243 | status = "disabled"; | |
244 | }; | |
245 | ||
246 | saif1: saif@80046000 { | |
247 | reg = <0x80046000 2000>; | |
248 | interrupts = <58 81>; | |
249 | status = "disabled"; | |
250 | }; | |
251 | ||
252 | lradc@80050000 { | |
253 | reg = <0x80050000 2000>; | |
254 | status = "disabled"; | |
255 | }; | |
256 | ||
257 | spdif@80054000 { | |
258 | reg = <0x80054000 2000>; | |
259 | interrupts = <45 66>; | |
260 | status = "disabled"; | |
261 | }; | |
262 | ||
263 | rtc@80056000 { | |
264 | reg = <0x80056000 2000>; | |
265 | interrupts = <28 29>; | |
266 | status = "disabled"; | |
267 | }; | |
268 | ||
269 | i2c0: i2c@80058000 { | |
270 | reg = <0x80058000 2000>; | |
271 | interrupts = <111 68>; | |
272 | status = "disabled"; | |
273 | }; | |
274 | ||
275 | i2c1: i2c@8005a000 { | |
276 | reg = <0x8005a000 2000>; | |
277 | interrupts = <110 69>; | |
278 | status = "disabled"; | |
279 | }; | |
280 | ||
281 | pwm@80064000 { | |
282 | reg = <0x80064000 2000>; | |
283 | status = "disabled"; | |
284 | }; | |
285 | ||
286 | timrot@80068000 { | |
287 | reg = <0x80068000 2000>; | |
288 | status = "disabled"; | |
289 | }; | |
290 | ||
291 | auart0: serial@8006a000 { | |
292 | reg = <0x8006a000 0x2000>; | |
293 | interrupts = <112 70 71>; | |
294 | status = "disabled"; | |
295 | }; | |
296 | ||
297 | auart1: serial@8006c000 { | |
298 | reg = <0x8006c000 0x2000>; | |
299 | interrupts = <113 72 73>; | |
300 | status = "disabled"; | |
301 | }; | |
302 | ||
303 | auart2: serial@8006e000 { | |
304 | reg = <0x8006e000 0x2000>; | |
305 | interrupts = <114 74 75>; | |
306 | status = "disabled"; | |
307 | }; | |
308 | ||
309 | auart3: serial@80070000 { | |
310 | reg = <0x80070000 0x2000>; | |
311 | interrupts = <115 76 77>; | |
312 | status = "disabled"; | |
313 | }; | |
314 | ||
315 | auart4: serial@80072000 { | |
316 | reg = <0x80072000 0x2000>; | |
317 | interrupts = <116 78 79>; | |
318 | status = "disabled"; | |
319 | }; | |
320 | ||
321 | duart: serial@80074000 { | |
322 | compatible = "arm,pl011", "arm,primecell"; | |
323 | reg = <0x80074000 0x1000>; | |
324 | interrupts = <47>; | |
325 | status = "disabled"; | |
326 | }; | |
327 | ||
328 | usbphy0: usbphy@8007c000 { | |
329 | reg = <0x8007c000 0x2000>; | |
330 | status = "disabled"; | |
331 | }; | |
332 | ||
333 | usbphy1: usbphy@8007e000 { | |
334 | reg = <0x8007e000 0x2000>; | |
335 | status = "disabled"; | |
336 | }; | |
337 | }; | |
338 | }; | |
339 | ||
340 | ahb@80080000 { | |
341 | compatible = "simple-bus"; | |
342 | #address-cells = <1>; | |
343 | #size-cells = <1>; | |
344 | reg = <0x80080000 0x80000>; | |
345 | ranges; | |
346 | ||
347 | usbctrl0: usbctrl@80080000 { | |
348 | reg = <0x80080000 0x10000>; | |
349 | status = "disabled"; | |
350 | }; | |
351 | ||
352 | usbctrl1: usbctrl@80090000 { | |
353 | reg = <0x80090000 0x10000>; | |
354 | status = "disabled"; | |
355 | }; | |
356 | ||
357 | dflpt@800c0000 { | |
358 | reg = <0x800c0000 0x10000>; | |
359 | status = "disabled"; | |
360 | }; | |
361 | ||
362 | mac0: ethernet@800f0000 { | |
363 | compatible = "fsl,imx28-fec"; | |
364 | reg = <0x800f0000 0x4000>; | |
365 | interrupts = <101>; | |
366 | status = "disabled"; | |
367 | }; | |
368 | ||
369 | mac1: ethernet@800f4000 { | |
370 | compatible = "fsl,imx28-fec"; | |
371 | reg = <0x800f4000 0x4000>; | |
372 | interrupts = <102>; | |
373 | status = "disabled"; | |
374 | }; | |
375 | ||
376 | switch@800f8000 { | |
377 | reg = <0x800f8000 0x8000>; | |
378 | status = "disabled"; | |
379 | }; | |
380 | ||
381 | }; | |
382 | }; |