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e910b45c GGM |
1 | /* |
2 | * Copyright 2013 Armadeus Systems - <support@armadeus.com> | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /* APF51Dev is a docking board for the APF51 SOM */ | |
13 | #include "imx51-apf51.dts" | |
14 | ||
15 | / { | |
16 | model = "Armadeus Systems APF51Dev docking/development board"; | |
17 | compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51"; | |
18 | ||
5d150eac GGM |
19 | display@di1 { |
20 | compatible = "fsl,imx-parallel-display"; | |
21 | crtcs = <&ipu 0>; | |
22 | interface-pix-fmt = "bgr666"; | |
23 | pinctrl-names = "default"; | |
24 | pinctrl-0 = <&pinctrl_ipu_disp1_1>; | |
25 | ||
26 | display-timings { | |
27 | lw700 { | |
28 | native-mode; | |
29 | clock-frequency = <33000033>; | |
30 | hactive = <800>; | |
31 | vactive = <480>; | |
32 | hback-porch = <96>; | |
33 | hfront-porch = <96>; | |
34 | vback-porch = <20>; | |
35 | vfront-porch = <21>; | |
36 | hsync-len = <64>; | |
37 | vsync-len = <4>; | |
38 | hsync-active = <1>; | |
39 | vsync-active = <1>; | |
40 | de-active = <1>; | |
41 | pixelclk-active = <0>; | |
42 | }; | |
43 | }; | |
44 | }; | |
45 | ||
e910b45c GGM |
46 | gpio-keys { |
47 | compatible = "gpio-keys"; | |
48 | ||
49 | user-key { | |
50 | label = "user"; | |
51 | gpios = <&gpio1 3 0>; | |
52 | linux,code = <256>; /* BTN_0 */ | |
53 | }; | |
54 | }; | |
55 | ||
56 | leds { | |
57 | compatible = "gpio-leds"; | |
58 | ||
59 | user { | |
60 | label = "Heartbeat"; | |
61 | gpios = <&gpio1 2 0>; | |
62 | linux,default-trigger = "heartbeat"; | |
63 | }; | |
64 | }; | |
65 | }; | |
66 | ||
003c70d8 GGM |
67 | &ecspi1 { |
68 | pinctrl-names = "default"; | |
69 | pinctrl-0 = <&pinctrl_ecspi1_1>; | |
70 | fsl,spi-num-chipselects = <2>; | |
71 | cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>; | |
72 | status = "okay"; | |
73 | }; | |
74 | ||
75 | &ecspi2 { | |
76 | pinctrl-names = "default"; | |
77 | pinctrl-0 = <&pinctrl_ecspi2_1>; | |
78 | fsl,spi-num-chipselects = <2>; | |
79 | cs-gpios = <&gpio3 28 1>, <&gpio3 27 1>; | |
80 | status = "okay"; | |
81 | }; | |
82 | ||
e910b45c GGM |
83 | &esdhc1 { |
84 | pinctrl-names = "default"; | |
85 | pinctrl-0 = <&pinctrl_esdhc1_1>; | |
86 | cd-gpios = <&gpio2 29 0>; | |
87 | bus-width = <4>; | |
88 | status = "okay"; | |
89 | }; | |
90 | ||
91 | &esdhc2 { | |
92 | pinctrl-names = "default"; | |
93 | pinctrl-0 = <&pinctrl_esdhc2_1>; | |
94 | bus-width = <4>; | |
95 | non-removable; | |
96 | status = "okay"; | |
97 | }; | |
98 | ||
003c70d8 GGM |
99 | &i2c2 { |
100 | pinctrl-names = "default"; | |
101 | pinctrl-0 = <&pinctrl_i2c2_2>; | |
102 | status = "okay"; | |
103 | }; | |
104 | ||
e910b45c GGM |
105 | &iomuxc { |
106 | pinctrl-names = "default"; | |
107 | pinctrl-0 = <&pinctrl_hog>; | |
108 | ||
109 | hog { | |
110 | pinctrl_hog: hoggrp { | |
111 | fsl,pins = < | |
112 | MX51_PAD_EIM_EB2__GPIO2_22 0x0C5 | |
113 | MX51_PAD_EIM_EB3__GPIO2_23 0x0C5 | |
114 | MX51_PAD_EIM_CS4__GPIO2_29 0x100 | |
115 | MX51_PAD_NANDF_D13__GPIO3_27 0x0C5 | |
116 | MX51_PAD_NANDF_D12__GPIO3_28 0x0C5 | |
117 | MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5 | |
118 | MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5 | |
119 | MX51_PAD_GPIO1_2__GPIO1_2 0x0C5 | |
120 | MX51_PAD_GPIO1_3__GPIO1_3 0x0C5 | |
121 | >; | |
122 | }; | |
123 | }; | |
124 | }; |