[deliverable/linux.git] / arch / arm / boot / dts / imx51-babbage.dts

/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;
/include/ "imx51.dtsi"

/ {
	model = "Freescale i.MX51 Babbage Board";
	compatible = "fsl,imx51-babbage", "fsl,imx51";

	memory {
		reg = <0x90000000 0x20000000>;
	};

	soc {
		aips@70000000 { /* aips-1 */
			spba@70000000 {
				esdhc@70004000 { /* ESDHC1 */
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_esdhc1_1>;
					fsl,cd-controller;
					fsl,wp-controller;
					status = "okay";
				};

				esdhc@70008000 { /* ESDHC2 */
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_esdhc2_1>;
					cd-gpios = <&gpio1 6 0>;
					wp-gpios = <&gpio1 5 0>;
					status = "okay";
				};

				uart3: serial@7000c000 {
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_uart3_1>;
					fsl,uart-has-rtscts;
					status = "okay";
				};

				ecspi@70010000 { /* ECSPI1 */
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_ecspi1_1>;
					fsl,spi-num-chipselects = <2>;
					cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
					status = "okay";

					pmic: mc13892@0 {
						#address-cells = <1>;
						#size-cells = <0>;
						compatible = "fsl,mc13892";
						spi-max-frequency = <6000000>;
						reg = <0>;
						interrupt-parent = <&gpio1>;
						interrupts = <8 0x4>;

						regulators {
							sw1_reg: sw1 {
								regulator-min-microvolt = <600000>;
								regulator-max-microvolt = <1375000>;
								regulator-boot-on;
								regulator-always-on;
							};

							sw2_reg: sw2 {
								regulator-min-microvolt = <900000>;
								regulator-max-microvolt = <1850000>;
								regulator-boot-on;
								regulator-always-on;
							};

							sw3_reg: sw3 {
								regulator-min-microvolt = <1100000>;
								regulator-max-microvolt = <1850000>;
								regulator-boot-on;
								regulator-always-on;
							};

							sw4_reg: sw4 {
								regulator-min-microvolt = <1100000>;
								regulator-max-microvolt = <1850000>;
								regulator-boot-on;
								regulator-always-on;
							};

							vpll_reg: vpll {
								regulator-min-microvolt = <1050000>;
								regulator-max-microvolt = <1800000>;
								regulator-boot-on;
								regulator-always-on;
							};

							vdig_reg: vdig {
								regulator-min-microvolt = <1650000>;
								regulator-max-microvolt = <1650000>;
								regulator-boot-on;
							};

							vsd_reg: vsd {
								regulator-min-microvolt = <1800000>;
								regulator-max-microvolt = <3150000>;
							};

							vusb2_reg: vusb2 {
								regulator-min-microvolt = <2400000>;
								regulator-max-microvolt = <2775000>;
								regulator-boot-on;
								regulator-always-on;
							};

							vvideo_reg: vvideo {
								regulator-min-microvolt = <2775000>;
								regulator-max-microvolt = <2775000>;
							};

							vaudio_reg: vaudio {
								regulator-min-microvolt = <2300000>;
								regulator-max-microvolt = <3000000>;
							};

							vcam_reg: vcam {
								regulator-min-microvolt = <2500000>;
								regulator-max-microvolt = <3000000>;
							};

							vgen1_reg: vgen1 {
								regulator-min-microvolt = <1200000>;
								regulator-max-microvolt = <1200000>;
							};

							vgen2_reg: vgen2 {
								regulator-min-microvolt = <1200000>;
								regulator-max-microvolt = <3150000>;
								regulator-always-on;
							};

							vgen3_reg: vgen3 {
								regulator-min-microvolt = <1800000>;
								regulator-max-microvolt = <2900000>;
								regulator-always-on;
							};
						};
					};

					flash: at45db321d@1 {
						#address-cells = <1>;
						#size-cells = <1>;
						compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
						spi-max-frequency = <25000000>;
						reg = <1>;

						partition@0 {
							label = "U-Boot";
							reg = <0x0 0x40000>;
							read-only;
						};

						partition@40000 {
							label = "Kernel";
							reg = <0x40000 0x3c0000>;
						};
					};
				};

				ssi2: ssi@70014000 {
					fsl,mode = "i2s-slave";
					status = "okay";
				};
			};

			iomuxc@73fa8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_hog>;

				hog {
					pinctrl_hog: hoggrp {
						fsl,pins = <
							694  0x20d5	/* MX51_PAD_GPIO1_0__SD1_CD */
							697  0x20d5	/* MX51_PAD_GPIO1_1__SD1_WP */
							737  0x100	/* MX51_PAD_GPIO1_5__GPIO1_5 */
							740  0x100	/* MX51_PAD_GPIO1_6__GPIO1_6 */
							121  0x5	/* MX51_PAD_EIM_A27__GPIO2_21 */
							402  0x85	/* MX51_PAD_CSPI1_SS0__GPIO4_24 */
							405  0x85	/* MX51_PAD_CSPI1_SS1__GPIO4_25 */
						>;
					};
				};
			};

			uart1: serial@73fbc000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1_1>;
				fsl,uart-has-rtscts;
				status = "okay";
			};

			uart2: serial@73fc0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart2_1>;
				status = "okay";
			};
		};

		aips@80000000 {	/* aips-2 */
			i2c@83fc4000 { /* I2C2 */
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c2_1>;
				status = "okay";

				sgtl5000: codec@0a {
					compatible = "fsl,sgtl5000";
					reg = <0x0a>;
					clock-frequency = <26000000>;
					VDDA-supply = <&vdig_reg>;
					VDDIO-supply = <&vvideo_reg>;
				};
			};

			audmux@83fd0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_audmux_1>;
				status = "okay";
			};

			ethernet@83fec000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_fec_1>;
				phy-mode = "mii";
				status = "okay";
			};
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power Button";
			gpios = <&gpio2 21 0>;
			linux,code = <116>; /* KEY_POWER */
			gpio-key,wakeup;
		};
	};

	sound {
		compatible = "fsl,imx51-babbage-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx51-babbage-sgtl5000";
		ssi-controller = <&ssi2>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <2>;
		mux-ext-port = <3>;
	};
};
Commit	Line	Data
9daaf31a SG	1	/*
	2	* Copyright 2011 Freescale Semiconductor, Inc.
	3	* Copyright 2011 Linaro Ltd.
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
	13	/dts-v1/;
	14	/include/ "imx51.dtsi"
	15
	16	/ {
	17	model = "Freescale i.MX51 Babbage Board";
	18	compatible = "fsl,imx51-babbage", "fsl,imx51";
	19
9daaf31a SG	20	memory {
	21	reg = <0x90000000 0x20000000>;
	22	};
	23
	24	soc {
	25	aips@70000000 { /* aips-1 */
	26	spba@70000000 {
	27	esdhc@70004000 { /* ESDHC1 */
b72cf105 SG	28	pinctrl-names = "default";
b72cf105 SG	29	pinctrl-0 = <&pinctrl_esdhc1_1>;
a46d2619 SG	30	fsl,cd-controller;
a46d2619 SG	31	fsl,wp-controller;
9daaf31a SG	32	status = "okay";
	33	};
	34
	35	esdhc@70008000 { /* ESDHC2 */
b72cf105 SG	36	pinctrl-names = "default";
b72cf105 SG	37	pinctrl-0 = <&pinctrl_esdhc2_1>;
4d191868 RZ	38	cd-gpios = <&gpio1 6 0>;
4d191868 RZ	39	wp-gpios = <&gpio1 5 0>;
9daaf31a SG	40	status = "okay";
	41	};
	42
0c456cfa	43	uart3: serial@7000c000 {
b72cf105 SG	44	pinctrl-names = "default";
b72cf105 SG	45	pinctrl-0 = <&pinctrl_uart3_1>;
9daaf31a SG	46	fsl,uart-has-rtscts;
	47	status = "okay";
	48	};
	49
	50	ecspi@70010000 { /* ECSPI1 */
b72cf105 SG	51	pinctrl-names = "default";
b72cf105 SG	52	pinctrl-0 = <&pinctrl_ecspi1_1>;
9daaf31a	53	fsl,spi-num-chipselects = <2>;
4d191868	54	cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
9daaf31a SG	55	status = "okay";
	56
	57	pmic: mc13892@0 {
	58	#address-cells = <1>;
	59	#size-cells = <0>;
	60	compatible = "fsl,mc13892";
	61	spi-max-frequency = <6000000>;
	62	reg = <0>;
4619fce2	63	interrupt-parent = <&gpio1>;
65dee07c	64	interrupts = <8 0x4>;
4619fce2 SG	65
	66	regulators {
	67	sw1_reg: sw1 {
	68	regulator-min-microvolt = <600000>;
	69	regulator-max-microvolt = <1375000>;
	70	regulator-boot-on;
	71	regulator-always-on;
	72	};
	73
	74	sw2_reg: sw2 {
	75	regulator-min-microvolt = <900000>;
	76	regulator-max-microvolt = <1850000>;
	77	regulator-boot-on;
	78	regulator-always-on;
	79	};
	80
	81	sw3_reg: sw3 {
	82	regulator-min-microvolt = <1100000>;
	83	regulator-max-microvolt = <1850000>;
	84	regulator-boot-on;
	85	regulator-always-on;
	86	};
	87
	88	sw4_reg: sw4 {
	89	regulator-min-microvolt = <1100000>;
	90	regulator-max-microvolt = <1850000>;
	91	regulator-boot-on;
	92	regulator-always-on;
	93	};
	94
	95	vpll_reg: vpll {
	96	regulator-min-microvolt = <1050000>;
	97	regulator-max-microvolt = <1800000>;
	98	regulator-boot-on;
	99	regulator-always-on;
	100	};
	101
	102	vdig_reg: vdig {
	103	regulator-min-microvolt = <1650000>;
	104	regulator-max-microvolt = <1650000>;
	105	regulator-boot-on;
	106	};
	107
	108	vsd_reg: vsd {
	109	regulator-min-microvolt = <1800000>;
	110	regulator-max-microvolt = <3150000>;
	111	};
	112
	113	vusb2_reg: vusb2 {
	114	regulator-min-microvolt = <2400000>;
	115	regulator-max-microvolt = <2775000>;
	116	regulator-boot-on;
	117	regulator-always-on;
	118	};
	119
	120	vvideo_reg: vvideo {
	121	regulator-min-microvolt = <2775000>;
	122	regulator-max-microvolt = <2775000>;
	123	};
	124
	125	vaudio_reg: vaudio {
	126	regulator-min-microvolt = <2300000>;
	127	regulator-max-microvolt = <3000000>;
	128	};
129
130	vcam_reg: vcam {
131	regulator-min-microvolt = <2500000>;
132	regulator-max-microvolt = <3000000>;
133	};
134
135	vgen1_reg: vgen1 {
136	regulator-min-microvolt = <1200000>;
137	regulator-max-microvolt = <1200000>;
138	};
139
140	vgen2_reg: vgen2 {
141	regulator-min-microvolt = <1200000>;
142	regulator-max-microvolt = <3150000>;
143	regulator-always-on;
144	};
145
146	vgen3_reg: vgen3 {
147	regulator-min-microvolt = <1800000>;
148	regulator-max-microvolt = <2900000>;
149	regulator-always-on;
150	};
151	};
9daaf31a SG	152	};
	153
	154	flash: at45db321d@1 {
	155	#address-cells = <1>;
	156	#size-cells = <1>;
	157	compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
	158	spi-max-frequency = <25000000>;
	159	reg = <1>;
	160
	161	partition@0 {
	162	label = "U-Boot";
	163	reg = <0x0 0x40000>;
	164	read-only;
	165	};
	166
	167	partition@40000 {
	168	label = "Kernel";
	169	reg = <0x40000 0x3c0000>;
	170	};
	171	};
	172	};
a15d9f89 SG	173
	174	ssi2: ssi@70014000 {
	175	fsl,mode = "i2s-slave";
	176	status = "okay";
	177	};
9daaf31a SG	178	};
9daaf31a SG	179
9daaf31a	180	iomuxc@73fa8000 {
b72cf105 SG	181	pinctrl-names = "default";
	182	pinctrl-0 = <&pinctrl_hog>;
	183
	184	hog {
	185	pinctrl_hog: hoggrp {
	186	fsl,pins = <
	187	694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */
	188	697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */
	189	737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */
	190	740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */
	191	121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */
	192	402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
	193	405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
	194	>;
	195	};
	196	};
9daaf31a SG	197	};
9daaf31a SG	198
0c456cfa	199	uart1: serial@73fbc000 {
b72cf105 SG	200	pinctrl-names = "default";
b72cf105 SG	201	pinctrl-0 = <&pinctrl_uart1_1>;
9daaf31a SG	202	fsl,uart-has-rtscts;
	203	status = "okay";
	204	};
	205
0c456cfa	206	uart2: serial@73fc0000 {
b72cf105 SG	207	pinctrl-names = "default";
b72cf105 SG	208	pinctrl-0 = <&pinctrl_uart2_1>;
9daaf31a SG	209	status = "okay";
	210	};
	211	};
	212
	213	aips@80000000 { /* aips-2 */
9daaf31a	214	i2c@83fc4000 { /* I2C2 */
b72cf105 SG	215	pinctrl-names = "default";
b72cf105 SG	216	pinctrl-0 = <&pinctrl_i2c2_1>;
9daaf31a SG	217	status = "okay";
9daaf31a SG	218
a15d9f89	219	sgtl5000: codec@0a {
9daaf31a SG	220	compatible = "fsl,sgtl5000";
9daaf31a SG	221	reg = <0x0a>;
a15d9f89 SG	222	clock-frequency = <26000000>;
	223	VDDA-supply = <&vdig_reg>;
	224	VDDIO-supply = <&vvideo_reg>;
9daaf31a SG	225	};
	226	};
	227
a15d9f89	228	audmux@83fd0000 {
b72cf105 SG	229	pinctrl-names = "default";
b72cf105 SG	230	pinctrl-0 = <&pinctrl_audmux_1>;
a15d9f89 SG	231	status = "okay";
	232	};
	233
0c456cfa	234	ethernet@83fec000 {
b72cf105 SG	235	pinctrl-names = "default";
b72cf105 SG	236	pinctrl-0 = <&pinctrl_fec_1>;
9daaf31a SG	237	phy-mode = "mii";
	238	status = "okay";
	239	};
	240	};
	241	};
	242
	243	gpio-keys {
	244	compatible = "gpio-keys";
	245
	246	power {
	247	label = "Power Button";
4d191868	248	gpios = <&gpio2 21 0>;
9daaf31a SG	249	linux,code = <116>; /* KEY_POWER */
	250	gpio-key,wakeup;
	251	};
	252	};
a15d9f89 SG	253
	254	sound {
	255	compatible = "fsl,imx51-babbage-sgtl5000",
	256	"fsl,imx-audio-sgtl5000";
	257	model = "imx51-babbage-sgtl5000";
	258	ssi-controller = <&ssi2>;
	259	audio-codec = <&sgtl5000>;
	260	audio-routing =
	261	"MIC_IN", "Mic Jack",
	262	"Mic Jack", "Mic Bias",
	263	"Headphone Jack", "HP_OUT";
	264	mux-int-port = <2>;
	265	mux-ext-port = <3>;
	266	};
9daaf31a	267	};