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9daaf31a SG |
1 | /* |
2 | * Copyright 2011 Freescale Semiconductor, Inc. | |
3 | * Copyright 2011 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | /dts-v1/; | |
14 | /include/ "imx51.dtsi" | |
15 | ||
16 | / { | |
17 | model = "Freescale i.MX51 Babbage Board"; | |
18 | compatible = "fsl,imx51-babbage", "fsl,imx51"; | |
19 | ||
9daaf31a SG |
20 | memory { |
21 | reg = <0x90000000 0x20000000>; | |
22 | }; | |
23 | ||
24 | soc { | |
d6aef84a SH |
25 | display@di0 { |
26 | compatible = "fsl,imx-parallel-display"; | |
27 | crtcs = <&ipu 0>; | |
28 | interface-pix-fmt = "rgb24"; | |
29 | pinctrl-names = "default"; | |
30 | pinctrl-0 = <&pinctrl_ipu_disp1_1>; | |
31 | }; | |
32 | ||
33 | display@di1 { | |
34 | compatible = "fsl,imx-parallel-display"; | |
35 | crtcs = <&ipu 1>; | |
36 | interface-pix-fmt = "rgb565"; | |
37 | pinctrl-names = "default"; | |
38 | pinctrl-0 = <&pinctrl_ipu_disp2_1>; | |
39 | }; | |
40 | ||
9daaf31a SG |
41 | aips@70000000 { /* aips-1 */ |
42 | spba@70000000 { | |
43 | esdhc@70004000 { /* ESDHC1 */ | |
b72cf105 SG |
44 | pinctrl-names = "default"; |
45 | pinctrl-0 = <&pinctrl_esdhc1_1>; | |
a46d2619 SG |
46 | fsl,cd-controller; |
47 | fsl,wp-controller; | |
9daaf31a SG |
48 | status = "okay"; |
49 | }; | |
50 | ||
51 | esdhc@70008000 { /* ESDHC2 */ | |
b72cf105 SG |
52 | pinctrl-names = "default"; |
53 | pinctrl-0 = <&pinctrl_esdhc2_1>; | |
4d191868 RZ |
54 | cd-gpios = <&gpio1 6 0>; |
55 | wp-gpios = <&gpio1 5 0>; | |
9daaf31a SG |
56 | status = "okay"; |
57 | }; | |
58 | ||
0c456cfa | 59 | uart3: serial@7000c000 { |
b72cf105 SG |
60 | pinctrl-names = "default"; |
61 | pinctrl-0 = <&pinctrl_uart3_1>; | |
9daaf31a SG |
62 | fsl,uart-has-rtscts; |
63 | status = "okay"; | |
64 | }; | |
65 | ||
66 | ecspi@70010000 { /* ECSPI1 */ | |
b72cf105 SG |
67 | pinctrl-names = "default"; |
68 | pinctrl-0 = <&pinctrl_ecspi1_1>; | |
9daaf31a | 69 | fsl,spi-num-chipselects = <2>; |
4d191868 | 70 | cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>; |
9daaf31a SG |
71 | status = "okay"; |
72 | ||
73 | pmic: mc13892@0 { | |
74 | #address-cells = <1>; | |
75 | #size-cells = <0>; | |
76 | compatible = "fsl,mc13892"; | |
77 | spi-max-frequency = <6000000>; | |
78 | reg = <0>; | |
4619fce2 | 79 | interrupt-parent = <&gpio1>; |
65dee07c | 80 | interrupts = <8 0x4>; |
4619fce2 SG |
81 | |
82 | regulators { | |
83 | sw1_reg: sw1 { | |
84 | regulator-min-microvolt = <600000>; | |
85 | regulator-max-microvolt = <1375000>; | |
86 | regulator-boot-on; | |
87 | regulator-always-on; | |
88 | }; | |
89 | ||
90 | sw2_reg: sw2 { | |
91 | regulator-min-microvolt = <900000>; | |
92 | regulator-max-microvolt = <1850000>; | |
93 | regulator-boot-on; | |
94 | regulator-always-on; | |
95 | }; | |
96 | ||
97 | sw3_reg: sw3 { | |
98 | regulator-min-microvolt = <1100000>; | |
99 | regulator-max-microvolt = <1850000>; | |
100 | regulator-boot-on; | |
101 | regulator-always-on; | |
102 | }; | |
103 | ||
104 | sw4_reg: sw4 { | |
105 | regulator-min-microvolt = <1100000>; | |
106 | regulator-max-microvolt = <1850000>; | |
107 | regulator-boot-on; | |
108 | regulator-always-on; | |
109 | }; | |
110 | ||
111 | vpll_reg: vpll { | |
112 | regulator-min-microvolt = <1050000>; | |
113 | regulator-max-microvolt = <1800000>; | |
114 | regulator-boot-on; | |
115 | regulator-always-on; | |
116 | }; | |
117 | ||
118 | vdig_reg: vdig { | |
119 | regulator-min-microvolt = <1650000>; | |
120 | regulator-max-microvolt = <1650000>; | |
121 | regulator-boot-on; | |
122 | }; | |
123 | ||
124 | vsd_reg: vsd { | |
125 | regulator-min-microvolt = <1800000>; | |
126 | regulator-max-microvolt = <3150000>; | |
127 | }; | |
128 | ||
129 | vusb2_reg: vusb2 { | |
130 | regulator-min-microvolt = <2400000>; | |
131 | regulator-max-microvolt = <2775000>; | |
132 | regulator-boot-on; | |
133 | regulator-always-on; | |
134 | }; | |
135 | ||
136 | vvideo_reg: vvideo { | |
137 | regulator-min-microvolt = <2775000>; | |
138 | regulator-max-microvolt = <2775000>; | |
139 | }; | |
140 | ||
141 | vaudio_reg: vaudio { | |
142 | regulator-min-microvolt = <2300000>; | |
143 | regulator-max-microvolt = <3000000>; | |
144 | }; | |
145 | ||
146 | vcam_reg: vcam { | |
147 | regulator-min-microvolt = <2500000>; | |
148 | regulator-max-microvolt = <3000000>; | |
149 | }; | |
150 | ||
151 | vgen1_reg: vgen1 { | |
152 | regulator-min-microvolt = <1200000>; | |
153 | regulator-max-microvolt = <1200000>; | |
154 | }; | |
155 | ||
156 | vgen2_reg: vgen2 { | |
157 | regulator-min-microvolt = <1200000>; | |
158 | regulator-max-microvolt = <3150000>; | |
159 | regulator-always-on; | |
160 | }; | |
161 | ||
162 | vgen3_reg: vgen3 { | |
163 | regulator-min-microvolt = <1800000>; | |
164 | regulator-max-microvolt = <2900000>; | |
165 | regulator-always-on; | |
166 | }; | |
167 | }; | |
9daaf31a SG |
168 | }; |
169 | ||
170 | flash: at45db321d@1 { | |
171 | #address-cells = <1>; | |
172 | #size-cells = <1>; | |
173 | compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash"; | |
174 | spi-max-frequency = <25000000>; | |
175 | reg = <1>; | |
176 | ||
177 | partition@0 { | |
178 | label = "U-Boot"; | |
179 | reg = <0x0 0x40000>; | |
180 | read-only; | |
181 | }; | |
182 | ||
183 | partition@40000 { | |
184 | label = "Kernel"; | |
185 | reg = <0x40000 0x3c0000>; | |
186 | }; | |
187 | }; | |
188 | }; | |
a15d9f89 SG |
189 | |
190 | ssi2: ssi@70014000 { | |
191 | fsl,mode = "i2s-slave"; | |
192 | status = "okay"; | |
193 | }; | |
9daaf31a SG |
194 | }; |
195 | ||
9daaf31a | 196 | iomuxc@73fa8000 { |
b72cf105 SG |
197 | pinctrl-names = "default"; |
198 | pinctrl-0 = <&pinctrl_hog>; | |
199 | ||
200 | hog { | |
201 | pinctrl_hog: hoggrp { | |
202 | fsl,pins = < | |
203 | 694 0x20d5 /* MX51_PAD_GPIO1_0__SD1_CD */ | |
204 | 697 0x20d5 /* MX51_PAD_GPIO1_1__SD1_WP */ | |
205 | 737 0x100 /* MX51_PAD_GPIO1_5__GPIO1_5 */ | |
206 | 740 0x100 /* MX51_PAD_GPIO1_6__GPIO1_6 */ | |
207 | 121 0x5 /* MX51_PAD_EIM_A27__GPIO2_21 */ | |
208 | 402 0x85 /* MX51_PAD_CSPI1_SS0__GPIO4_24 */ | |
209 | 405 0x85 /* MX51_PAD_CSPI1_SS1__GPIO4_25 */ | |
210 | >; | |
211 | }; | |
212 | }; | |
9daaf31a SG |
213 | }; |
214 | ||
0c456cfa | 215 | uart1: serial@73fbc000 { |
b72cf105 SG |
216 | pinctrl-names = "default"; |
217 | pinctrl-0 = <&pinctrl_uart1_1>; | |
9daaf31a SG |
218 | fsl,uart-has-rtscts; |
219 | status = "okay"; | |
220 | }; | |
221 | ||
0c456cfa | 222 | uart2: serial@73fc0000 { |
b72cf105 SG |
223 | pinctrl-names = "default"; |
224 | pinctrl-0 = <&pinctrl_uart2_1>; | |
9daaf31a SG |
225 | status = "okay"; |
226 | }; | |
227 | }; | |
228 | ||
229 | aips@80000000 { /* aips-2 */ | |
9daaf31a | 230 | i2c@83fc4000 { /* I2C2 */ |
b72cf105 SG |
231 | pinctrl-names = "default"; |
232 | pinctrl-0 = <&pinctrl_i2c2_1>; | |
9daaf31a SG |
233 | status = "okay"; |
234 | ||
a15d9f89 | 235 | sgtl5000: codec@0a { |
9daaf31a SG |
236 | compatible = "fsl,sgtl5000"; |
237 | reg = <0x0a>; | |
a15d9f89 SG |
238 | clock-frequency = <26000000>; |
239 | VDDA-supply = <&vdig_reg>; | |
240 | VDDIO-supply = <&vvideo_reg>; | |
9daaf31a SG |
241 | }; |
242 | }; | |
243 | ||
a15d9f89 | 244 | audmux@83fd0000 { |
b72cf105 SG |
245 | pinctrl-names = "default"; |
246 | pinctrl-0 = <&pinctrl_audmux_1>; | |
a15d9f89 SG |
247 | status = "okay"; |
248 | }; | |
249 | ||
0c456cfa | 250 | ethernet@83fec000 { |
b72cf105 SG |
251 | pinctrl-names = "default"; |
252 | pinctrl-0 = <&pinctrl_fec_1>; | |
9daaf31a SG |
253 | phy-mode = "mii"; |
254 | status = "okay"; | |
255 | }; | |
256 | }; | |
257 | }; | |
258 | ||
259 | gpio-keys { | |
260 | compatible = "gpio-keys"; | |
261 | ||
262 | power { | |
263 | label = "Power Button"; | |
4d191868 | 264 | gpios = <&gpio2 21 0>; |
9daaf31a SG |
265 | linux,code = <116>; /* KEY_POWER */ |
266 | gpio-key,wakeup; | |
267 | }; | |
268 | }; | |
a15d9f89 SG |
269 | |
270 | sound { | |
271 | compatible = "fsl,imx51-babbage-sgtl5000", | |
272 | "fsl,imx-audio-sgtl5000"; | |
273 | model = "imx51-babbage-sgtl5000"; | |
274 | ssi-controller = <&ssi2>; | |
275 | audio-codec = <&sgtl5000>; | |
276 | audio-routing = | |
277 | "MIC_IN", "Mic Jack", | |
278 | "Mic Jack", "Mic Bias", | |
279 | "Headphone Jack", "HP_OUT"; | |
280 | mux-int-port = <2>; | |
281 | mux-ext-port = <3>; | |
282 | }; | |
9daaf31a | 283 | }; |