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ARM i.MX53: mba53: add missing gpio stuff for pca9554
[deliverable/linux.git] / arch / arm / boot / dts / imx53-mba53.dts
CommitLineData
be3a568d
ST		 1/*
2 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
3 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
36dffd8f 14#include "imx53-tqma53.dtsi"
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ST		 15
16/ {
17 model = "TQ MBa53 starter kit";
18 compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
4fa8cf79
SH		 19
20 reg_backlight: fixed@0 {
21 compatible = "regulator-fixed";
22 regulator-name = "lcd-supply";
23 gpio = <&gpio2 5 0>;
24 startup-delay-us = <5000>;
25 enable-active-low;
26 };
27
28 backlight {
29 compatible = "pwm-backlight";
30 pwms = <&pwm2 0 50000 0 0>;
31 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
32 default-brightness-level = <10>;
33 enable-gpios = <&gpio7 7 0>;
34 power-supply = <&reg_backlight>;
35 };
36
37 disp1: display@disp1 {
38 compatible = "fsl,imx-parallel-display";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_disp1_1>;
41 crtcs = <&ipu 1>;
42 interface-pix-fmt = "rgb24";
43 status = "disabled";
44 };
eefb8008
MN		 45
46 reg_3p2v: 3p2v {
47 compatible = "regulator-fixed";
48 regulator-name = "3P2V";
49 regulator-min-microvolt = <3200000>;
50 regulator-max-microvolt = <3200000>;
51 regulator-always-on;
52 };
53
54 sound {
55 compatible = "tq,imx53-mba53-sgtl5000",
56 "fsl,imx-audio-sgtl5000";
57 model = "imx53-mba53-sgtl5000";
58 ssi-controller = <&ssi2>;
59 audio-codec = <&codec>;
60 audio-routing =
61 "MIC_IN", "Mic Jack",
62 "Mic Jack", "Mic Bias",
63 "Headphone Jack", "HP_OUT";
64 mux-int-port = <2>;
65 mux-ext-port = <5>;
66 };
4fa8cf79
SH		 67};
68
69&ldb {
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_lvds1_1>;
72 status = "disabled";
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ST		 73};
74
75&iomuxc {
76 lvds1 {
77 pinctrl_lvds1_1: lvds1-grp1 {
e1641531
SG		 78 fsl,pins = <
79 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x10000
80 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x10000
81 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x10000
82 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x10000
83 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x10000
84 >;
be3a568d
ST		 85 };
86
87 pinctrl_lvds1_2: lvds1-grp2 {
e1641531
SG		 88 fsl,pins = <
89 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x10000
90 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x10000
91 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x10000
92 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x10000
93 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x10000
94 >;
be3a568d
ST		 95 };
96 };
97
98 disp1 {
99 pinctrl_disp1_1: disp1-grp1 {
e1641531
SG		 100 fsl,pins = <
101 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x10000 /* DISP1_DRDY */
102 MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x10000 /* DISP1_HSYNC */
103 MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x10000 /* DISP1_VSYNC */
104 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x10000
105 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x10000
106 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x10000
107 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x10000
108 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x10000
109 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x10000
110 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x10000
111 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x10000
112 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x10000
113 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x10000
114 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x10000
115 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x10000
116 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x10000
117 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x10000
118 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x10000
119 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x10000
120 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x10000
121 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x10000
122 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x10000
123 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x10000
124 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x10000
125 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x10000
126 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x10000
127 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x10000
128 >;
be3a568d
ST		 129 };
130 };
d7db5392
PZ		 131
132 tve {
133 pinctrl_vga_sync_1: vgasync-grp1 {
134 fsl,pins = <
135 /* VGA_VSYNC, HSYNC with max drive strength */
136 MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6
137 MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6
138 >;
139 };
140 };
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ST		 141};
142
143&cspi {
144 status = "okay";
145};
146
eefb8008
MN		 147&audmux {
148 status = "okay";
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_audmux_1>;
151};
152
be3a568d
ST		 153&i2c2 {
154 codec: sgtl5000@a {
155 compatible = "fsl,sgtl5000";
156 reg = <0x0a>;
eefb8008
MN		 157 clocks = <&clks 150>;
158 VDDA-supply = <&reg_3p2v>;
159 VDDIO-supply = <&reg_3p2v>;
be3a568d
ST		 160 };
161
162 expander: pca9554@20 {
163 compatible = "pca9554";
164 reg = <0x20>;
165 interrupts = <109>;
74154be0
MN		 166 #gpio-cells = <2>;
167 gpio-controller;
be3a568d
ST		 168 };
169
170 sensor2: lm75@49 {
171 compatible = "lm75";
172 reg = <0x49>;
173 };
174};
175
176&fec {
177 status = "okay";
178};
179
180&esdhc2 {
181 status = "okay";
182};
183
184&uart3 {
185 status = "okay";
186};
187
188&ecspi1 {
189 status = "okay";
190};
191
3b1a0f23
MO		 192&usbotg {
193 dr_mode = "host";
194 status = "okay";
195};
196
197&usbh1 {
198 status = "okay";
199};
200
be3a568d
ST		 201&uart1 {
202 status = "okay";
203};
204
eefb8008
MN		 205&ssi2 {
206 fsl,mode = "i2s-slave";
207 status = "okay";
208};
209
be3a568d
ST		 210&uart2 {
211 status = "okay";
212};
213
214&can1 {
215 status = "okay";
216};
217
218&can2 {
219 status = "okay";
220};
221
222&i2c3 {
223 status = "okay";
224};
d7db5392
PZ		 225
226&tve {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_vga_sync_1>;
229 ddc = <&i2c3>;
230 fsl,tve-mode = "vga";
231 fsl,hsync-pin = <4>;
232 fsl,vsync-pin = <6>;
233 status = "okay";
234};
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