[deliverable/linux.git] / arch / arm / boot / dts / imx53-tqma53.dtsi

/*
 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "imx53.dtsi"

/ {
	model = "TQ TQMa53";
	compatible = "tq,tqma53", "fsl,imx53";

	memory {
		reg = <0x70000000 0x40000000>; /* Up to 1GiB */
	};

	regulators {
		compatible = "simple-bus";

		reg_3p3v: 3p3v {
			compatible = "regulator-fixed";
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&esdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc2>,
		    <&pinctrl_esdhc2_cdwp>;
	vmmc-supply = <&reg_3p3v>;
	wp-gpios = <&gpio1 2 0>;
	cd-gpios = <&gpio1 4 0>;
	status = "disabled";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "disabled";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	fsl,spi-num-chipselects = <4>;
	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>,
		   <&gpio3 24 0>, <&gpio3 25 0>;
	status = "disabled";
};

&esdhc3 { /* EMMC */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc3>;
	vmmc-supply = <&reg_3p3v>;
	non-removable;
	bus-width = <8>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx53-tqma53 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
				 MX53_PAD_PATA_DA_1__GPIO7_7     0x80000000 /* LCD_BLT_EN */
				 MX53_PAD_PATA_DA_2__GPIO7_8     0x80000000 /* LCD_RESET */
				 MX53_PAD_PATA_DATA5__GPIO2_5    0x80000000 /* LCD_POWER */
				 MX53_PAD_PATA_DATA6__GPIO2_6    0x80000000 /* PMIC_INT */
				 MX53_PAD_PATA_DATA14__GPIO2_14  0x80000000 /* CSI_RST */
				 MX53_PAD_PATA_DATA15__GPIO2_15  0x80000000 /* CSI_PWDN */
				 MX53_PAD_GPIO_19__GPIO4_5 	 0x80000000 /* #SYSTEM_DOWN */
				 MX53_PAD_GPIO_3__GPIO1_3        0x80000000
				 MX53_PAD_PATA_DA_0__GPIO7_6	 0x80000000 /* #PHY_RESET */
				 MX53_PAD_GPIO_1__PWM2_PWMO	 0x80000000 /* LCD_CONTRAST */
			>;
		};

		pinctrl_audmux: audmuxgrp {
			fsl,pins = <
				MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC	0x80000000
				MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD	0x80000000
				MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS	0x80000000
				MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD	0x80000000
			>;
		};

		pinctrl_can1: can1grp {
			fsl,pins = <
				MX53_PAD_KEY_COL2__CAN1_TXCAN		0x80000000
				MX53_PAD_KEY_ROW2__CAN1_RXCAN		0x80000000
			>;
		};

		pinctrl_can2: can2grp {
			fsl,pins = <
				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x80000000
				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x80000000
			>;
		};

		pinctrl_cspi: cspigrp {
			fsl,pins = <
				MX53_PAD_SD1_DATA0__CSPI_MISO		0x1d5
				MX53_PAD_SD1_CMD__CSPI_MOSI		0x1d5
				MX53_PAD_SD1_CLK__CSPI_SCLK		0x1d5
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX53_PAD_EIM_D16__ECSPI1_SCLK		0x80000000
				MX53_PAD_EIM_D17__ECSPI1_MISO		0x80000000
				MX53_PAD_EIM_D18__ECSPI1_MOSI		0x80000000
			>;
		};

		pinctrl_esdhc2: esdhc2grp {
			fsl,pins = <
				MX53_PAD_SD2_CMD__ESDHC2_CMD		0x1d5
				MX53_PAD_SD2_CLK__ESDHC2_CLK		0x1d5
				MX53_PAD_SD2_DATA0__ESDHC2_DAT0		0x1d5
				MX53_PAD_SD2_DATA1__ESDHC2_DAT1		0x1d5
				MX53_PAD_SD2_DATA2__ESDHC2_DAT2		0x1d5
				MX53_PAD_SD2_DATA3__ESDHC2_DAT3		0x1d5
			>;
		};

		pinctrl_esdhc2_cdwp: esdhc2cdwp {
			fsl,pins = <
				MX53_PAD_GPIO_4__GPIO1_4	0x80000000 /* SD2_CD */
				MX53_PAD_GPIO_2__GPIO1_2	0x80000000 /* SD2_WP */
			>;
		};

		pinctrl_esdhc3: esdhc3grp {
			fsl,pins = <
				MX53_PAD_PATA_DATA8__ESDHC3_DAT0	0x1d5
				MX53_PAD_PATA_DATA9__ESDHC3_DAT1	0x1d5
				MX53_PAD_PATA_DATA10__ESDHC3_DAT2	0x1d5
				MX53_PAD_PATA_DATA11__ESDHC3_DAT3	0x1d5
				MX53_PAD_PATA_DATA0__ESDHC3_DAT4	0x1d5
				MX53_PAD_PATA_DATA1__ESDHC3_DAT5	0x1d5
				MX53_PAD_PATA_DATA2__ESDHC3_DAT6	0x1d5
				MX53_PAD_PATA_DATA3__ESDHC3_DAT7	0x1d5
				MX53_PAD_PATA_RESET_B__ESDHC3_CMD	0x1d5
				MX53_PAD_PATA_IORDY__ESDHC3_CLK		0x1d5
			>;
		};

		pinctrl_fec: fecgrp {
			fsl,pins = <
				MX53_PAD_FEC_MDC__FEC_MDC		0x80000000
				MX53_PAD_FEC_MDIO__FEC_MDIO		0x80000000
				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x80000000
				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x80000000
				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x80000000
				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x80000000
				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x80000000
				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x80000000
				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x80000000
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000
				MX53_PAD_KEY_COL3__I2C2_SCL		0xc0000000
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000
				MX53_PAD_GPIO_5__I2C3_SCL		0xc0000000
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4
				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4
				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
			>;
		};
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	fsl,uart-has-rtscts;
	status = "disabled";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "disabled";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "disabled";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	status = "disabled";
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "disabled";
};

&cspi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cspi>;
	fsl,spi-num-chipselects = <3>;
	cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>,
		   <&gpio1 21 0>;
	status = "disabled";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic: mc34708@8 {
		compatible = "fsl,mc34708";
		reg = <0x8>;
		fsl,mc13xxx-uses-rtc;
		interrupt-parent = <&gpio2>;
		interrupts = <6 4>; /* PATA_DATA6, active high */
	};

	sensor1: lm75@48 {
		compatible = "lm75";
		reg = <0x48>;
	};

	eeprom: 24c64@50 {
		compatible = "at,24c64";
		pagesize = <32>;
		reg = <0x50>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec>;
	phy-mode = "rmii";
	status = "disabled";
};
Commit	Line	Data
b17d5169 SH	1	/*
	2	* Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
	3	* Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
36dffd8f	13	#include "imx53.dtsi"
b17d5169 SH	14
	15	/ {
	16	model = "TQ TQMa53";
	17	compatible = "tq,tqma53", "fsl,imx53";
	18
	19	memory {
	20	reg = <0x70000000 0x40000000>; /* Up to 1GiB */
	21	};
	22
	23	regulators {
	24	compatible = "simple-bus";
	25
	26	reg_3p3v: 3p3v {
	27	compatible = "regulator-fixed";
	28	regulator-name = "3P3V";
	29	regulator-min-microvolt = <3300000>;
	30	regulator-max-microvolt = <3300000>;
	31	regulator-always-on;
	32	};
	33	};
	34	};
	35
	36	&esdhc2 {
	37	pinctrl-names = "default";
7ac0f700 SG	38	pinctrl-0 = <&pinctrl_esdhc2>,
7ac0f700 SG	39	<&pinctrl_esdhc2_cdwp>;
1cbf45e4	40	vmmc-supply = <&reg_3p3v>;
b17d5169 SH	41	wp-gpios = <&gpio1 2 0>;
	42	cd-gpios = <&gpio1 4 0>;
	43	status = "disabled";
	44	};
	45
	46	&uart3 {
	47	pinctrl-names = "default";
7ac0f700	48	pinctrl-0 = <&pinctrl_uart3>;
b17d5169 SH	49	status = "disabled";
	50	};
	51
	52	&ecspi1 {
	53	pinctrl-names = "default";
7ac0f700	54	pinctrl-0 = <&pinctrl_ecspi1>;
b17d5169 SH	55	fsl,spi-num-chipselects = <4>;
	56	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>,
	57	<&gpio3 24 0>, <&gpio3 25 0>;
	58	status = "disabled";
	59	};
	60
	61	&esdhc3 { /* EMMC */
	62	pinctrl-names = "default";
7ac0f700	63	pinctrl-0 = <&pinctrl_esdhc3>;
b17d5169 SH	64	vmmc-supply = <&reg_3p3v>;
	65	non-removable;
	66	bus-width = <8>;
	67	status = "okay";
	68	};
	69
	70	&iomuxc {
	71	pinctrl-names = "default";
	72	pinctrl-0 = <&pinctrl_hog>;
	73
7ac0f700	74	imx53-tqma53 {
b17d5169 SH	75	pinctrl_hog: hoggrp {
b17d5169 SH	76	fsl,pins = <
ce2c243c	77	MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
87bcb12b PZ	78	MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */
	79	MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */
	80	MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */
	81	MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 /* PMIC_INT */
	82	MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 /* CSI_RST */
	83	MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 /* CSI_PWDN */
ce2c243c	84	MX53_PAD_GPIO_19__GPIO4_5 0x80000000 /* #SYSTEM_DOWN */
87bcb12b	85	MX53_PAD_GPIO_3__GPIO1_3 0x80000000
ce2c243c PZ	86	MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */
ce2c243c PZ	87	MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 /* LCD_CONTRAST */
b17d5169 SH	88	>;
b17d5169 SH	89	};
7ac0f700 SG	90
	91	pinctrl_audmux: audmuxgrp {
	92	fsl,pins = <
	93	MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
	94	MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
	95	MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
	96	MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
	97	>;
	98	};
	99
	100	pinctrl_can1: can1grp {
	101	fsl,pins = <
	102	MX53_PAD_KEY_COL2__CAN1_TXCAN 0x80000000
	103	MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x80000000
	104	>;
	105	};
	106
	107	pinctrl_can2: can2grp {
	108	fsl,pins = <
	109	MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
	110	MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
	111	>;
	112	};
	113
	114	pinctrl_cspi: cspigrp {
	115	fsl,pins = <
	116	MX53_PAD_SD1_DATA0__CSPI_MISO 0x1d5
	117	MX53_PAD_SD1_CMD__CSPI_MOSI 0x1d5
	118	MX53_PAD_SD1_CLK__CSPI_SCLK 0x1d5
	119	>;
	120	};
	121
	122	pinctrl_ecspi1: ecspi1grp {
	123	fsl,pins = <
	124	MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
	125	MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
	126	MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
	127	>;
	128	};
	129
	130	pinctrl_esdhc2: esdhc2grp {
	131	fsl,pins = <
	132	MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
	133	MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
	134	MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
	135	MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
	136	MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
	137	MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
	138	>;
	139	};
	140
	141	pinctrl_esdhc2_cdwp: esdhc2cdwp {
	142	fsl,pins = <
	143	MX53_PAD_GPIO_4__GPIO1_4 0x80000000 /* SD2_CD */
	144	MX53_PAD_GPIO_2__GPIO1_2 0x80000000 /* SD2_WP */
	145	>;
	146	};
	147
	148	pinctrl_esdhc3: esdhc3grp {
	149	fsl,pins = <
	150	MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
	151	MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
	152	MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
	153	MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
154	MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
155	MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
156	MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
157	MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
158	MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
159	MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
160	>;
161	};
162
163	pinctrl_fec: fecgrp {
164	fsl,pins = <
165	MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
166	MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
167	MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
168	MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
169	MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
170	MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
171	MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
172	MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
173	MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
174	MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
175	>;
176	};
177
178	pinctrl_i2c2: i2c2grp {
179	fsl,pins = <
180	MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
181	MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
182	>;
183	};
184
185	pinctrl_i2c3: i2c3grp {
186	fsl,pins = <
187	MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
188	MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
189	>;
190	};
191
192	pinctrl_uart1: uart1grp {
193	fsl,pins = <
194	MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
195	MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
196	>;
197	};
198
199	pinctrl_uart2: uart2grp {
200	fsl,pins = <
201	MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
202	MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
203	>;
204	};
205
206	pinctrl_uart3: uart3grp {
207	fsl,pins = <
208	MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
209	MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
210	>;
211	};
b17d5169 SH	212	};
	213	};
	214
	215	&uart1 {
	216	pinctrl-names = "default";
7ac0f700	217	pinctrl-0 = <&pinctrl_uart1>;
b17d5169 SH	218	fsl,uart-has-rtscts;
	219	status = "disabled";
	220	};
	221
	222	&uart2 {
	223	pinctrl-names = "default";
7ac0f700	224	pinctrl-0 = <&pinctrl_uart2>;
b17d5169 SH	225	status = "disabled";
	226	};
	227
	228	&can1 {
	229	pinctrl-names = "default";
7ac0f700	230	pinctrl-0 = <&pinctrl_can1>;
b17d5169 SH	231	status = "disabled";
	232	};
	233
	234	&can2 {
	235	pinctrl-names = "default";
7ac0f700	236	pinctrl-0 = <&pinctrl_can2>;
b17d5169 SH	237	status = "disabled";
	238	};
	239
	240	&i2c3 {
	241	pinctrl-names = "default";
7ac0f700	242	pinctrl-0 = <&pinctrl_i2c3>;
b17d5169 SH	243	status = "disabled";
	244	};
	245
	246	&cspi {
	247	pinctrl-names = "default";
7ac0f700	248	pinctrl-0 = <&pinctrl_cspi>;
b17d5169 SH	249	fsl,spi-num-chipselects = <3>;
	250	cs-gpios = <&gpio1 18 0>, <&gpio1 19 0>,
	251	<&gpio1 21 0>;
	252	status = "disabled";
	253	};
	254
	255	&i2c2 {
	256	pinctrl-names = "default";
7ac0f700	257	pinctrl-0 = <&pinctrl_i2c2>;
b17d5169 SH	258	status = "okay";
	259
	260	pmic: mc34708@8 {
	261	compatible = "fsl,mc34708";
	262	reg = <0x8>;
	263	fsl,mc13xxx-uses-rtc;
	264	interrupt-parent = <&gpio2>;
1aa6f57d	265	interrupts = <6 4>; /* PATA_DATA6, active high */
b17d5169 SH	266	};
	267
	268	sensor1: lm75@48 {
	269	compatible = "lm75";
	270	reg = <0x48>;
	271	};
	272
	273	eeprom: 24c64@50 {
	274	compatible = "at,24c64";
	275	pagesize = <32>;
	276	reg = <0x50>;
	277	};
	278	};
	279
	280	&fec {
	281	pinctrl-names = "default";
7ac0f700	282	pinctrl-0 = <&pinctrl_fec>;
b17d5169 SH	283	phy-mode = "rmii";
	284	status = "disabled";
	285	};