[deliverable/linux.git] / arch / arm / boot / dts / imx6q-tbs2910.dts

/*
 * Copyright 2014 Soeren Moch <smoch@web.de>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of
 *     the License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 *     You should have received a copy of the GNU General Public
 *     License along with this file; if not, write to the Free
 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
 *     MA 02110-1301 USA
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include "imx6q.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "TBS2910 Matrix ARM mini PC";
	compatible = "tbs,imx6q-tbs2910", "fsl,imx6q";

	chosen {
		stdout-path = &uart1;
	};

	memory {
		reg = <0x10000000 0x80000000>;
	};

	fan {
		compatible = "gpio-fan";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_fan>;
		gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <0    0
				      3000 1>;
	};

	ir_recv {
		compatible = "gpio-ir-receiver";
		gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ir>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		blue {
			label = "blue_status_led";
			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_2p5v: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
		};

		reg_3p3v: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
		};

		reg_5p0v: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "5P0V";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
		};
	};

	sound-sgtl5000 {
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		compatible = "fsl,imx-audio-sgtl5000";
		model = "On-board Codec";
		mux-ext-port = <3>;
		mux-int-port = <1>;
		ssi-controller = <&ssi1>;
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "On-board SPDIF";
		spdif-controller = <&spdif>;
		spdif-out;
	};
};

&audmux {
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	sgtl5000: sgtl5000@0a {
		clocks = <&clks 201>;
		compatible = "fsl,sgtl5000";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sgtl5000>;
		reg = <0x0a>;
		VDDA-supply = <&reg_2p5v>;
		VDDIO-supply = <&reg_3p3v>;
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	rtc: ds1307@68 {
		compatible = "dallas,ds1307";
		reg = <0x68>;
	};
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie>;
	reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&sata {
	fsl,transmit-level-mV = <1104>;
	fsl,transmit-boost-mdB = <3330>;
	fsl,transmit-atten-16ths = <16>;
	fsl,receive-eq-mdB = <3000>;
	status = "okay";
};

&snvs_poweroff {
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "okay";
};

&ssi1 {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_5p0v>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_5p0v>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <4>;
	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&usdhc4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc4>;
	bus-width = <8>;
	non-removable;
	no-1-8-v;
	status = "okay";
};

&iomuxc {
	imx6q-tbs2910 {
		pinctrl_enet: enetgrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
				MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
				MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
				MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
				MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
				MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
				MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
				MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
				MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
				MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
				MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK      0x4001b0a8
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25    0x1b059
			>;
		};

		pinctrl_hdmi: hdmigrp {
			fsl,pins = <
				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL        0x4001b8b1
				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA        0x4001b8b1
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6QDL_PAD_KEY_COL3__I2C2_SCL         0x4001b8b1
				MX6QDL_PAD_KEY_ROW3__I2C2_SDA         0x4001b8b1
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_3__I2C3_SCL           0x4001b8b1
				MX6QDL_PAD_GPIO_6__I2C3_SDA           0x4001b8b1
			>;
		};

		pinctrl_ir: irgrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D18__GPIO3_IO18        0x17059
			>;
		};

		pinctrl_pcie: pciegrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_17__GPIO7_IO12        0x17059
			>;
		};

		pinctrl_sgtl5000: sgtl5000grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD        0x130b0
				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC        0x130b0
				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD        0x110b0
				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS       0x130b0
				MX6QDL_PAD_GPIO_0__CCM_CLKO1          0x130b0
			>;
		};

		pinctrl_spdif: spdifgrp {
			fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT     0x13091
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA  0x1b0b1
				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA  0x1b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D26__UART2_TX_DATA     0x1b0b1
				MX6QDL_PAD_EIM_D27__UART2_RX_DATA     0x1b0b1
			>;
		};

		pinctrl_usbotg: usbotggrp {
			fsl,pins = <
				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID     0x17059
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6QDL_PAD_SD2_CMD__SD2_CMD           0x17059
				MX6QDL_PAD_SD2_CLK__SD2_CLK           0x10059
				MX6QDL_PAD_SD2_DAT0__SD2_DATA0        0x17059
				MX6QDL_PAD_SD2_DAT1__SD2_DATA1        0x17059
				MX6QDL_PAD_SD2_DAT2__SD2_DATA2        0x17059
				MX6QDL_PAD_SD2_DAT3__SD2_DATA3        0x17059
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02       0x17059
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6QDL_PAD_SD3_CMD__SD3_CMD           0x17059
				MX6QDL_PAD_SD3_CLK__SD3_CLK           0x10059
				MX6QDL_PAD_SD3_DAT0__SD3_DATA0        0x17059
				MX6QDL_PAD_SD3_DAT1__SD3_DATA1        0x17059
				MX6QDL_PAD_SD3_DAT2__SD3_DATA2        0x17059
				MX6QDL_PAD_SD3_DAT3__SD3_DATA3        0x17059
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00       0x17059
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01       0x17059
			>;
		};

		pinctrl_usdhc4: usdhc4grp {
			fsl,pins = <
				MX6QDL_PAD_SD4_CMD__SD4_CMD           0x17059
				MX6QDL_PAD_SD4_CLK__SD4_CLK           0x10059
				MX6QDL_PAD_SD4_DAT0__SD4_DATA0        0x17059
				MX6QDL_PAD_SD4_DAT1__SD4_DATA1        0x17059
				MX6QDL_PAD_SD4_DAT2__SD4_DATA2        0x17059
				MX6QDL_PAD_SD4_DAT3__SD4_DATA3        0x17059
				MX6QDL_PAD_SD4_DAT4__SD4_DATA4        0x17059
				MX6QDL_PAD_SD4_DAT5__SD4_DATA5        0x17059
				MX6QDL_PAD_SD4_DAT6__SD4_DATA6        0x17059
				MX6QDL_PAD_SD4_DAT7__SD4_DATA7        0x17059
			>;
		};
	};

	gpio_fan {
		pinctrl_gpio_fan: gpiofangrp {
			fsl,pins = <
				MX6QDL_PAD_EIM_D28__GPIO3_IO28        0x130b1
			>;
		};
	};

	gpio_leds {
		pinctrl_gpio_leds: gpioledsgrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_2__GPIO1_IO02         0x130b1
			>;
		};
	};
};
Commit	Line	Data
52bc3462 SM	1	/*
	2	* Copyright 2014 Soeren Moch <smoch@web.de>
	3	*
	4	* This file is dual-licensed: you can use it either under the terms
	5	* of the GPL or the X11 license, at your option. Note that this dual
	6	* licensing only applies to this file, and not this project as a
	7	* whole.
	8	*
	9	* a) This file is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This file is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public
	20	* License along with this file; if not, write to the Free
	21	* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
	22	* MA 02110-1301 USA
	23	*
	24	* Or, alternatively,
	25	*
	26	* b) Permission is hereby granted, free of charge, to any person
	27	* obtaining a copy of this software and associated documentation
	28	* files (the "Software"), to deal in the Software without
	29	* restriction, including without limitation the rights to use,
	30	* copy, modify, merge, publish, distribute, sublicense, and/or
	31	* sell copies of the Software, and to permit persons to whom the
	32	* Software is furnished to do so, subject to the following
	33	* conditions:
	34	*
	35	* The above copyright notice and this permission notice shall be
	36	* included in all copies or substantial portions of the Software.
	37	*
	38	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	39	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	40	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	41	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	42	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	43	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	44	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	45	* OTHER DEALINGS IN THE SOFTWARE.
	46	*/
	47
	48	/dts-v1/;
	49
	50	#include "imx6q.dtsi"
	51	#include <dt-bindings/gpio/gpio.h>
	52	#include <dt-bindings/input/input.h>
	53
	54	/ {
	55	model = "TBS2910 Matrix ARM mini PC";
	56	compatible = "tbs,imx6q-tbs2910", "fsl,imx6q";
	57
	58	chosen {
	59	stdout-path = &uart1;
	60	};
	61
	62	memory {
	63	reg = <0x10000000 0x80000000>;
	64	};
65
66	fan {
67	compatible = "gpio-fan";
68	pinctrl-names = "default";
69	pinctrl-0 = <&pinctrl_gpio_fan>;
70	gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
71	gpio-fan,speed-map = <0 0
72	3000 1>;
73	};
74
75	ir_recv {
76	compatible = "gpio-ir-receiver";
77	gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
78	pinctrl-names = "default";
79	pinctrl-0 = <&pinctrl_ir>;
80	};
81
82	leds {
83	compatible = "gpio-leds";
84	pinctrl-names = "default";
85	pinctrl-0 = <&pinctrl_gpio_leds>;
86
87	blue {
88	label = "blue_status_led";
89	gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
90	default-state = "keep";
91	};
92	};
93
94	regulators {
95	compatible = "simple-bus";
96	#address-cells = <1>;
97	#size-cells = <0>;
98
99	reg_2p5v: regulator@0 {
100	compatible = "regulator-fixed";
101	reg = <0>;
102	regulator-name = "2P5V";
103	regulator-min-microvolt = <2500000>;
104	regulator-max-microvolt = <2500000>;
105	};
106
107	reg_3p3v: regulator@1 {
108	compatible = "regulator-fixed";
109	reg = <1>;
110	regulator-name = "3P3V";
111	regulator-min-microvolt = <3300000>;
112	regulator-max-microvolt = <3300000>;
113	};
114
115	reg_5p0v: regulator@2 {
116	compatible = "regulator-fixed";
117	reg = <2>;
118	regulator-name = "5P0V";
119	regulator-min-microvolt = <5000000>;
120	regulator-max-microvolt = <5000000>;
121	};
122	};
123
124	sound-sgtl5000 {
125	audio-codec = <&sgtl5000>;
126	audio-routing =
127	"MIC_IN", "Mic Jack",
128	"Mic Jack", "Mic Bias",
129	"Headphone Jack", "HP_OUT";
130	compatible = "fsl,imx-audio-sgtl5000";
131	model = "On-board Codec";
132	mux-ext-port = <3>;
133	mux-int-port = <1>;
134	ssi-controller = <&ssi1>;
135	};
136
137	sound-spdif {
138	compatible = "fsl,imx-audio-spdif";
139	model = "On-board SPDIF";
140	spdif-controller = <&spdif>;
141	spdif-out;
142	};
143	};
144
145	&audmux {
146	status = "okay";
147	};
148
149	&fec {
150	pinctrl-names = "default";
151	pinctrl-0 = <&pinctrl_enet>;
152	phy-mode = "rgmii";
153	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
154	status = "okay";
155	};
156
157	&hdmi {
158	pinctrl-names = "default";
159	pinctrl-0 = <&pinctrl_hdmi>;
160	ddc-i2c-bus = <&i2c2>;
161	status = "okay";
162	};
163
164	&i2c1 {
165	clock-frequency = <100000>;
166	pinctrl-names = "default";
167	pinctrl-0 = <&pinctrl_i2c1>;
168	status = "okay";
169
170	sgtl5000: sgtl5000@0a {
171	clocks = <&clks 201>;
172	compatible = "fsl,sgtl5000";
173	pinctrl-names = "default";
174	pinctrl-0 = <&pinctrl_sgtl5000>;
175	reg = <0x0a>;
176	VDDA-supply = <&reg_2p5v>;
177	VDDIO-supply = <&reg_3p3v>;
178	};
179	};
180
181	&i2c2 {
182	clock-frequency = <100000>;
183	pinctrl-names = "default";
184	pinctrl-0 = <&pinctrl_i2c2>;
185	status = "okay";
186	};
187
188	&i2c3 {
189	clock-frequency = <100000>;
190	pinctrl-names = "default";
191	pinctrl-0 = <&pinctrl_i2c3>;
192	status = "okay";
193
194	rtc: ds1307@68 {
195	compatible = "dallas,ds1307";
196	reg = <0x68>;
197	};
198	};
199
200	&pcie {
201	pinctrl-names = "default";
202	pinctrl-0 = <&pinctrl_pcie>;
203	reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
204	status = "okay";
205	};
206
207	&sata {
c2f303c2 SM	208	fsl,transmit-level-mV = <1104>;
	209	fsl,transmit-boost-mdB = <3330>;
	210	fsl,transmit-atten-16ths = <16>;
	211	fsl,receive-eq-mdB = <3000>;
52bc3462 SM	212	status = "okay";
	213	};
	214
96acf9df SM	215	&snvs_poweroff {
	216	status = "okay";
	217	};
	218
52bc3462 SM	219	&spdif {
	220	pinctrl-names = "default";
	221	pinctrl-0 = <&pinctrl_spdif>;
	222	status = "okay";
	223	};
	224
	225	&ssi1 {
52bc3462 SM	226	status = "okay";
	227	};
	228
	229	&uart1 {
	230	pinctrl-names = "default";
	231	pinctrl-0 = <&pinctrl_uart1>;
	232	status = "okay";
	233	};
	234
	235	&uart2 {
	236	pinctrl-names = "default";
	237	pinctrl-0 = <&pinctrl_uart2>;
	238	status = "okay";
	239	};
	240
	241	&usbh1 {
	242	vbus-supply = <&reg_5p0v>;
	243	status = "okay";
	244	};
	245
	246	&usbotg {
	247	vbus-supply = <&reg_5p0v>;
	248	pinctrl-names = "default";
	249	pinctrl-0 = <&pinctrl_usbotg>;
	250	disable-over-current;
	251	status = "okay";
	252	};
	253
	254	&usdhc2 {
	255	pinctrl-names = "default";
	256	pinctrl-0 = <&pinctrl_usdhc2>;
	257	bus-width = <4>;
89c1a8cf	258	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
52bc3462 SM	259	vmmc-supply = <&reg_3p3v>;
	260	status = "okay";
	261	};
	262
	263	&usdhc3 {
	264	pinctrl-names = "default";
	265	pinctrl-0 = <&pinctrl_usdhc3>;
	266	bus-width = <4>;
89c1a8cf	267	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
52bc3462 SM	268	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	269	vmmc-supply = <&reg_3p3v>;
	270	status = "okay";
	271	};
	272
	273	&usdhc4 {
	274	pinctrl-names = "default";
	275	pinctrl-0 = <&pinctrl_usdhc4>;
	276	bus-width = <8>;
	277	non-removable;
	278	no-1-8-v;
	279	status = "okay";
	280	};
	281
	282	&iomuxc {
	283	imx6q-tbs2910 {
	284	pinctrl_enet: enetgrp {
	285	fsl,pins = <
	286	MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
	287	MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	288	MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
	289	MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
	290	MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
	291	MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
	292	MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
	293	MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
	294	MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
	295	MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
	296	MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
	297	MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
	298	MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
	299	MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
	300	MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
	301	MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	302	MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
	303	>;
	304	};
	305
	306	pinctrl_hdmi: hdmigrp {
	307	fsl,pins = <
	308	MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
	309	>;
	310	};
	311
	312	pinctrl_i2c1: i2c1grp {
	313	fsl,pins = <
	314	MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
	315	MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
	316	>;
	317	};
	318
	319	pinctrl_i2c2: i2c2grp {
	320	fsl,pins = <
	321	MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
	322	MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
	323	>;
	324	};
	325
	326	pinctrl_i2c3: i2c3grp {
	327	fsl,pins = <
	328	MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
	329	MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
	330	>;
	331	};
332
333	pinctrl_ir: irgrp {
334	fsl,pins = <
335	MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059
336	>;
337	};
338
339	pinctrl_pcie: pciegrp {
340	fsl,pins = <
341	MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
342	>;
343	};
344
345	pinctrl_sgtl5000: sgtl5000grp {
346	fsl,pins = <
347	MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
348	MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
349	MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
350	MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
351	MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
352	>;
353	};
354
355	pinctrl_spdif: spdifgrp {
356	fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
357	>;
358	};
359
360	pinctrl_uart1: uart1grp {
361	fsl,pins = <
362	MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
363	MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
364	>;
365	};
366
367	pinctrl_uart2: uart2grp {
368	fsl,pins = <
369	MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
370	MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
371	>;
372	};
373
374	pinctrl_usbotg: usbotggrp {
375	fsl,pins = <
376	MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
377	>;
378	};
379
380	pinctrl_usdhc2: usdhc2grp {
381	fsl,pins = <
382	MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
383	MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
384	MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
385	MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
386	MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
387	MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
388	MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059
389	>;
390	};
391
392	pinctrl_usdhc3: usdhc3grp {
393	fsl,pins = <
394	MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
395	MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
396	MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
397	MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
398	MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
399	MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
400	MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059
401	MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059
402	>;
403	};
404
405	pinctrl_usdhc4: usdhc4grp {
406	fsl,pins = <
407	MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
408	MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
409	MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
410	MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
411	MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
412	MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
413	MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
414	MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
415	MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
416	MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
417	>;
418	};
419	};
420
421	gpio_fan {
422	pinctrl_gpio_fan: gpiofangrp {
423	fsl,pins = <
424	MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1
425	>;
426	};
427	};
428
429	gpio_leds {
430	pinctrl_gpio_leds: gpioledsgrp {
431	fsl,pins = <
432	MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1
433	>;
434	};
435	};
436	};