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ARM: dts: imx: ventana: remove unused aliases
[deliverable/linux.git] / arch / arm / boot / dts / imx6qdl-gw53xx.dtsi
CommitLineData
e3946fe8
TH		 1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 /* these are used by bootloader for disabling nodes */
14 aliases {
e3946fe8
TH		 15 ethernet1 = &eth1;
16 led0 = &led0;
17 led1 = &led1;
18 led2 = &led2;
19 nand = &gpmi;
e3946fe8
TH		 20 ssi0 = &ssi1;
21 usb0 = &usbh1;
22 usb1 = &usbotg;
e3946fe8
TH		 23 };
24
25 chosen {
26 bootargs = "console=ttymxc1,115200";
27 };
28
b3253241
TH		 29 backlight {
30 compatible = "pwm-backlight";
31 pwms = <&pwm4 0 5000000>;
32 brightness-levels = <0 4 8 16 32 64 128 255>;
33 default-brightness-level = <7>;
34 };
35
e3946fe8
TH		 36 leds {
37 compatible = "gpio-leds";
38
39 led0: user1 {
40 label = "user1";
41 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
42 default-state = "on";
43 linux,default-trigger = "heartbeat";
44 };
45
46 led1: user2 {
47 label = "user2";
48 gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
49 default-state = "off";
50 };
51
52 led2: user3 {
53 label = "user3";
54 gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
55 default-state = "off";
56 };
57 };
58
59 memory {
60 reg = <0x10000000 0x40000000>;
61 };
62
63 pps {
64 compatible = "pps-gpio";
65 gpios = <&gpio1 26 0>;
66 status = "okay";
67 };
68
69 regulators {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <0>;
73
74 reg_1p0v: regulator@0 {
75 compatible = "regulator-fixed";
76 reg = <0>;
77 regulator-name = "1P0V";
78 regulator-min-microvolt = <1000000>;
79 regulator-max-microvolt = <1000000>;
80 regulator-always-on;
81 };
82
83 /* remove when pmic 1p8 regulator available */
84 reg_1p8v: regulator@1 {
85 compatible = "regulator-fixed";
86 reg = <1>;
87 regulator-name = "1P8V";
88 regulator-min-microvolt = <1800000>;
89 regulator-max-microvolt = <1800000>;
90 regulator-always-on;
91 };
92
93 reg_3p3v: regulator@2 {
94 compatible = "regulator-fixed";
95 reg = <2>;
96 regulator-name = "3P3V";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 regulator-always-on;
100 };
101
102 reg_usb_h1_vbus: regulator@3 {
103 compatible = "regulator-fixed";
104 reg = <3>;
105 regulator-name = "usb_h1_vbus";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
108 regulator-always-on;
109 };
110
111 reg_usb_otg_vbus: regulator@4 {
112 compatible = "regulator-fixed";
113 reg = <4>;
114 regulator-name = "usb_otg_vbus";
115 regulator-min-microvolt = <5000000>;
116 regulator-max-microvolt = <5000000>;
117 gpio = <&gpio3 22 0>;
118 enable-active-high;
119 };
120 };
121
122 sound {
b12d1e94 123 compatible = "fsl,imx6q-ventana-sgtl5000",
e3946fe8 124 "fsl,imx-audio-sgtl5000";
b12d1e94 125 model = "sgtl5000-audio";
e3946fe8
TH		 126 ssi-controller = <&ssi1>;
127 audio-codec = <&codec>;
128 audio-routing =
129 "MIC_IN", "Mic Jack",
130 "Mic Jack", "Mic Bias",
131 "Headphone Jack", "HP_OUT";
132 mux-int-port = <1>;
133 mux-ext-port = <4>;
134 };
135};
136
137&audmux {
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_audmux>;
140 status = "okay";
141};
142
143&can1 {
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_flexcan1>;
146 status = "okay";
147};
148
149&fec {
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_enet>;
152 phy-mode = "rgmii";
153 phy-reset-gpios = <&gpio1 30 0>;
154 status = "okay";
155};
156
157&gpmi {
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_gpmi_nand>;
160 status = "okay";
161};
162
aef15dba
TH		 163&hdmi {
164 ddc-i2c-bus = <&i2c3>;
165 status = "okay";
166};
167
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TH		 168&i2c1 {
169 clock-frequency = <100000>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_i2c1>;
172 status = "okay";
173
174 eeprom1: eeprom@50 {
175 compatible = "atmel,24c02";
176 reg = <0x50>;
177 pagesize = <16>;
178 };
179
180 eeprom2: eeprom@51 {
181 compatible = "atmel,24c02";
182 reg = <0x51>;
183 pagesize = <16>;
184 };
185
186 eeprom3: eeprom@52 {
187 compatible = "atmel,24c02";
188 reg = <0x52>;
189 pagesize = <16>;
190 };
191
192 eeprom4: eeprom@53 {
193 compatible = "atmel,24c02";
194 reg = <0x53>;
195 pagesize = <16>;
196 };
197
198 gpio: pca9555@23 {
199 compatible = "nxp,pca9555";
200 reg = <0x23>;
201 gpio-controller;
202 #gpio-cells = <2>;
203 };
204
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TH		 205 rtc: ds1672@68 {
206 compatible = "dallas,ds1672";
207 reg = <0x68>;
208 };
209};
210
211&i2c2 {
212 clock-frequency = <100000>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_i2c2>;
215 status = "okay";
e3946fe8
TH		 216};
217
218&i2c3 {
219 clock-frequency = <100000>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_i2c3>;
222 status = "okay";
223
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TH		 224 codec: sgtl5000@0a {
225 compatible = "fsl,sgtl5000";
226 reg = <0x0a>;
227 clocks = <&clks 201>;
228 VDDA-supply = <&reg_1p8v>;
229 VDDIO-supply = <&reg_3p3v>;
230 };
231
e3946fe8
TH		 232 touchscreen: egalax_ts@04 {
233 compatible = "eeti,egalax_ts";
234 reg = <0x04>;
235 interrupt-parent = <&gpio1>;
236 interrupts = <11 2>; /* gpio1_11 active low */
237 wakeup-gpios = <&gpio1 11 0>;
238 };
e3946fe8
TH		 239};
240
241&iomuxc {
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_hog>;
244
245 imx6qdl-gw53xx {
246 pinctrl_hog: hoggrp {
247 fsl,pins = <
248 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
249 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
250 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
251 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
252 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
253 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
254 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
255 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
256 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
257 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
258 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
259 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
260 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
261 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
262 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
263 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
264 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
265 MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
266 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
267 >;
268 };
269
270 pinctrl_audmux: audmuxgrp {
271 fsl,pins = <
272 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
273 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
274 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
275 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
276 >;
277 };
278
279 pinctrl_enet: enetgrp {
280 fsl,pins = <
281 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
282 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
283 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
284 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
285 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
286 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
287 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
288 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
289 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
290 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
291 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
292 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
293 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
294 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
295 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
296 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
297 >;
298 };
299
300 pinctrl_flexcan1: flexcan1grp {
301 fsl,pins = <
302 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
303 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
304 >;
305 };
306
307 pinctrl_gpmi_nand: gpminandgrp {
308 fsl,pins = <
309 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
310 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
311 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
312 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
313 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
314 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
315 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
316 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
317 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
318 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
319 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
320 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
321 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
322 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
323 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
324 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
325 >;
326 };
327
328 pinctrl_i2c1: i2c1grp {
329 fsl,pins = <
330 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
331 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
332 >;
333 };
334
335 pinctrl_i2c2: i2c2grp {
336 fsl,pins = <
337 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
338 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
339 >;
340 };
341
342 pinctrl_i2c3: i2c3grp {
343 fsl,pins = <
344 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
345 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
346 >;
347 };
348
b3253241
TH		 349 pinctrl_pwm4: pwm4grp {
350 fsl,pins = <
351 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
352 >;
353 };
354
e3946fe8
TH		 355 pinctrl_uart1: uart1grp {
356 fsl,pins = <
357 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
358 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
359 >;
360 };
361
362 pinctrl_uart2: uart2grp {
363 fsl,pins = <
364 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
365 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
366 >;
367 };
368
369 pinctrl_uart5: uart5grp {
370 fsl,pins = <
371 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
372 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
373 >;
374 };
375
376 pinctrl_usbotg: usbotggrp {
377 fsl,pins = <
378 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
379 >;
380 };
381
382 pinctrl_usdhc3: usdhc3grp {
383 fsl,pins = <
384 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
385 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
386 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
387 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
388 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
389 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
390 >;
391 };
392 };
393};
394
395&ldb {
396 status = "okay";
397
398 lvds-channel@1 {
399 fsl,data-mapping = "spwg";
400 fsl,data-width = <18>;
401 status = "okay";
402
403 display-timings {
404 native-mode = <&timing0>;
405 timing0: hsd100pxn1 {
406 clock-frequency = <65000000>;
407 hactive = <1024>;
408 vactive = <768>;
409 hback-porch = <220>;
410 hfront-porch = <40>;
411 vback-porch = <21>;
412 vfront-porch = <7>;
413 hsync-len = <60>;
414 vsync-len = <10>;
415 };
416 };
417 };
418};
419
420&pcie {
421 reset-gpio = <&gpio1 29 0>;
422 status = "okay";
423
424 eth1: sky2@8 { /* MAC/PHY on bus 8 */
425 compatible = "marvell,sky2";
426 };
427};
428
b3253241
TH		 429&pwm4 {
430 pinctrl-names = "default";
431 pinctrl-0 = <&pinctrl_pwm4>;
432 status = "okay";
433};
434
e3946fe8 435&ssi1 {
e3946fe8
TH		 436 status = "okay";
437};
438
439&uart1 {
440 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_uart1>;
442 status = "okay";
443};
444
445&uart2 {
446 pinctrl-names = "default";
447 pinctrl-0 = <&pinctrl_uart2>;
448 status = "okay";
449};
450
451&uart5 {
452 pinctrl-names = "default";
453 pinctrl-0 = <&pinctrl_uart5>;
454 status = "okay";
455};
456
457&usbotg {
458 vbus-supply = <&reg_usb_otg_vbus>;
459 pinctrl-names = "default";
460 pinctrl-0 = <&pinctrl_usbotg>;
461 disable-over-current;
462 status = "okay";
463};
464
465&usbh1 {
466 vbus-supply = <&reg_usb_h1_vbus>;
467 status = "okay";
468};
469
470&usdhc3 {
471 pinctrl-names = "default";
472 pinctrl-0 = <&pinctrl_usdhc3>;
473 cd-gpios = <&gpio7 0 0>;
474 vmmc-supply = <&reg_3p3v>;
475 status = "okay";
476};
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