[deliverable/linux.git] / arch / arm / boot / dts / imx6qdl-sabresd.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/ {
	memory {
		reg = <0x10000000 0x40000000>;
	};

	regulators {
		compatible = "simple-bus";

		reg_usb_otg_vbus: usb_otg_vbus {
			compatible = "regulator-fixed";
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 0>;
			enable-active-high;
		};

		reg_usb_h1_vbus: usb_h1_vbus {
			compatible = "regulator-fixed";
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio1 29 0>;
			enable-active-high;
		};

		reg_audio: wm8962_supply {
			compatible = "regulator-fixed";
			regulator-name = "wm8962-supply";
			gpio = <&gpio4 10 0>;
			enable-active-high;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		volume-up {
			label = "Volume Up";
			gpios = <&gpio1 4 0>;
			gpio-key,wakeup;
			linux,code = <115>; /* KEY_VOLUMEUP */
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio1 5 0>;
			gpio-key,wakeup;
			linux,code = <114>; /* KEY_VOLUMEDOWN */
		};
	};

	sound {
		compatible = "fsl,imx6q-sabresd-wm8962",
			   "fsl,imx-audio-wm8962";
		model = "wm8962-audio";
		ssi-controller = <&ssi2>;
		audio-codec = <&codec>;
		audio-routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"Ext Spk", "SPKOUTL",
			"Ext Spk", "SPKOUTR",
			"MICBIAS", "AMIC",
			"IN3R", "MICBIAS",
			"DMIC", "MICBIAS",
			"DMICDAT", "DMIC";
		mux-int-port = <2>;
		mux-ext-port = <3>;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		status = "okay";
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux_2>;
	status = "okay";
};

&ecspi1 {
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio4 9 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1_2>;
	status = "okay";

	flash: m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p32";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet_1>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 0>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1_2>;
	status = "okay";

	codec: wm8962@1a {
		compatible = "wlf,wm8962";
		reg = <0x1a>;
		clocks = <&clks 201>;
		DCVDD-supply = <&reg_audio>;
		DBVDD-supply = <&reg_audio>;
		AVDD-supply = <&reg_audio>;
		CPVDD-supply = <&reg_audio>;
		MICVDD-supply = <&reg_audio>;
		PLLVDD-supply = <&reg_audio>;
		SPKVDD1-supply = <&reg_audio>;
		SPKVDD2-supply = <&reg_audio>;
		gpio-cfg = <
			0x0000 /* 0:Default */
			0x0000 /* 1:Default */
			0x0013 /* 2:FN_DMICCLK */
			0x0000 /* 3:Default */
			0x8014 /* 4:FN_DMICCDAT */
			0x0000 /* 5:Default */
		>;
       };
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3_2>;
	status = "okay";

	egalax_ts@04 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio6>;
		interrupts = <7 2>;
		wakeup-gpios = <&gpio6 7 0>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	hog {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_4__GPIO1_IO04   0x80000000
				MX6QDL_PAD_GPIO_5__GPIO1_IO05   0x80000000
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
			>;
		};
	};
};

&ldb {
	status = "okay";

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_1>;
	status = "okay";
};

&ssi2 {
	fsl,mode = "i2s-slave";
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1_1>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg_2>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2_1>;
	bus-width = <8>;
	cd-gpios = <&gpio2 2 0>;
	wp-gpios = <&gpio2 3 0>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3_1>;
	bus-width = <8>;
	cd-gpios = <&gpio2 0 0>;
	wp-gpios = <&gpio2 1 0>;
	status = "okay";
};
Commit	Line	Data
082d33d0 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	* Copyright 2011 Linaro Ltd.
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
	13	/ {
	14	memory {
	15	reg = <0x10000000 0x40000000>;
	16	};
	17
	18	regulators {
	19	compatible = "simple-bus";
	20
	21	reg_usb_otg_vbus: usb_otg_vbus {
	22	compatible = "regulator-fixed";
	23	regulator-name = "usb_otg_vbus";
	24	regulator-min-microvolt = <5000000>;
	25	regulator-max-microvolt = <5000000>;
	26	gpio = <&gpio3 22 0>;
	27	enable-active-high;
	28	};
fdbfb43b	29
015fa46d PC	30	reg_usb_h1_vbus: usb_h1_vbus {
	31	compatible = "regulator-fixed";
	32	regulator-name = "usb_h1_vbus";
	33	regulator-min-microvolt = <5000000>;
	34	regulator-max-microvolt = <5000000>;
	35	gpio = <&gpio1 29 0>;
	36	enable-active-high;
	37	};
	38
fdbfb43b NC	39	reg_audio: wm8962_supply {
	40	compatible = "regulator-fixed";
	41	regulator-name = "wm8962-supply";
	42	gpio = <&gpio4 10 0>;
	43	enable-active-high;
	44	};
082d33d0 SG	45	};
	46
	47	gpio-keys {
	48	compatible = "gpio-keys";
	49
	50	volume-up {
	51	label = "Volume Up";
	52	gpios = <&gpio1 4 0>;
6c30640d	53	gpio-key,wakeup;
082d33d0 SG	54	linux,code = <115>; /* KEY_VOLUMEUP */
	55	};
	56
	57	volume-down {
	58	label = "Volume Down";
	59	gpios = <&gpio1 5 0>;
6c30640d	60	gpio-key,wakeup;
082d33d0 SG	61	linux,code = <114>; /* KEY_VOLUMEDOWN */
	62	};
	63	};
77b38fc3 NC	64
	65	sound {
	66	compatible = "fsl,imx6q-sabresd-wm8962",
	67	"fsl,imx-audio-wm8962";
	68	model = "wm8962-audio";
	69	ssi-controller = <&ssi2>;
	70	audio-codec = <&codec>;
	71	audio-routing =
	72	"Headphone Jack", "HPOUTL",
	73	"Headphone Jack", "HPOUTR",
	74	"Ext Spk", "SPKOUTL",
	75	"Ext Spk", "SPKOUTR",
	76	"MICBIAS", "AMIC",
	77	"IN3R", "MICBIAS",
	78	"DMIC", "MICBIAS",
	79	"DMICDAT", "DMIC";
	80	mux-int-port = <2>;
	81	mux-ext-port = <3>;
	82	};
2f35c0c4 RP	83
	84	backlight {
	85	compatible = "pwm-backlight";
	86	pwms = <&pwm1 0 5000000>;
	87	brightness-levels = <0 4 8 16 32 64 128 255>;
	88	default-brightness-level = <7>;
	89	status = "okay";
	90	};
082d33d0 SG	91	};
082d33d0 SG	92
48828700 NC	93	&audmux {
	94	pinctrl-names = "default";
	95	pinctrl-0 = <&pinctrl_audmux_2>;
	96	status = "okay";
	97	};
	98
9110ede4 HS	99	&ecspi1 {
	100	fsl,spi-num-chipselects = <1>;
	101	cs-gpios = <&gpio4 9 0>;
	102	pinctrl-names = "default";
	103	pinctrl-0 = <&pinctrl_ecspi1_2>;
	104	status = "okay";
	105
	106	flash: m25p80@0 {
	107	#address-cells = <1>;
	108	#size-cells = <1>;
	109	compatible = "st,m25p32";
	110	spi-max-frequency = <20000000>;
	111	reg = <0>;
	112	};
	113	};
	114
082d33d0 SG	115	&fec {
	116	pinctrl-names = "default";
	117	pinctrl-0 = <&pinctrl_enet_1>;
	118	phy-mode = "rgmii";
c5f592d1	119	phy-reset-gpios = <&gpio1 25 0>;
082d33d0 SG	120	status = "okay";
	121	};
	122
20426feb NC	123	&i2c1 {
	124	clock-frequency = <100000>;
	125	pinctrl-names = "default";
	126	pinctrl-0 = <&pinctrl_i2c1_2>;
	127	status = "okay";
	128
	129	codec: wm8962@1a {
	130	compatible = "wlf,wm8962";
	131	reg = <0x1a>;
a94f8ecb	132	clocks = <&clks 201>;
20426feb NC	133	DCVDD-supply = <&reg_audio>;
	134	DBVDD-supply = <&reg_audio>;
	135	AVDD-supply = <&reg_audio>;
	136	CPVDD-supply = <&reg_audio>;
	137	MICVDD-supply = <&reg_audio>;
	138	PLLVDD-supply = <&reg_audio>;
	139	SPKVDD1-supply = <&reg_audio>;
	140	SPKVDD2-supply = <&reg_audio>;
	141	gpio-cfg = <
	142	0x0000 /* 0:Default */
	143	0x0000 /* 1:Default */
	144	0x0013 /* 2:FN_DMICCLK */
	145	0x0000 /* 3:Default */
	146	0x8014 /* 4:FN_DMICCDAT */
	147	0x0000 /* 5:Default */
	148	>;
	149	};
	150	};
	151
38501179 FE	152	&i2c3 {
	153	clock-frequency = <100000>;
	154	pinctrl-names = "default";
	155	pinctrl-0 = <&pinctrl_i2c3_2>;
	156	status = "okay";
	157
	158	egalax_ts@04 {
	159	compatible = "eeti,egalax_ts";
	160	reg = <0x04>;
	161	interrupt-parent = <&gpio6>;
	162	interrupts = <7 2>;
	163	wakeup-gpios = <&gpio6 7 0>;
	164	};
	165	};
	166
c56009b2 SG	167	&iomuxc {
	168	pinctrl-names = "default";
	169	pinctrl-0 = <&pinctrl_hog>;
	170
	171	hog {
	172	pinctrl_hog: hoggrp {
	173	fsl,pins = <
	174	MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
	175	MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
	176	MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
	177	MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
	178	MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
	179	MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
	180	MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
38501179	181	MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
015fa46d	182	MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
e3c68c86	183	MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
c5f592d1	184	MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
c56009b2 SG	185	>;
	186	};
	187	};
	188	};
	189
b7fb7105 SG	190	&ldb {
	191	status = "okay";
	192
	193	lvds-channel@1 {
	194	fsl,data-mapping = "spwg";
	195	fsl,data-width = <18>;
	196	status = "okay";
	197
	198	display-timings {
	199	native-mode = <&timing0>;
	200	timing0: hsd100pxn1 {
	201	clock-frequency = <65000000>;
	202	hactive = <1024>;
	203	vactive = <768>;
	204	hback-porch = <220>;
	205	hfront-porch = <40>;
	206	vback-porch = <21>;
	207	vfront-porch = <7>;
	208	hsync-len = <60>;
	209	vsync-len = <10>;
	210	};
	211	};
	212	};
	213	};
	214
2f35c0c4 RP	215	&pwm1 {
	216	pinctrl-names = "default";
	217	pinctrl-0 = <&pinctrl_pwm0_1>;
	218	status = "okay";
	219	};
	220
48828700 NC	221	&ssi2 {
	222	fsl,mode = "i2s-slave";
	223	status = "okay";
	224	};
	225
082d33d0 SG	226	&uart1 {
	227	pinctrl-names = "default";
	228	pinctrl-0 = <&pinctrl_uart1_1>;
	229	status = "okay";
	230	};
	231
	232	&usbh1 {
015fa46d	233	vbus-supply = <&reg_usb_h1_vbus>;
082d33d0 SG	234	status = "okay";
	235	};
	236
	237	&usbotg {
	238	vbus-supply = <&reg_usb_otg_vbus>;
	239	pinctrl-names = "default";
	240	pinctrl-0 = <&pinctrl_usbotg_2>;
	241	disable-over-current;
	242	status = "okay";
	243	};
	244
	245	&usdhc2 {
	246	pinctrl-names = "default";
	247	pinctrl-0 = <&pinctrl_usdhc2_1>;
e367817a	248	bus-width = <8>;
082d33d0 SG	249	cd-gpios = <&gpio2 2 0>;
	250	wp-gpios = <&gpio2 3 0>;
	251	status = "okay";
	252	};
	253
	254	&usdhc3 {
	255	pinctrl-names = "default";
	256	pinctrl-0 = <&pinctrl_usdhc3_1>;
e367817a	257	bus-width = <8>;
082d33d0 SG	258	cd-gpios = <&gpio2 0 0>;
	259	wp-gpios = <&gpio2 1 0>;
	260	status = "okay";
	261	};