ARM: dts: stm32429i-eval: Add USB HS host mode support
[deliverable/linux.git] / arch / arm / boot / dts / imx6qdl-udoo.dtsi
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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12/ {
13 chosen {
14 stdout-path = &uart2;
15 };
16
17 memory {
18 reg = <0x10000000 0x40000000>;
19 };
20
21 regulators {
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 reg_usb_h1_vbus: regulator@0 {
27 compatible = "regulator-fixed";
28 reg = <0>;
29 regulator-name = "usb_h1_vbus";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
32 enable-active-high;
33 startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
34 gpio = <&gpio7 12 0>;
35 };
36 };
37};
38
39&fec {
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_enet>;
42 phy-mode = "rgmii";
43 status = "okay";
44};
45
46&hdmi {
47 ddc-i2c-bus = <&i2c2>;
48 status = "okay";
49};
50
51&i2c2 {
52 clock-frequency = <100000>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_i2c2>;
55 status = "okay";
56};
57
58&iomuxc {
59 imx6q-udoo {
60 pinctrl_enet: enetgrp {
61 fsl,pins = <
62 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
63 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
64 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
65 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
66 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
67 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
68 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
69 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
70 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
71 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
72 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
73 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
74 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
75 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
76 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
77 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
78 >;
79 };
80
81 pinctrl_i2c2: i2c2grp {
82 fsl,pins = <
83 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
84 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
85 >;
86 };
87
88 pinctrl_uart2: uart2grp {
89 fsl,pins = <
90 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
91 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
92 >;
93 };
94
95 pinctrl_usbh: usbhgrp {
96 fsl,pins = <
97 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
98 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
99 >;
100 };
101
102 pinctrl_usdhc3: usdhc3grp {
103 fsl,pins = <
104 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
105 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
106 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
107 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
108 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
109 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
110 >;
111 };
112 };
113};
114
115&uart2 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_uart2>;
118 status = "okay";
119};
120
121&usbh1 {
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_usbh>;
124 vbus-supply = <&reg_usb_h1_vbus>;
125 clocks = <&clks 201>;
126 status = "okay";
127};
128
129&usdhc3 {
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_usdhc3>;
132 non-removable;
133 status = "okay";
134};
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