[deliverable/linux.git] / arch / arm / boot / dts / imx6sl-warp.dts

/*
 * Copyright 2014, 2015 O.S. Systems Software LTDA.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of
 *     the License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 *     You should have received a copy of the GNU General Public
 *     License along with this file; if not, write to the Free
 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
 *     MA 02110-1301 USA
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "imx6sl.dtsi"

/ {
	model = "WaRP Board";
	compatible = "warp,imx6sl-warp", "fsl,imx6sl";

	memory {
		reg = <0x80000000 0x20000000>;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb_otg1_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb_otg1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio4 0 0>;
			enable-active-high;
		};

		reg_usb_otg2_vbus: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_otg2_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio4 2 0>;
			enable-active-high;
		};
	};

	usdhc3_pwrseq: usdhc3_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>, 	/* WL_REG_ON */
			      <&gpio3 25 GPIO_ACTIVE_LOW>, 	/* BT_REG_ON */
			      <&gpio4 4 GPIO_ACTIVE_LOW>, 	/* BT_WAKE */
			      <&gpio4 6 GPIO_ACTIVE_LOW>; 	/* BT_RST_N */
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	fsl,uart-has-rtscts;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usbotg2 {
	vbus-supply = <&reg_usb_otg2_vbus>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	bus-width = <4>;
	non-removable;
	keep-power-in-suspend;
	enable-sdio-wakeup;
	mmc-pwrseq = <&usdhc3_pwrseq>;
	status = "okay";
};

&iomuxc {
	imx6sl-warp {
		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x41b0b1
				MX6SL_PAD_UART1_TXD__UART1_TX_DATA	0x41b0b1
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX6SL_PAD_EPDC_D12__UART2_RX_DATA	0x41b0b1
				MX6SL_PAD_EPDC_D13__UART2_TX_DATA	0x41b0b1
				MX6SL_PAD_EPDC_D14__UART2_RTS_B		0x4130B1
				MX6SL_PAD_EPDC_D15__UART2_CTS_B		0x4130B1
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX6SL_PAD_AUD_RXC__UART3_RX_DATA	0x41b0b1
				MX6SL_PAD_AUD_RXC__UART3_TX_DATA	0x41b0b1
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6SL_PAD_SD2_CMD__SD2_CMD		0x417059
				MX6SL_PAD_SD2_CLK__SD2_CLK		0x410059
				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x417059
				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x417059
				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x417059
				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x417059
				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x417059
				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x417059
				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x417059
				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x417059
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
			fsl,pins = <
				MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170b9
				MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100b9
				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170b9
				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170b9
				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170b9
				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170b9
				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170b9
				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170b9
				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170b9
				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170b9
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
			fsl,pins = <
				MX6SL_PAD_SD2_CMD__SD2_CMD		0x4170f9
				MX6SL_PAD_SD2_CLK__SD2_CLK		0x4100f9
				MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x4170f9
				MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x4170f9
				MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x4170f9
				MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x4170f9
				MX6SL_PAD_SD2_DAT4__SD2_DATA4		0x4170f9
				MX6SL_PAD_SD2_DAT5__SD2_DATA5		0x4170f9
				MX6SL_PAD_SD2_DAT6__SD2_DATA6		0x4170f9
				MX6SL_PAD_SD2_DAT7__SD2_DATA7		0x4170f9
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX6SL_PAD_SD3_CMD__SD3_CMD		0x417059
				MX6SL_PAD_SD3_CLK__SD3_CLK		0x410059
				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x417059
				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x417059
				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x417059
				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x417059
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
			fsl,pins = <
				MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170b9
				MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100b9
				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170b9
				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170b9
				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170b9
				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170b9
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
			fsl,pins = <
				MX6SL_PAD_SD3_CMD__SD3_CMD		0x4170f9
				MX6SL_PAD_SD3_CLK__SD3_CLK		0x4100f9
				MX6SL_PAD_SD3_DAT0__SD3_DATA0		0x4170f9
				MX6SL_PAD_SD3_DAT1__SD3_DATA1		0x4170f9
				MX6SL_PAD_SD3_DAT2__SD3_DATA2		0x4170f9
				MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170f9
			>;
		};
	};
};
Commit	Line	Data
27b0b9d8 OS	1	/*
	2	* Copyright 2014, 2015 O.S. Systems Software LTDA.
	3	*
	4	* This file is dual-licensed: you can use it either under the terms
	5	* of the GPL or the X11 license, at your option. Note that this dual
	6	* licensing only applies to this file, and not this project as a
	7	* whole.
	8	*
	9	* a) This file is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This file is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public
	20	* License along with this file; if not, write to the Free
	21	* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
	22	* MA 02110-1301 USA
	23	*
	24	* Or, alternatively,
	25	*
	26	* b) Permission is hereby granted, free of charge, to any person
	27	* obtaining a copy of this software and associated documentation
	28	* files (the "Software"), to deal in the Software without
	29	* restriction, including without limitation the rights to use,
	30	* copy, modify, merge, publish, distribute, sublicense, and/or
	31	* sell copies of the Software, and to permit persons to whom the
	32	* Software is furnished to do so, subject to the following
	33	* conditions:
	34	*
	35	* The above copyright notice and this permission notice shall be
	36	* included in all copies or substantial portions of the Software.
	37	*
	38	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	39	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	40	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	41	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	42	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	43	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	44	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	45	* OTHER DEALINGS IN THE SOFTWARE.
	46	*/
	47
	48	/dts-v1/;
	49
159097f8	50	#include <dt-bindings/gpio/gpio.h>
27b0b9d8 OS	51	#include "imx6sl.dtsi"
	52
	53	/ {
	54	model = "WaRP Board";
	55	compatible = "warp,imx6sl-warp", "fsl,imx6sl";
	56
	57	memory {
	58	reg = <0x80000000 0x20000000>;
	59	};
	60
	61	regulators {
	62	compatible = "simple-bus";
	63	#address-cells = <1>;
	64	#size-cells = <0>;
	65
	66	reg_usb_otg1_vbus: regulator@0 {
	67	compatible = "regulator-fixed";
	68	reg = <0>;
	69	regulator-name = "usb_otg1_vbus";
	70	regulator-min-microvolt = <5000000>;
	71	regulator-max-microvolt = <5000000>;
	72	gpio = <&gpio4 0 0>;
	73	enable-active-high;
	74	};
	75
	76	reg_usb_otg2_vbus: regulator@1 {
	77	compatible = "regulator-fixed";
	78	reg = <1>;
	79	regulator-name = "usb_otg2_vbus";
	80	regulator-min-microvolt = <5000000>;
	81	regulator-max-microvolt = <5000000>;
	82	gpio = <&gpio4 2 0>;
	83	enable-active-high;
	84	};
27b0b9d8	85	};
159097f8 FE	86
	87	usdhc3_pwrseq: usdhc3_pwrseq {
	88	compatible = "mmc-pwrseq-simple";
	89	reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>, /* WL_REG_ON */
	90	<&gpio3 25 GPIO_ACTIVE_LOW>, /* BT_REG_ON */
	91	<&gpio4 4 GPIO_ACTIVE_LOW>, /* BT_WAKE */
	92	<&gpio4 6 GPIO_ACTIVE_LOW>; /* BT_RST_N */
	93	};
27b0b9d8 OS	94	};
	95
	96	&uart1 {
	97	pinctrl-names = "default";
	98	pinctrl-0 = <&pinctrl_uart1>;
	99	status = "okay";
	100	};
	101
159097f8 FE	102	&uart2 {
	103	pinctrl-names = "default";
	104	pinctrl-0 = <&pinctrl_uart2>;
	105	fsl,uart-has-rtscts;
	106	status = "okay";
	107	};
	108
27b0b9d8 OS	109	&uart3 {
	110	pinctrl-names = "default";
	111	pinctrl-0 = <&pinctrl_uart3>;
	112	status = "okay";
	113	};
	114
	115	&usbotg1 {
	116	vbus-supply = <&reg_usb_otg1_vbus>;
	117	dr_mode = "host";
	118	disable-over-current;
	119	status = "okay";
	120	};
	121
	122	&usbotg2 {
	123	vbus-supply = <&reg_usb_otg2_vbus>;
	124	disable-over-current;
	125	status = "okay";
	126	};
	127
	128	&usdhc2 {
	129	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	130	pinctrl-0 = <&pinctrl_usdhc2>;
	131	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
	132	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
649b1fe8	133	bus-width = <8>;
27b0b9d8 OS	134	non-removable;
	135	status = "okay";
	136	};
	137
159097f8 FE	138	&usdhc3 {
	139	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	140	pinctrl-0 = <&pinctrl_usdhc3>;
	141	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	142	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	143	bus-width = <4>;
	144	non-removable;
	145	keep-power-in-suspend;
	146	enable-sdio-wakeup;
	147	mmc-pwrseq = <&usdhc3_pwrseq>;
	148	status = "okay";
	149	};
	150
27b0b9d8 OS	151	&iomuxc {
	152	imx6sl-warp {
	153	pinctrl_uart1: uart1grp {
	154	fsl,pins = <
	155	MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x41b0b1
	156	MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x41b0b1
	157	>;
	158	};
	159
159097f8 FE	160	pinctrl_uart2: uart2grp {
	161	fsl,pins = <
	162	MX6SL_PAD_EPDC_D12__UART2_RX_DATA 0x41b0b1
	163	MX6SL_PAD_EPDC_D13__UART2_TX_DATA 0x41b0b1
	164	MX6SL_PAD_EPDC_D14__UART2_RTS_B 0x4130B1
	165	MX6SL_PAD_EPDC_D15__UART2_CTS_B 0x4130B1
	166	>;
	167	};
	168
27b0b9d8 OS	169	pinctrl_uart3: uart3grp {
	170	fsl,pins = <
	171	MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x41b0b1
	172	MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x41b0b1
	173	>;
	174	};
	175
	176	pinctrl_usdhc2: usdhc2grp {
	177	fsl,pins = <
	178	MX6SL_PAD_SD2_CMD__SD2_CMD 0x417059
	179	MX6SL_PAD_SD2_CLK__SD2_CLK 0x410059
	180	MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x417059
	181	MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x417059
	182	MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x417059
	183	MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x417059
	184	MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x417059
	185	MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x417059
	186	MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x417059
	187	MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x417059
	188	>;
	189	};
	190
	191	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
	192	fsl,pins = <
	193	MX6SL_PAD_SD2_CMD__SD2_CMD 0x4170b9
	194	MX6SL_PAD_SD2_CLK__SD2_CLK 0x4100b9
	195	MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x4170b9
	196	MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x4170b9
	197	MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x4170b9
	198	MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x4170b9
	199	MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x4170b9
	200	MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x4170b9
	201	MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x4170b9
	202	MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x4170b9
	203	>;
	204	};
	205
	206	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
	207	fsl,pins = <
	208	MX6SL_PAD_SD2_CMD__SD2_CMD 0x4170f9
	209	MX6SL_PAD_SD2_CLK__SD2_CLK 0x4100f9
	210	MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x4170f9
	211	MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x4170f9
	212	MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x4170f9
	213	MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x4170f9
	214	MX6SL_PAD_SD2_DAT4__SD2_DATA4 0x4170f9
	215	MX6SL_PAD_SD2_DAT5__SD2_DATA5 0x4170f9
	216	MX6SL_PAD_SD2_DAT6__SD2_DATA6 0x4170f9
	217	MX6SL_PAD_SD2_DAT7__SD2_DATA7 0x4170f9
	218	>;
	219	};
159097f8 FE	220
	221	pinctrl_usdhc3: usdhc3grp {
	222	fsl,pins = <
	223	MX6SL_PAD_SD3_CMD__SD3_CMD 0x417059
	224	MX6SL_PAD_SD3_CLK__SD3_CLK 0x410059
	225	MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x417059
	226	MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x417059
	227	MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x417059
	228	MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x417059
	229	>;
	230	};
	231
	232	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
	233	fsl,pins = <
	234	MX6SL_PAD_SD3_CMD__SD3_CMD 0x4170b9
	235	MX6SL_PAD_SD3_CLK__SD3_CLK 0x4100b9
	236	MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x4170b9
	237	MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x4170b9
	238	MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x4170b9
	239	MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x4170b9
	240	>;
	241	};
	242
	243	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
	244	fsl,pins = <
	245	MX6SL_PAD_SD3_CMD__SD3_CMD 0x4170f9
	246	MX6SL_PAD_SD3_CLK__SD3_CLK 0x4100f9
	247	MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x4170f9
	248	MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x4170f9
	249	MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x4170f9
	250	MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x4170f9
	251	>;
	252	};
27b0b9d8 OS	253	};
27b0b9d8 OS	254	};