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ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
[deliverable/linux.git] / arch / arm / boot / dts / imx6sx-sdb.dts
CommitLineData
d2daa2f7
SG		 1/*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
4014a4f7
AH		 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
d2daa2f7
SG		 13#include "imx6sx.dtsi"
14
15/ {
16 model = "Freescale i.MX6 SoloX SDB Board";
17 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
18
19 chosen {
20 stdout-path = &uart1;
21 };
22
23 memory {
24 reg = <0x80000000 0x40000000>;
25 };
26
31ffdbc8
FE		 27 backlight {
28 compatible = "pwm-backlight";
29 pwms = <&pwm3 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <6>;
32 };
33
4014a4f7
AH		 34 gpio-keys {
35 compatible = "gpio-keys";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_gpio_keys>;
38
39 volume-up {
40 label = "Volume Up";
41 gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_VOLUMEUP>;
43 };
44
45 volume-down {
46 label = "Volume Down";
47 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_VOLUMEDOWN>;
49 };
50 };
51
d2daa2f7
SG		 52 regulators {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 vcc_sd3: regulator@0 {
58 compatible = "regulator-fixed";
59 reg = <0>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_vcc_sd3>;
62 regulator-name = "VCC_SD3";
63 regulator-min-microvolt = <3000000>;
64 regulator-max-microvolt = <3000000>;
65 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
66 enable-active-high;
67 };
960fefff
FE		 68
69 reg_usb_otg1_vbus: regulator@1 {
70 compatible = "regulator-fixed";
71 reg = <1>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_usb_otg1>;
74 regulator-name = "usb_otg1_vbus";
75 regulator-min-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>;
77 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
78 enable-active-high;
79 };
80
81 reg_usb_otg2_vbus: regulator@2 {
82 compatible = "regulator-fixed";
83 reg = <2>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_usb_otg2>;
86 regulator-name = "usb_otg2_vbus";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
90 enable-active-high;
91 };
9c86ae8c
FE		 92
93 reg_psu_5v: regulator@3 {
94 compatible = "regulator-fixed";
95 reg = <3>;
96 regulator-name = "PSU-5V0";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 };
31ffdbc8
FE		 100
101 reg_lcd_3v3: regulator@4 {
102 compatible = "regulator-fixed";
103 reg = <4>;
104 regulator-name = "lcd-3v3";
105 gpio = <&gpio3 27 0>;
106 enable-active-high;
107 };
9c86ae8c
FE		 108 };
109
110 sound {
111 compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962";
112 model = "wm8962-audio";
113 ssi-controller = <&ssi2>;
114 audio-codec = <&codec>;
115 audio-routing =
116 "Headphone Jack", "HPOUTL",
117 "Headphone Jack", "HPOUTR",
118 "Ext Spk", "SPKOUTL",
119 "Ext Spk", "SPKOUTR",
120 "AMIC", "MICBIAS",
121 "IN3R", "AMIC";
122 mux-int-port = <2>;
123 mux-ext-port = <6>;
d2daa2f7
SG		 124 };
125};
126
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FE		 127&audmux {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_audmux>;
130 status = "okay";
131};
132
d2daa2f7
SG		 133&fec1 {
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_enet1>;
136 phy-mode = "rgmii";
137 status = "okay";
138};
139
b3d8e11f
FE		 140&i2c1 {
141 clock-frequency = <100000>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_i2c1>;
144 status = "okay";
145
146 pmic: pfuze100@08 {
147 compatible = "fsl,pfuze100";
148 reg = <0x08>;
149
150 regulators {
151 sw1a_reg: sw1ab {
152 regulator-min-microvolt = <300000>;
153 regulator-max-microvolt = <1875000>;
154 regulator-boot-on;
155 regulator-always-on;
156 regulator-ramp-delay = <6250>;
157 };
158
159 sw1c_reg: sw1c {
160 regulator-min-microvolt = <300000>;
161 regulator-max-microvolt = <1875000>;
162 regulator-boot-on;
163 regulator-always-on;
164 regulator-ramp-delay = <6250>;
165 };
166
167 sw2_reg: sw2 {
168 regulator-min-microvolt = <800000>;
169 regulator-max-microvolt = <3300000>;
170 regulator-boot-on;
171 regulator-always-on;
172 };
173
174 sw3a_reg: sw3a {
175 regulator-min-microvolt = <400000>;
176 regulator-max-microvolt = <1975000>;
177 regulator-boot-on;
178 regulator-always-on;
179 };
180
181 sw3b_reg: sw3b {
182 regulator-min-microvolt = <400000>;
183 regulator-max-microvolt = <1975000>;
184 regulator-boot-on;
185 regulator-always-on;
186 };
187
188 sw4_reg: sw4 {
189 regulator-min-microvolt = <800000>;
190 regulator-max-microvolt = <3300000>;
191 };
192
193 swbst_reg: swbst {
194 regulator-min-microvolt = <5000000>;
195 regulator-max-microvolt = <5150000>;
196 };
197
198 snvs_reg: vsnvs {
199 regulator-min-microvolt = <1000000>;
200 regulator-max-microvolt = <3000000>;
201 regulator-boot-on;
202 regulator-always-on;
203 };
204
205 vref_reg: vrefddr {
206 regulator-boot-on;
207 regulator-always-on;
208 };
209
210 vgen1_reg: vgen1 {
211 regulator-min-microvolt = <800000>;
212 regulator-max-microvolt = <1550000>;
213 regulator-always-on;
214 };
215
216 vgen2_reg: vgen2 {
217 regulator-min-microvolt = <800000>;
218 regulator-max-microvolt = <1550000>;
219 };
220
221 vgen3_reg: vgen3 {
222 regulator-min-microvolt = <1800000>;
223 regulator-max-microvolt = <3300000>;
224 regulator-always-on;
225 };
226
227 vgen4_reg: vgen4 {
228 regulator-min-microvolt = <1800000>;
229 regulator-max-microvolt = <3300000>;
230 regulator-always-on;
231 };
232
233 vgen5_reg: vgen5 {
234 regulator-min-microvolt = <1800000>;
235 regulator-max-microvolt = <3300000>;
236 regulator-always-on;
237 };
238
239 vgen6_reg: vgen6 {
240 regulator-min-microvolt = <1800000>;
241 regulator-max-microvolt = <3300000>;
242 regulator-always-on;
243 };
244 };
245 };
246};
247
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FE		 248&i2c4 {
249 clock-frequency = <100000>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_i2c4>;
252 status = "okay";
253
254 codec: wm8962@1a {
255 compatible = "wlf,wm8962";
256 reg = <0x1a>;
257 clocks = <&clks IMX6SX_CLK_AUDIO>;
258 DCVDD-supply = <&vgen4_reg>;
259 DBVDD-supply = <&vgen4_reg>;
260 AVDD-supply = <&vgen4_reg>;
261 CPVDD-supply = <&vgen4_reg>;
262 MICVDD-supply = <&vgen3_reg>;
263 PLLVDD-supply = <&vgen4_reg>;
264 SPKVDD1-supply = <&reg_psu_5v>;
265 SPKVDD2-supply = <&reg_psu_5v>;
266 };
267};
268
31ffdbc8
FE		 269&lcdif1 {
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_lcd>;
272 lcd-supply = <&reg_lcd_3v3>;
273 display = <&display0>;
274 status = "okay";
275
276 display0: display0 {
277 bits-per-pixel = <16>;
278 bus-width = <24>;
279
280 display-timings {
281 native-mode = <&timing0>;
282 timing0: timing0 {
283 clock-frequency = <33500000>;
284 hactive = <800>;
285 vactive = <480>;
286 hback-porch = <89>;
287 hfront-porch = <164>;
288 vback-porch = <23>;
289 vfront-porch = <10>;
290 hsync-len = <10>;
291 vsync-len = <10>;
292 hsync-active = <0>;
293 vsync-active = <0>;
294 de-active = <1>;
295 pixelclk-active = <0>;
296 };
297 };
298 };
299};
300
301&pwm3 {
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_pwm3>;
304 status = "okay";
305};
306
9c86ae8c
FE		 307&ssi2 {
308 status = "okay";
309};
310
d2daa2f7
SG		 311&uart1 {
312 pinctrl-names = "default";
313 pinctrl-0 = <&pinctrl_uart1>;
314 status = "okay";
315};
316
317&uart5 { /* for bluetooth */
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_uart5>;
320 fsl,uart-has-rtscts;
321 status = "okay";
322};
323
960fefff
FE		 324&usbotg1 {
325 vbus-supply = <&reg_usb_otg1_vbus>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_usb_otg1_id>;
328 status = "okay";
329};
330
331&usbotg2 {
332 vbus-supply = <&reg_usb_otg2_vbus>;
333 dr_mode = "host";
334 status = "okay";
335};
336
d2daa2f7
SG		 337&usdhc2 {
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_usdhc2>;
340 non-removable;
341 no-1-8-v;
342 keep-power-in-suspend;
343 enable-sdio-wakeup;
344 status = "okay";
345};
346
347&usdhc3 {
348 pinctrl-names = "default", "state_100mhz", "state_200mhz";
349 pinctrl-0 = <&pinctrl_usdhc3>;
350 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
351 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
352 bus-width = <8>;
353 cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
354 wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
355 keep-power-in-suspend;
356 enable-sdio-wakeup;
357 vmmc-supply = <&vcc_sd3>;
358 status = "okay";
359};
360
361&usdhc4 {
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_usdhc4>;
364 cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
365 wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
366 status = "okay";
367};
368
369&iomuxc {
370 imx6x-sdb {
9c86ae8c
FE		 371 pinctrl_audmux: audmuxgrp {
372 fsl,pins = <
373 MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0
374 MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0
375 MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0
376 MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0
377 MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
378 >;
379 };
380
d2daa2f7
SG		 381 pinctrl_enet1: enet1grp {
382 fsl,pins = <
383 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
384 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
385 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
386 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
387 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
388 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
389 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
390 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
391 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
392 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
393 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
394 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
395 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
396 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
397 >;
398 };
399
4014a4f7
AH		 400 pinctrl_gpio_keys: gpio_keysgrp {
401 fsl,pins = <
402 MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
403 MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
404 >;
405 };
406
b3d8e11f
FE		 407 pinctrl_i2c1: i2c1grp {
408 fsl,pins = <
409 MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
410 MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
411 >;
412 };
413
9c86ae8c
FE		 414 pinctrl_i2c4: i2c4grp {
415 fsl,pins = <
416 MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1
417 MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
418 >;
419 };
420
31ffdbc8
FE		 421 pinctrl_lcd: lcdgrp {
422 fsl,pins = <
423 MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
424 MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
425 MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
426 MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
427 MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
428 MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
429 MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
430 MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
431 MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
432 MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
433 MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
434 MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
435 MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
436 MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
437 MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
438 MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
439 MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
440 MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
441 MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
442 MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
443 MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
444 MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
445 MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
446 MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
447 MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
448 MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
449 MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
450 MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
451 MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
452 >;
453 };
454
455 pinctrl_pwm3: pwm3grp-1 {
456 fsl,pins = <
457 MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
458 >;
459 };
460
d2daa2f7
SG		 461 pinctrl_vcc_sd3: vccsd3grp {
462 fsl,pins = <
463 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
464 >;
465 };
466
467 pinctrl_uart1: uart1grp {
468 fsl,pins = <
469 MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
470 MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
471 >;
472 };
473
474 pinctrl_uart5: uart5grp {
475 fsl,pins = <
476 MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
477 MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
478 MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
479 MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
480 >;
481 };
482
960fefff
FE		 483 pinctrl_usb_otg1: usbotg1grp {
484 fsl,pins = <
485 MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
486 >;
487 };
488
489 pinctrl_usb_otg1_id: usbotg1idgrp {
490 fsl,pins = <
491 MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
492 >;
493 };
494
495 pinctrl_usb_otg2: usbot2ggrp {
496 fsl,pins = <
497 MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0
498 >;
499 };
500
d2daa2f7
SG		 501 pinctrl_usdhc2: usdhc2grp {
502 fsl,pins = <
503 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
504 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
505 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
506 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
507 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
508 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
509 >;
510 };
511
512 pinctrl_usdhc3: usdhc3grp {
513 fsl,pins = <
514 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
515 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
516 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
517 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
518 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
519 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
520 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
521 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
522 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
523 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
524 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
525 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
526 >;
527 };
528
529 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
530 fsl,pins = <
531 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
532 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
533 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
534 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
535 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
536 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
537 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
538 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
539 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
540 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
541 >;
542 };
543
544 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
545 fsl,pins = <
546 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
547 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
548 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
549 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
550 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
551 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
552 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
553 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
554 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
555 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
556 >;
557 };
558
559 pinctrl_usdhc4: usdhc4grp {
560 fsl,pins = <
561 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
562 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
563 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
564 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
565 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
566 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
567 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
568 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
569 >;
570 };
571 };
572};
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