ARM: dts: imx6sx: Fix usbmisc compatible string
[deliverable/linux.git] / arch / arm / boot / dts / imx6sx-sdb.dts
CommitLineData
d2daa2f7
SG
1/*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
4014a4f7
AH
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
d2daa2f7
SG
13#include "imx6sx.dtsi"
14
15/ {
16 model = "Freescale i.MX6 SoloX SDB Board";
17 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
18
19 chosen {
20 stdout-path = &uart1;
21 };
22
23 memory {
24 reg = <0x80000000 0x40000000>;
25 };
26
4014a4f7
AH
27 gpio-keys {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_gpio_keys>;
31
32 volume-up {
33 label = "Volume Up";
34 gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_VOLUMEUP>;
36 };
37
38 volume-down {
39 label = "Volume Down";
40 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
41 linux,code = <KEY_VOLUMEDOWN>;
42 };
43 };
44
d2daa2f7
SG
45 regulators {
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 vcc_sd3: regulator@0 {
51 compatible = "regulator-fixed";
52 reg = <0>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_vcc_sd3>;
55 regulator-name = "VCC_SD3";
56 regulator-min-microvolt = <3000000>;
57 regulator-max-microvolt = <3000000>;
58 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
59 enable-active-high;
60 };
61 };
62};
63
64&fec1 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_enet1>;
67 phy-mode = "rgmii";
68 status = "okay";
69};
70
71&uart1 {
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_uart1>;
74 status = "okay";
75};
76
77&uart5 { /* for bluetooth */
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_uart5>;
80 fsl,uart-has-rtscts;
81 status = "okay";
82};
83
84&usdhc2 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_usdhc2>;
87 non-removable;
88 no-1-8-v;
89 keep-power-in-suspend;
90 enable-sdio-wakeup;
91 status = "okay";
92};
93
94&usdhc3 {
95 pinctrl-names = "default", "state_100mhz", "state_200mhz";
96 pinctrl-0 = <&pinctrl_usdhc3>;
97 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
98 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
99 bus-width = <8>;
100 cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
101 wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
102 keep-power-in-suspend;
103 enable-sdio-wakeup;
104 vmmc-supply = <&vcc_sd3>;
105 status = "okay";
106};
107
108&usdhc4 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_usdhc4>;
111 cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
112 wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
113 status = "okay";
114};
115
116&iomuxc {
117 imx6x-sdb {
118 pinctrl_enet1: enet1grp {
119 fsl,pins = <
120 MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
121 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
122 MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
123 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
124 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
125 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
126 MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
127 MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
128 MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
129 MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
130 MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
131 MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
132 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
133 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
134 >;
135 };
136
4014a4f7
AH
137 pinctrl_gpio_keys: gpio_keysgrp {
138 fsl,pins = <
139 MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
140 MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
141 >;
142 };
143
d2daa2f7
SG
144 pinctrl_vcc_sd3: vccsd3grp {
145 fsl,pins = <
146 MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
147 >;
148 };
149
150 pinctrl_uart1: uart1grp {
151 fsl,pins = <
152 MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
153 MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
154 >;
155 };
156
157 pinctrl_uart5: uart5grp {
158 fsl,pins = <
159 MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
160 MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
161 MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
162 MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
163 >;
164 };
165
166 pinctrl_usdhc2: usdhc2grp {
167 fsl,pins = <
168 MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
169 MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
170 MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
171 MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
172 MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
173 MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
174 >;
175 };
176
177 pinctrl_usdhc3: usdhc3grp {
178 fsl,pins = <
179 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
180 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
181 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
182 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
183 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
184 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
185 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
186 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
187 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
188 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
189 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
190 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
191 >;
192 };
193
194 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
195 fsl,pins = <
196 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
197 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
198 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
199 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
200 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
201 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
202 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
203 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
204 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
205 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
206 >;
207 };
208
209 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
210 fsl,pins = <
211 MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
212 MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
213 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
214 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
215 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
216 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
217 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
218 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
219 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
220 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
221 >;
222 };
223
224 pinctrl_usdhc4: usdhc4grp {
225 fsl,pins = <
226 MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
227 MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
228 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
229 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
230 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
231 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
232 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
233 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
234 >;
235 };
236 };
237};
This page took 0.039301 seconds and 5 git commands to generate.