[deliverable/linux.git] / arch / arm / boot / dts / imx6ul-tx6ul-mainboard.dts

/*
 * Copyright 2015 Lothar Waßmann <LW@KARO-electronics.de>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "imx6ul.dtsi"
#include "imx6ul-tx6ul.dtsi"

/ {
	model = "Ka-Ro electronics TXUL-0010 Module on TXUL Mainboard";
	compatible = "karo,imx6ul-tx6ul", "fsl,imx6ul";

	aliases {
		lcdif_24bit_pins_a = &pinctrl_disp0_3;
		mmc0 = &usdhc1;
		/delete-property/ mmc1;
		serial2 = &uart3;
		serial4 = &uart5;
	};
	/delete-node/ sound;
};

&can1 {
	xceiver-supply = <&reg_3v3>;
};

&can2 {
	xceiver-supply = <&reg_3v3>;
};

&ds1339 {
	status = "disabled";
};

&fec1 {
	pinctrl-0 = <&pinctrl_enet1 &pinctrl_etnphy0_rst>;
	/delete-node/ mdio;
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio &pinctrl_etnphy1_rst>;
	phy-mode = "rmii";
	phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
	phy-supply = <&reg_3v3_etn>;
	phy-handle = <&etnphy1>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		etnphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_etnphy0_int>;
			interrupt-parent = <&gpio5>;
			interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
			interrupts-extended = <&gpio5 5 IRQ_TYPE_EDGE_FALLING>;
			status = "okay";
		};

		etnphy1: ethernet-phy@2 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <2>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_etnphy1_int>;
			interrupt-parent = <&gpio4>;
			interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
			interrupts-extended = <&gpio4 27 IRQ_TYPE_EDGE_FALLING>;
			status = "okay";
		};
	};
};

&i2c_gpio {
	status = "disabled";
};

&i2c2 {
	/delete-node/ codec@0a;
	/delete-node/ touchscreen@48;

	rtc: mcp7940x@6f {
		compatible = "microchip,mcp7940x";
		reg = <0x6f>;
	};
};

&kpp {
	status = "disabled";
};

&lcdif {
	pinctrl-0 = <&pinctrl_disp0_3>;
};

&reg_usbotg_vbus{
	status = "disabled";
};

&usdhc1 {
	pinctrl-0 = <&pinctrl_usdhc1>;
	non-removable;
	/delete-property/ cd-gpios;
	cap-sdio-irq;
};

&uart1 {
	pinctrl-0 = <&pinctrl_uart1>;
	/delete-property/ fsl,uart-has-rtscts;
};

&uart2 {
	pinctrl-0 = <&pinctrl_uart2>;
	/delete-property/ fsl,uart-has-rtscts;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	status = "okay";
};

&uart7 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart7>;
	status = "okay";
};

&uart8 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart8>;
	status = "disabled"; /* conflicts with LCDIF */
};

&iomuxc {
	hoggrp {
		fsl,pins = <
			MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x0b0b0 /* WLAN_RESET */
		>;
	};

	pinctrl_disp0_3: disp0grp-3 {
		fsl,pins = <
			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x10 /* LSCLK */
			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x10 /* OE_ACD */
			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x10 /* HSYNC */
			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x10 /* VSYNC */
			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x10
			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x10
			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x10
			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x10
			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x10
			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x10
			/* LCD_DATA08..09 not wired */
			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x10
			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x10
			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x10
			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x10
			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x10
			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x10
			/* LCD_DATA16..17 not wired */
			MX6UL_PAD_LCD_DATA18__LCDIF_DATA18	0x10
			MX6UL_PAD_LCD_DATA19__LCDIF_DATA19	0x10
			MX6UL_PAD_LCD_DATA20__LCDIF_DATA20	0x10
			MX6UL_PAD_LCD_DATA21__LCDIF_DATA21	0x10
			MX6UL_PAD_LCD_DATA22__LCDIF_DATA22	0x10
			MX6UL_PAD_LCD_DATA23__LCDIF_DATA23	0x10
		>;
	};

	pinctrl_enet2_mdio: enet2-mdiogrp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x0b0b0
			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x1b0b0
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX	0x0b0b0
			MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX	0x0b0b0
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX	0x0b0b0
			MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX	0x0b0b0
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX6UL_PAD_CSI_MCLK__UART6_DCE_TX	0x0b0b0
			MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX	0x0b0b0
		>;
	};

	pinctrl_uart7: uart7grp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA16__UART7_DCE_TX	0x0b0b0
			MX6UL_PAD_LCD_DATA17__UART7_DCE_RX	0x0b0b0
		>;
	};

	pinctrl_uart8: uart8grp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA20__UART8_DCE_TX	0x0b0b0
			MX6UL_PAD_LCD_DATA21__UART8_DCE_RX	0x0b0b0
		>;
	};
};
Commit	Line	Data
cf453482 LW	1	/*
	2	* Copyright 2015 Lothar Waßmann <LW@KARO-electronics.de>
	3	*
	4	* This file is dual-licensed: you can use it either under the terms
	5	* of the GPL or the X11 license, at your option. Note that this dual
	6	* licensing only applies to this file, and not this project as a
	7	* whole.
	8	*
	9	* a) This file is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This file is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* Or, alternatively,
	19	*
	20	* b) Permission is hereby granted, free of charge, to any person
	21	* obtaining a copy of this software and associated documentation
	22	* files (the "Software"), to deal in the Software without
	23	* restriction, including without limitation the rights to use,
	24	* copy, modify, merge, publish, distribute, sublicense, and/or
	25	* sell copies of the Software, and to permit persons to whom the
	26	* Software is furnished to do so, subject to the following
	27	* conditions:
	28	*
	29	* The above copyright notice and this permission notice shall be
	30	* included in all copies or substantial portions of the Software.
	31	*
	32	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	33	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	34	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	35	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	36	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	37	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	38	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	39	* OTHER DEALINGS IN THE SOFTWARE.
	40	*/
	41
	42	/dts-v1/;
	43	#include "imx6ul.dtsi"
	44	#include "imx6ul-tx6ul.dtsi"
	45
	46	/ {
	47	model = "Ka-Ro electronics TXUL-0010 Module on TXUL Mainboard";
	48	compatible = "karo,imx6ul-tx6ul", "fsl,imx6ul";
	49
	50	aliases {
	51	lcdif_24bit_pins_a = &pinctrl_disp0_3;
	52	mmc0 = &usdhc1;
	53	/delete-property/ mmc1;
	54	serial2 = &uart3;
	55	serial4 = &uart5;
	56	};
	57	/delete-node/ sound;
	58	};
	59
	60	&can1 {
	61	xceiver-supply = <&reg_3v3>;
	62	};
	63
	64	&can2 {
65	xceiver-supply = <&reg_3v3>;
66	};
67
68	&ds1339 {
69	status = "disabled";
70	};
71
72	&fec1 {
73	pinctrl-0 = <&pinctrl_enet1 &pinctrl_etnphy0_rst>;
74	/delete-node/ mdio;
75	};
76
77	&fec2 {
78	pinctrl-names = "default";
79	pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio &pinctrl_etnphy1_rst>;
80	phy-mode = "rmii";
81	phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
82	phy-supply = <&reg_3v3_etn>;
83	phy-handle = <&etnphy1>;
84	status = "okay";
85
86	mdio {
87	#address-cells = <1>;
88	#size-cells = <0>;
89
90	etnphy0: ethernet-phy@0 {
91	compatible = "ethernet-phy-ieee802.3-c22";
92	reg = <0>;
93	pinctrl-names = "default";
94	pinctrl-0 = <&pinctrl_etnphy0_int>;
95	interrupt-parent = <&gpio5>;
96	interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
97	interrupts-extended = <&gpio5 5 IRQ_TYPE_EDGE_FALLING>;
98	status = "okay";
99	};
100
101	etnphy1: ethernet-phy@2 {
102	compatible = "ethernet-phy-ieee802.3-c22";
103	reg = <2>;
104	pinctrl-names = "default";
105	pinctrl-0 = <&pinctrl_etnphy1_int>;
106	interrupt-parent = <&gpio4>;
107	interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
108	interrupts-extended = <&gpio4 27 IRQ_TYPE_EDGE_FALLING>;
109	status = "okay";
110	};
111	};
112	};
113
114	&i2c_gpio {
115	status = "disabled";
116	};
117
118	&i2c2 {
119	/delete-node/ codec@0a;
120	/delete-node/ touchscreen@48;
121
122	rtc: mcp7940x@6f {
123	compatible = "microchip,mcp7940x";
124	reg = <0x6f>;
125	};
126	};
127
128	&kpp {
129	status = "disabled";
130	};
131
132	&lcdif {
133	pinctrl-0 = <&pinctrl_disp0_3>;
134	};
135
136	&reg_usbotg_vbus{
137	status = "disabled";
138	};
139
140	&usdhc1 {
141	pinctrl-0 = <&pinctrl_usdhc1>;
142	non-removable;
143	/delete-property/ cd-gpios;
144	cap-sdio-irq;
145	};
146
147	&uart1 {
148	pinctrl-0 = <&pinctrl_uart1>;
149	/delete-property/ fsl,uart-has-rtscts;
150	};
151
152	&uart2 {
153	pinctrl-0 = <&pinctrl_uart2>;
154	/delete-property/ fsl,uart-has-rtscts;
155	status = "okay";
156	};
157
158	&uart3 {
159	pinctrl-names = "default";
160	pinctrl-0 = <&pinctrl_uart3>;
161	status = "okay";
162	};
163
164	&uart4 {
165	pinctrl-names = "default";
166	pinctrl-0 = <&pinctrl_uart4>;
167	status = "okay";
168	};
169
170	&uart5 {
171	pinctrl-names = "default";
172	pinctrl-0 = <&pinctrl_uart5>;
173	status = "okay";
174	};
175
176	&uart6 {
177	pinctrl-names = "default";
178	pinctrl-0 = <&pinctrl_uart6>;
179	status = "okay";
180	};
181
182	&uart7 {
183	pinctrl-names = "default";
184	pinctrl-0 = <&pinctrl_uart7>;
185	status = "okay";
186	};
187
188	&uart8 {
189	pinctrl-names = "default";
190	pinctrl-0 = <&pinctrl_uart8>;
191	status = "disabled"; /* conflicts with LCDIF */
192	};
193
194	&iomuxc {
195	hoggrp {
196	fsl,pins = <
197	MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x0b0b0 /* WLAN_RESET */
198	>;
199	};
200
201	pinctrl_disp0_3: disp0grp-3 {
202	fsl,pins = <
203	MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */
204	MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */
205	MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
206	MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */
207	MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10
208	MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10
209	MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10
210	MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10
211	MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10
212	MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10
213	/* LCD_DATA08..09 not wired */
214	MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x10
215	MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x10
216	MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x10
217	MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x10
218	MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x10
219	MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x10
220	/* LCD_DATA16..17 not wired */
221	MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x10
222	MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x10
223	MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x10
224	MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x10
225	MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x10
226	MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x10
227	>;
228	};
229
230	pinctrl_enet2_mdio: enet2-mdiogrp {
231	fsl,pins = <
232	MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x0b0b0
233	MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
234	>;
235	};
236
237	pinctrl_uart3: uart3grp {
238	fsl,pins = <
239	MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x0b0b0
240	MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x0b0b0
241	>;
242	};
243
244	pinctrl_uart4: uart4grp {
245	fsl,pins = <
246	MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x0b0b0
247	MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x0b0b0
248	>;
249	};
250
251	pinctrl_uart6: uart6grp {
252	fsl,pins = <
253	MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x0b0b0
254	MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x0b0b0
255	>;
256	};
257
258	pinctrl_uart7: uart7grp {
259	fsl,pins = <
260	MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x0b0b0
261	MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x0b0b0
262	>;
263	};
264
265	pinctrl_uart8: uart8grp {
266	fsl,pins = <
267	MX6UL_PAD_LCD_DATA20__UART8_DCE_TX 0x0b0b0
268	MX6UL_PAD_LCD_DATA21__UART8_DCE_RX 0x0b0b0
269	>;
270	};
271	};