Commit | Line | Data |
---|---|---|
4980f9bc LW |
1 | /* |
2 | * SoC core Device Tree for the ARM Integrator platforms | |
3 | */ | |
4 | ||
5 | /include/ "skeleton.dtsi" | |
6 | ||
7 | / { | |
8 | timer@13000000 { | |
9 | reg = <0x13000000 0x100>; | |
10 | interrupt-parent = <&pic>; | |
11 | interrupts = <5>; | |
12 | }; | |
13 | ||
14 | timer@13000100 { | |
15 | reg = <0x13000100 0x100>; | |
16 | interrupt-parent = <&pic>; | |
17 | interrupts = <6>; | |
18 | }; | |
19 | ||
20 | timer@13000200 { | |
21 | reg = <0x13000200 0x100>; | |
22 | interrupt-parent = <&pic>; | |
23 | interrupts = <7>; | |
24 | }; | |
25 | ||
26 | pic@14000000 { | |
27 | compatible = "arm,versatile-fpga-irq"; | |
28 | #interrupt-cells = <1>; | |
29 | interrupt-controller; | |
30 | reg = <0x14000000 0x100>; | |
31 | clear-mask = <0xffffffff>; | |
32 | }; | |
4672cddf | 33 | |
73efd530 LW |
34 | flash@24000000 { |
35 | compatible = "cfi-flash"; | |
36 | reg = <0x24000000 0x02000000>; | |
37 | }; | |
38 | ||
4672cddf LW |
39 | fpga { |
40 | compatible = "arm,amba-bus", "simple-bus"; | |
41 | #address-cells = <1>; | |
42 | #size-cells = <1>; | |
43 | ranges; | |
44 | interrupt-parent = <&pic>; | |
45 | ||
46 | /* | |
47 | * These PrimeCells are in the same locations and using the | |
48 | * same interrupts in all Integrators, however the silicon | |
49 | * version deployed is different. | |
50 | */ | |
51 | rtc@15000000 { | |
52 | reg = <0x15000000 0x1000>; | |
53 | interrupts = <8>; | |
54 | }; | |
55 | ||
56 | uart@16000000 { | |
57 | reg = <0x16000000 0x1000>; | |
58 | interrupts = <1>; | |
59 | }; | |
60 | ||
61 | uart@17000000 { | |
62 | reg = <0x17000000 0x1000>; | |
63 | interrupts = <2>; | |
64 | }; | |
65 | ||
66 | kmi@18000000 { | |
67 | reg = <0x18000000 0x1000>; | |
68 | interrupts = <3>; | |
69 | }; | |
70 | ||
71 | kmi@19000000 { | |
72 | reg = <0x19000000 0x1000>; | |
73 | interrupts = <4>; | |
74 | }; | |
75 | }; | |
4980f9bc | 76 | }; |