[deliverable/linux.git] / arch / arm / boot / dts / keystone.dtsi

/*
 * Copyright 2013 Texas Instruments, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>

#include "skeleton.dtsi"

/ {
	model = "Texas Instruments Keystone 2 SoC";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	aliases {
		serial0	= &uart0;
	};

	memory {
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	};

	gic: interrupt-controller {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x0 0x02561000 0x0 0x1000>,
		      <0x0 0x02562000 0x0 0x2000>,
		      <0x0 0x02564000 0x0 0x1000>,
		      <0x0 0x02566000 0x0 0x2000>;
		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
				IRQ_TYPE_LEVEL_HIGH)>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts =
			<GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "ti,keystone","simple-bus";
		interrupt-parent = <&gic>;
		ranges = <0x0 0x0 0x0 0xc0000000>;
		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;

		rstctrl: reset-controller {
			compatible = "ti,keystone-reset";
			reg = <0x023100e8 4>;	/* pll reset control reg */
		};

		/include/ "keystone-clocks.dtsi"

		uart0: serial@02530c00 {
			compatible = "ns16550a";
			current-speed = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
			reg = <0x02530c00 0x100>;
			clocks	= <&clkuart0>;
			interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
		};

		uart1:	serial@02531000 {
			compatible = "ns16550a";
			current-speed = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
			reg = <0x02531000 0x100>;
			clocks	= <&clkuart1>;
			interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
		};

		i2c0: i2c@2530000 {
			compatible = "ti,davinci-i2c";
			reg = <0x02530000 0x400>;
			clock-frequency = <100000>;
			clocks = <&clki2c>;
			interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c1: i2c@2530400 {
			compatible = "ti,davinci-i2c";
			reg = <0x02530400 0x400>;
			clock-frequency = <100000>;
			clocks = <&clki2c>;
			interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c2: i2c@2530800 {
			compatible = "ti,davinci-i2c";
			reg = <0x02530800 0x400>;
			clock-frequency = <100000>;
			clocks = <&clki2c>;
			interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi0: spi@21000400 {
			compatible = "ti,dm6441-spi";
			reg = <0x21000400 0x200>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <0>;
			interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkspi>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi1: spi@21000600 {
			compatible = "ti,dm6441-spi";
			reg = <0x21000600 0x200>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <0>;
			interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkspi>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi2: spi@21000800 {
			compatible = "ti,dm6441-spi";
			reg = <0x21000800 0x200>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <0>;
			interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkspi>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		usb_phy: usb_phy@2620738 {
			compatible = "ti,keystone-usbphy";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x2620738 32>;
			status = "disabled";
		};

		usb: usb@2680000 {
			compatible = "ti,keystone-dwc3";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x2680000 0x10000>;
			clocks = <&clkusb>;
			clock-names = "usb";
			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
			ranges;
			status = "disabled";

			dwc3@2690000 {
				compatible = "synopsys,dwc3";
				reg = <0x2690000 0x70000>;
				interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
				usb-phy = <&usb_phy>, <&usb_phy>;
			};
		};

		wdt: wdt@022f0080 {
			compatible = "ti,keystone-wdt","ti,davinci-wdt";
			reg = <0x022f0080 0x80>;
			clocks = <&clkwdtimer0>;
		};

		clock_event: timer@22f0000 {
			compatible = "ti,keystone-timer";
			reg = <0x022f0000 0x80>;
			interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clktimer15>;
		};

		gpio0: gpio@260bf00 {
			compatible = "ti,keystone-gpio";
			reg = <0x0260bf00 0x100>;
			gpio-controller;
			#gpio-cells = <2>;
			/* HW Interrupts mapped to GPIO pins */
			interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkgpio>;
			clock-names = "gpio";
			ti,ngpio = <32>;
			ti,davinci-gpio-unbanked = <32>;
		};

		aemif: aemif@21000A00 {
			compatible = "ti,keystone-aemif", "ti,davinci-aemif";
			#address-cells = <2>;
			#size-cells = <1>;
			clocks = <&clkaemif>;
			clock-names = "aemif";
			clock-ranges;

			reg = <0x21000A00 0x00000100>;
			ranges = <0 0 0x30000000 0x10000000
				  1 0 0x21000A00 0x00000100>;
		};
	};
};
Commit	Line	Data
d5e9fe84 SS	1	/*
	2	* Copyright 2013 Texas Instruments, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
eb788f43	9	#include <dt-bindings/interrupt-controller/arm-gic.h>
970c2256	10	#include <dt-bindings/gpio/gpio.h>
eb788f43	11
226d1c5b	12	#include "skeleton.dtsi"
d5e9fe84 SS	13
	14	/ {
	15	model = "Texas Instruments Keystone 2 SoC";
d5e9fe84 SS	16	#address-cells = <2>;
	17	#size-cells = <2>;
	18	interrupt-parent = <&gic>;
	19
	20	aliases {
	21	serial0 = &uart0;
	22	};
	23
	24	memory {
	25	reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	26	};
	27
d5e9fe84 SS	28	gic: interrupt-controller {
	29	compatible = "arm,cortex-a15-gic";
	30	#interrupt-cells = <3>;
d5e9fe84 SS	31	interrupt-controller;
d5e9fe84 SS	32	reg = <0x0 0x02561000 0x0 0x1000>,
a18b4aa2 SS	33	<0x0 0x02562000 0x0 0x2000>,
	34	<0x0 0x02564000 0x0 0x1000>,
	35	<0x0 0x02566000 0x0 0x2000>;
0ee15444 SS	36	interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) \|
0ee15444 SS	37	IRQ_TYPE_LEVEL_HIGH)>;
d5e9fe84 SS	38	};
	39
	40	timer {
	41	compatible = "arm,armv7-timer";
eb788f43 SS	42	interrupts =
	43	<GIC_PPI 13
	44	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	45	<GIC_PPI 14
	46	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	47	<GIC_PPI 11
	48	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	49	<GIC_PPI 10
	50	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>;
d5e9fe84 SS	51	};
	52
	53	pmu {
	54	compatible = "arm,cortex-a15-pmu";
eb788f43 SS	55	interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
	56	<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
	57	<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
	58	<GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
d5e9fe84 SS	59	};
	60
	61	soc {
	62	#address-cells = <1>;
	63	#size-cells = <1>;
	64	compatible = "ti,keystone","simple-bus";
	65	interrupt-parent = <&gic>;
	66	ranges = <0x0 0x0 0x0 0xc0000000>;
4d46596d	67	dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
d5e9fe84 SS	68
	69	rstctrl: reset-controller {
	70	compatible = "ti,keystone-reset";
	71	reg = <0x023100e8 4>; /* pll reset control reg */
	72	};
	73
feeea8f3 SS	74	/include/ "keystone-clocks.dtsi"
feeea8f3 SS	75
d5e9fe84 SS	76	uart0: serial@02530c00 {
	77	compatible = "ns16550a";
	78	current-speed = <115200>;
	79	reg-shift = <2>;
	80	reg-io-width = <4>;
	81	reg = <0x02530c00 0x100>;
f023bd10	82	clocks = <&clkuart0>;
eb788f43	83	interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
d5e9fe84 SS	84	};
	85
	86	uart1: serial@02531000 {
	87	compatible = "ns16550a";
	88	current-speed = <115200>;
	89	reg-shift = <2>;
	90	reg-io-width = <4>;
	91	reg = <0x02531000 0x100>;
f023bd10	92	clocks = <&clkuart1>;
eb788f43	93	interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
d5e9fe84 SS	94	};
d5e9fe84 SS	95
6120ac23 SS	96	i2c0: i2c@2530000 {
	97	compatible = "ti,davinci-i2c";
	98	reg = <0x02530000 0x400>;
	99	clock-frequency = <100000>;
	100	clocks = <&clki2c>;
	101	interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
	102	#address-cells = <1>;
	103	#size-cells = <0>;
6120ac23 SS	104	};
	105
	106	i2c1: i2c@2530400 {
	107	compatible = "ti,davinci-i2c";
	108	reg = <0x02530400 0x400>;
	109	clock-frequency = <100000>;
	110	clocks = <&clki2c>;
	111	interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
3953505a GS	112	#address-cells = <1>;
3953505a GS	113	#size-cells = <0>;
6120ac23 SS	114	};
	115
	116	i2c2: i2c@2530800 {
	117	compatible = "ti,davinci-i2c";
	118	reg = <0x02530800 0x400>;
	119	clock-frequency = <100000>;
	120	clocks = <&clki2c>;
	121	interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
3953505a GS	122	#address-cells = <1>;
3953505a GS	123	#size-cells = <0>;
6120ac23	124	};
b3bd6c59 SS	125
	126	spi0: spi@21000400 {
	127	compatible = "ti,dm6441-spi";
	128	reg = <0x21000400 0x200>;
	129	num-cs = <4>;
	130	ti,davinci-spi-intr-line = <0>;
	131	interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
	132	clocks = <&clkspi>;
509046a7 GS	133	#address-cells = <1>;
509046a7 GS	134	#size-cells = <0>;
b3bd6c59 SS	135	};
	136
	137	spi1: spi@21000600 {
	138	compatible = "ti,dm6441-spi";
	139	reg = <0x21000600 0x200>;
	140	num-cs = <4>;
	141	ti,davinci-spi-intr-line = <0>;
	142	interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
	143	clocks = <&clkspi>;
509046a7 GS	144	#address-cells = <1>;
509046a7 GS	145	#size-cells = <0>;
b3bd6c59 SS	146	};
	147
	148	spi2: spi@21000800 {
	149	compatible = "ti,dm6441-spi";
	150	reg = <0x21000800 0x200>;
	151	num-cs = <4>;
	152	ti,davinci-spi-intr-line = <0>;
	153	interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
	154	clocks = <&clkspi>;
509046a7 GS	155	#address-cells = <1>;
509046a7 GS	156	#size-cells = <0>;
b3bd6c59	157	};
08c36762 WK	158
	159	usb_phy: usb_phy@2620738 {
	160	compatible = "ti,keystone-usbphy";
	161	#address-cells = <1>;
	162	#size-cells = <1>;
	163	reg = <0x2620738 32>;
	164	status = "disabled";
	165	};
73207956 WK	166
	167	usb: usb@2680000 {
	168	compatible = "ti,keystone-dwc3";
	169	#address-cells = <1>;
	170	#size-cells = <1>;
	171	reg = <0x2680000 0x10000>;
	172	clocks = <&clkusb>;
	173	clock-names = "usb";
	174	interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
	175	ranges;
	176	status = "disabled";
	177
	178	dwc3@2690000 {
	179	compatible = "synopsys,dwc3";
	180	reg = <0x2690000 0x70000>;
	181	interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
	182	usb-phy = <&usb_phy>, <&usb_phy>;
	183	};
	184	};
20d89313 IK	185
	186	wdt: wdt@022f0080 {
	187	compatible = "ti,keystone-wdt","ti,davinci-wdt";
	188	reg = <0x022f0080 0x80>;
	189	clocks = <&clkwdtimer0>;
	190	};
2b4f76b6 IK	191
	192	clock_event: timer@22f0000 {
	193	compatible = "ti,keystone-timer";
	194	reg = <0x022f0000 0x80>;
	195	interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
	196	clocks = <&clktimer15>;
	197	};
970c2256 GS	198
	199	gpio0: gpio@260bf00 {
	200	compatible = "ti,keystone-gpio";
	201	reg = <0x0260bf00 0x100>;
	202	gpio-controller;
	203	#gpio-cells = <2>;
	204	/* HW Interrupts mapped to GPIO pins */
	205	interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
	206	<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
	207	<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
	208	<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
	209	<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
	210	<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
	211	<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
	212	<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
	213	<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
	214	<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
	215	<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
	216	<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
	217	<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
	218	<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
	219	<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
	220	<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
	221	<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
	222	<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
	223	<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
	224	<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
	225	<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
	226	<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
	227	<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
	228	<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
	229	<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
	230	<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
	231	<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
	232	<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
	233	<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
	234	<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
	235	<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
	236	<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
	237	clocks = <&clkgpio>;
	238	clock-names = "gpio";
	239	ti,ngpio = <32>;
	240	ti,davinci-gpio-unbanked = <32>;
	241	};
82c04f71 IK	242
	243	aemif: aemif@21000A00 {
	244	compatible = "ti,keystone-aemif", "ti,davinci-aemif";
	245	#address-cells = <2>;
	246	#size-cells = <1>;
	247	clocks = <&clkaemif>;
	248	clock-names = "aemif";
	249	clock-ranges;
	250
	251	reg = <0x21000A00 0x00000100>;
	252	ranges = <0 0 0x30000000 0x10000000
	253	1 0 0x21000A00 0x00000100>;
	254	};
d5e9fe84 SS	255	};
d5e9fe84 SS	256	};