[deliverable/linux.git] / arch / arm / boot / dts / keystone.dtsi

/*
 * Copyright 2013 Texas Instruments, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>

#include "skeleton.dtsi"

/ {
	model = "Texas Instruments Keystone 2 SoC";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	aliases {
		serial0	= &uart0;
	};

	memory {
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	};

	gic: interrupt-controller {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x0 0x02561000 0x0 0x1000>,
		      <0x0 0x02562000 0x0 0x2000>,
		      <0x0 0x02564000 0x0 0x1000>,
		      <0x0 0x02566000 0x0 0x2000>;
		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
				IRQ_TYPE_LEVEL_HIGH)>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts =
			<GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 11
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "ti,keystone","simple-bus";
		interrupt-parent = <&gic>;
		ranges = <0x0 0x0 0x0 0xc0000000>;

		rstctrl: reset-controller {
			compatible = "ti,keystone-reset";
			reg = <0x023100e8 4>;	/* pll reset control reg */
		};

		/include/ "keystone-clocks.dtsi"

		uart0: serial@02530c00 {
			compatible = "ns16550a";
			current-speed = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
			reg = <0x02530c00 0x100>;
			clocks	= <&clkuart0>;
			interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
		};

		uart1:	serial@02531000 {
			compatible = "ns16550a";
			current-speed = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
			reg = <0x02531000 0x100>;
			clocks	= <&clkuart1>;
			interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
		};

		i2c0: i2c@2530000 {
			compatible = "ti,davinci-i2c";
			reg = <0x02530000 0x400>;
			clock-frequency = <100000>;
			clocks = <&clki2c>;
			interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;

			dtt@50 {
				compatible = "at,24c1024";
				reg = <0x50>;
			};
		};

		i2c1: i2c@2530400 {
			compatible = "ti,davinci-i2c";
			reg = <0x02530400 0x400>;
			clock-frequency = <100000>;
			clocks = <&clki2c>;
			interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
		};

		i2c2: i2c@2530800 {
			compatible = "ti,davinci-i2c";
			reg = <0x02530800 0x400>;
			clock-frequency = <100000>;
			clocks = <&clki2c>;
			interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
		};

		spi0: spi@21000400 {
			compatible = "ti,dm6441-spi";
			reg = <0x21000400 0x200>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <0>;
			interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkspi>;
		};

		spi1: spi@21000600 {
			compatible = "ti,dm6441-spi";
			reg = <0x21000600 0x200>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <0>;
			interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkspi>;
		};

		spi2: spi@21000800 {
			compatible = "ti,dm6441-spi";
			reg = <0x21000800 0x200>;
			num-cs = <4>;
			ti,davinci-spi-intr-line = <0>;
			interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkspi>;
		};

		usb_phy: usb_phy@2620738 {
			compatible = "ti,keystone-usbphy";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x2620738 32>;
			status = "disabled";
		};

		usb: usb@2680000 {
			compatible = "ti,keystone-dwc3";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x2680000 0x10000>;
			clocks = <&clkusb>;
			clock-names = "usb";
			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
			ranges;
			status = "disabled";

			dwc3@2690000 {
				compatible = "synopsys,dwc3";
				reg = <0x2690000 0x70000>;
				interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
				usb-phy = <&usb_phy>, <&usb_phy>;
			};
		};

		wdt: wdt@022f0080 {
			compatible = "ti,keystone-wdt","ti,davinci-wdt";
			reg = <0x022f0080 0x80>;
			clocks = <&clkwdtimer0>;
		};

		clock_event: timer@22f0000 {
			compatible = "ti,keystone-timer";
			reg = <0x022f0000 0x80>;
			interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clktimer15>;
		};

		gpio0: gpio@260bf00 {
			compatible = "ti,keystone-gpio";
			reg = <0x0260bf00 0x100>;
			gpio-controller;
			#gpio-cells = <2>;
			/* HW Interrupts mapped to GPIO pins */
			interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
					<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
			clocks = <&clkgpio>;
			clock-names = "gpio";
			ti,ngpio = <32>;
			ti,davinci-gpio-unbanked = <32>;
		};

		aemif: aemif@21000A00 {
			compatible = "ti,keystone-aemif", "ti,davinci-aemif";
			#address-cells = <2>;
			#size-cells = <1>;
			clocks = <&clkaemif>;
			clock-names = "aemif";
			clock-ranges;

			reg = <0x21000A00 0x00000100>;
			ranges = <0 0 0x30000000 0x10000000
				  1 0 0x21000A00 0x00000100>;
		};
	};
};
Commit	Line	Data
d5e9fe84 SS	1	/*
	2	* Copyright 2013 Texas Instruments, Inc.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
eb788f43	9	#include <dt-bindings/interrupt-controller/arm-gic.h>
970c2256	10	#include <dt-bindings/gpio/gpio.h>
eb788f43	11
226d1c5b	12	#include "skeleton.dtsi"
d5e9fe84 SS	13
	14	/ {
	15	model = "Texas Instruments Keystone 2 SoC";
d5e9fe84 SS	16	#address-cells = <2>;
	17	#size-cells = <2>;
	18	interrupt-parent = <&gic>;
	19
	20	aliases {
	21	serial0 = &uart0;
	22	};
	23
	24	memory {
	25	reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	26	};
	27
d5e9fe84 SS	28	gic: interrupt-controller {
	29	compatible = "arm,cortex-a15-gic";
	30	#interrupt-cells = <3>;
d5e9fe84 SS	31	interrupt-controller;
d5e9fe84 SS	32	reg = <0x0 0x02561000 0x0 0x1000>,
a18b4aa2 SS	33	<0x0 0x02562000 0x0 0x2000>,
	34	<0x0 0x02564000 0x0 0x1000>,
	35	<0x0 0x02566000 0x0 0x2000>;
0ee15444 SS	36	interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) \|
0ee15444 SS	37	IRQ_TYPE_LEVEL_HIGH)>;
d5e9fe84 SS	38	};
	39
	40	timer {
	41	compatible = "arm,armv7-timer";
eb788f43 SS	42	interrupts =
	43	<GIC_PPI 13
	44	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	45	<GIC_PPI 14
	46	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	47	<GIC_PPI 11
	48	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	49	<GIC_PPI 10
	50	(GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>;
d5e9fe84 SS	51	};
	52
	53	pmu {
	54	compatible = "arm,cortex-a15-pmu";
eb788f43 SS	55	interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
	56	<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
	57	<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
	58	<GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
d5e9fe84 SS	59	};
	60
	61	soc {
	62	#address-cells = <1>;
	63	#size-cells = <1>;
	64	compatible = "ti,keystone","simple-bus";
	65	interrupt-parent = <&gic>;
	66	ranges = <0x0 0x0 0x0 0xc0000000>;
	67
	68	rstctrl: reset-controller {
	69	compatible = "ti,keystone-reset";
	70	reg = <0x023100e8 4>; /* pll reset control reg */
	71	};
	72
feeea8f3 SS	73	/include/ "keystone-clocks.dtsi"
feeea8f3 SS	74
d5e9fe84 SS	75	uart0: serial@02530c00 {
	76	compatible = "ns16550a";
	77	current-speed = <115200>;
	78	reg-shift = <2>;
	79	reg-io-width = <4>;
	80	reg = <0x02530c00 0x100>;
f023bd10	81	clocks = <&clkuart0>;
eb788f43	82	interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
d5e9fe84 SS	83	};
	84
	85	uart1: serial@02531000 {
	86	compatible = "ns16550a";
	87	current-speed = <115200>;
	88	reg-shift = <2>;
	89	reg-io-width = <4>;
	90	reg = <0x02531000 0x100>;
f023bd10	91	clocks = <&clkuart1>;
eb788f43	92	interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
d5e9fe84 SS	93	};
d5e9fe84 SS	94
6120ac23 SS	95	i2c0: i2c@2530000 {
	96	compatible = "ti,davinci-i2c";
	97	reg = <0x02530000 0x400>;
	98	clock-frequency = <100000>;
	99	clocks = <&clki2c>;
	100	interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
	101	#address-cells = <1>;
	102	#size-cells = <0>;
	103
	104	dtt@50 {
	105	compatible = "at,24c1024";
	106	reg = <0x50>;
	107	};
	108	};
	109
	110	i2c1: i2c@2530400 {
	111	compatible = "ti,davinci-i2c";
	112	reg = <0x02530400 0x400>;
	113	clock-frequency = <100000>;
	114	clocks = <&clki2c>;
	115	interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
	116	};
	117
	118	i2c2: i2c@2530800 {
	119	compatible = "ti,davinci-i2c";
	120	reg = <0x02530800 0x400>;
	121	clock-frequency = <100000>;
	122	clocks = <&clki2c>;
	123	interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
	124	};
b3bd6c59 SS	125
	126	spi0: spi@21000400 {
	127	compatible = "ti,dm6441-spi";
	128	reg = <0x21000400 0x200>;
	129	num-cs = <4>;
	130	ti,davinci-spi-intr-line = <0>;
	131	interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
	132	clocks = <&clkspi>;
	133	};
	134
	135	spi1: spi@21000600 {
	136	compatible = "ti,dm6441-spi";
	137	reg = <0x21000600 0x200>;
	138	num-cs = <4>;
	139	ti,davinci-spi-intr-line = <0>;
	140	interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
	141	clocks = <&clkspi>;
	142	};
	143
	144	spi2: spi@21000800 {
	145	compatible = "ti,dm6441-spi";
	146	reg = <0x21000800 0x200>;
	147	num-cs = <4>;
	148	ti,davinci-spi-intr-line = <0>;
	149	interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
	150	clocks = <&clkspi>;
	151	};
08c36762 WK	152
	153	usb_phy: usb_phy@2620738 {
	154	compatible = "ti,keystone-usbphy";
	155	#address-cells = <1>;
	156	#size-cells = <1>;
	157	reg = <0x2620738 32>;
	158	status = "disabled";
	159	};
73207956 WK	160
	161	usb: usb@2680000 {
	162	compatible = "ti,keystone-dwc3";
	163	#address-cells = <1>;
	164	#size-cells = <1>;
	165	reg = <0x2680000 0x10000>;
	166	clocks = <&clkusb>;
	167	clock-names = "usb";
	168	interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
	169	ranges;
	170	status = "disabled";
	171
	172	dwc3@2690000 {
	173	compatible = "synopsys,dwc3";
	174	reg = <0x2690000 0x70000>;
	175	interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
	176	usb-phy = <&usb_phy>, <&usb_phy>;
	177	};
	178	};
20d89313 IK	179
	180	wdt: wdt@022f0080 {
	181	compatible = "ti,keystone-wdt","ti,davinci-wdt";
	182	reg = <0x022f0080 0x80>;
	183	clocks = <&clkwdtimer0>;
	184	};
2b4f76b6 IK	185
	186	clock_event: timer@22f0000 {
	187	compatible = "ti,keystone-timer";
	188	reg = <0x022f0000 0x80>;
	189	interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
	190	clocks = <&clktimer15>;
	191	};
970c2256 GS	192
	193	gpio0: gpio@260bf00 {
	194	compatible = "ti,keystone-gpio";
	195	reg = <0x0260bf00 0x100>;
	196	gpio-controller;
	197	#gpio-cells = <2>;
	198	/* HW Interrupts mapped to GPIO pins */
	199	interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
	200	<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
	201	<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
	202	<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
	203	<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
	204	<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
	205	<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
	206	<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
	207	<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
	208	<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
	209	<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
	210	<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
	211	<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
	212	<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
	213	<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
	214	<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
	215	<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
	216	<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
	217	<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
	218	<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
	219	<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
	220	<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
	221	<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
	222	<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
	223	<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
	224	<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
	225	<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
	226	<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
	227	<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
	228	<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
	229	<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
	230	<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
	231	clocks = <&clkgpio>;
	232	clock-names = "gpio";
	233	ti,ngpio = <32>;
	234	ti,davinci-gpio-unbanked = <32>;
	235	};
82c04f71 IK	236
	237	aemif: aemif@21000A00 {
	238	compatible = "ti,keystone-aemif", "ti,davinci-aemif";
	239	#address-cells = <2>;
	240	#size-cells = <1>;
	241	clocks = <&clkaemif>;
	242	clock-names = "aemif";
	243	clock-ranges;
	244
	245	reg = <0x21000A00 0x00000100>;
	246	ranges = <0 0 0x30000000 0x10000000
	247	1 0 0x21000A00 0x00000100>;
	248	};
d5e9fe84 SS	249	};
d5e9fe84 SS	250	};