projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 82bb2da1 | 1 | / { |
| 54397d85 EG |
2 | mbus { |
| 3 | pcie-controller { | |
| 4 | compatible = "marvell,kirkwood-pcie"; | |
| 5 | status = "disabled"; | |
| 6 | device_type = "pci"; | |
| 7 | ||
| 8 | #address-cells = <3>; | |
| 9 | #size-cells = <2>; | |
| 10 | ||
| 11 | bus-range = <0x00 0xff>; | |
| 12 | ||
| 13 | ranges = | |
| 14 | <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 | |
| 15 | 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 | |
| 16 | 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 | |
| 17 | 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ | |
| 18 | 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ | |
| 19 | 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */ | |
| 20 | 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; | |
| 21 | ||
| 22 | pcie@1,0 { | |
| 23 | device_type = "pci"; | |
| 24 | assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; | |
| 25 | reg = <0x0800 0 0 0 0>; | |
| 26 | #address-cells = <3>; | |
| 27 | #size-cells = <2>; | |
| 28 | #interrupt-cells = <1>; | |
| 29 | ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 | |
| 30 | 0x81000000 0 0 0x81000000 0x1 0 1 0>; | |
| 31 | interrupt-map-mask = <0 0 0 0>; | |
| 32 | interrupt-map = <0 0 0 0 &intc 9>; | |
| 33 | marvell,pcie-port = <0>; | |
| 34 | marvell,pcie-lane = <0>; | |
| 35 | clocks = <&gate_clk 2>; | |
| 36 | status = "disabled"; | |
| 37 | }; | |
| 38 | ||
| 39 | pcie@2,0 { | |
| 40 | device_type = "pci"; | |
| 41 | assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>; | |
| 42 | reg = <0x1000 0 0 0 0>; | |
| 43 | #address-cells = <3>; | |
| 44 | #size-cells = <2>; | |
| 45 | #interrupt-cells = <1>; | |
| 46 | ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 | |
| 47 | 0x81000000 0 0 0x81000000 0x2 0 1 0>; | |
| 48 | interrupt-map-mask = <0 0 0 0>; | |
| 49 | interrupt-map = <0 0 0 0 &intc 10>; | |
| 50 | marvell,pcie-port = <1>; | |
| 51 | marvell,pcie-lane = <0>; | |
| 52 | clocks = <&gate_clk 18>; | |
| 53 | status = "disabled"; | |
| 54 | }; | |
| 55 | }; | |
| 56 | }; | |
| 82bb2da1 AL |
57 | ocp@f1000000 { |
| 58 | ||
| 59 | pinctrl: pinctrl@10000 { | |
| 60 | compatible = "marvell,88f6282-pinctrl"; | |
| 61 | reg = <0x10000 0x20>; | |
| 62 | ||
| 92904699 NI |
63 | pmx_nand: pmx-nand { |
| 64 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", | |
| 65 | "mpp4", "mpp5", "mpp18", "mpp19"; | |
| 66 | marvell,function = "nand"; | |
| 67 | }; | |
| 68 | ||
| 82bb2da1 AL |
69 | pmx_sata0: pmx-sata0 { |
| 70 | marvell,pins = "mpp5", "mpp21", "mpp23"; | |
| 71 | marvell,function = "sata0"; | |
| 72 | }; | |
| 73 | pmx_sata1: pmx-sata1 { | |
| 74 | marvell,pins = "mpp4", "mpp20", "mpp22"; | |
| 75 | marvell,function = "sata1"; | |
| 76 | }; | |
| 77 | pmx_spi: pmx-spi { | |
| 78 | marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; | |
| 79 | marvell,function = "spi"; | |
| 80 | }; | |
| 81 | pmx_twsi0: pmx-twsi0 { | |
| 82 | marvell,pins = "mpp8", "mpp9"; | |
| 83 | marvell,function = "twsi0"; | |
| 84 | }; | |
| 00211e96 NI |
85 | |
| 86 | pmx_twsi1: pmx-twsi1 { | |
| 87 | marvell,pins = "mpp36", "mpp37"; | |
| 88 | marvell,function = "twsi1"; | |
| 89 | }; | |
| 90 | ||
| 82bb2da1 AL |
91 | pmx_uart0: pmx-uart0 { |
| 92 | marvell,pins = "mpp10", "mpp11"; | |
| 93 | marvell,function = "uart0"; | |
| 94 | }; | |
| 95 | ||
| 96 | pmx_uart1: pmx-uart1 { | |
| 97 | marvell,pins = "mpp13", "mpp14"; | |
| 98 | marvell,function = "uart1"; | |
| 99 | }; | |
| 8059fc1d TP |
100 | pmx_sdio: pmx-sdio { |
| 101 | marvell,pins = "mpp12", "mpp13", "mpp14", | |
| 102 | "mpp15", "mpp16", "mpp17"; | |
| 103 | marvell,function = "sdio"; | |
| 104 | }; | |
| 82bb2da1 | 105 | }; |
| 083651f2 | 106 | |
| d8e0a2b6 JC |
107 | thermal@10078 { |
| 108 | compatible = "marvell,kirkwood-thermal"; | |
| 109 | reg = <0x10078 0x4>; | |
| 110 | status = "okay"; | |
| 111 | }; | |
| 112 | ||
| df6bf2e9 VL |
113 | rtc@10300 { |
| 114 | compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; | |
| 115 | reg = <0x10300 0x20>; | |
| 116 | interrupts = <53>; | |
| 117 | clocks = <&gate_clk 7>; | |
| 118 | }; | |
| 119 | ||
| d8e0a2b6 JC |
120 | i2c@11100 { |
| 121 | compatible = "marvell,mv64xxx-i2c"; | |
| 122 | reg = <0x11100 0x20>; | |
| 123 | #address-cells = <1>; | |
| 124 | #size-cells = <0>; | |
| 125 | interrupts = <32>; | |
| 126 | clock-frequency = <100000>; | |
| 127 | clocks = <&gate_clk 7>; | |
| 128 | status = "disabled"; | |
| 129 | }; | |
| 130 | ||
| df6bf2e9 VL |
131 | sata@80000 { |
| 132 | compatible = "marvell,orion-sata"; | |
| 133 | reg = <0x80000 0x5000>; | |
| 134 | interrupts = <21>; | |
| 135 | clocks = <&gate_clk 14>, <&gate_clk 15>; | |
| 136 | clock-names = "0", "1"; | |
| 0ad82cd8 AL |
137 | phys = <&sata_phy0>, <&sata_phy1>; |
| 138 | phy-names = "port0", "port1"; | |
| df6bf2e9 VL |
139 | status = "disabled"; |
| 140 | }; | |
| 141 | ||
| 142 | mvsdio@90000 { | |
| 143 | compatible = "marvell,orion-sdio"; | |
| 144 | reg = <0x90000 0x200>; | |
| 145 | interrupts = <28>; | |
| 146 | clocks = <&gate_clk 4>; | |
| 0242399e SH |
147 | pinctrl-0 = <&pmx_sdio>; |
| 148 | pinctrl-names = "default"; | |
| df6bf2e9 VL |
149 | bus-width = <4>; |
| 150 | cap-sdio-irq; | |
| 151 | cap-sd-highspeed; | |
| 152 | cap-mmc-highspeed; | |
| 153 | status = "disabled"; | |
| 154 | }; | |
| 82bb2da1 | 155 | }; |
| 083651f2 | 156 | }; |