ARM: dts: kirkwood: add node labels
[deliverable/linux.git] / arch / arm / boot / dts / kirkwood-rd88f6192.dts
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dd943170
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1/*
2 * Marvell RD88F6192 Board descrition
3 *
4 * Andrew Lunn <andrew@lunn.ch>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 *
10 * This file contains the definitions that are common between the three
11 * variants of the Marvell Kirkwood Development Board.
12 */
13/dts-v1/;
14
15#include "kirkwood.dtsi"
16#include "kirkwood-6192.dtsi"
17
18/ {
19 model = "Marvell RD88F6192 reference design";
20 compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood";
21
22 memory {
23 device_type = "memory";
24 reg = <0x00000000 0x20000000>;
25 };
26
27 chosen {
28 bootargs = "console=ttyS0,115200n8";
29 };
30
31 mbus {
32 pcie-controller {
33 status = "okay";
34
35 pcie@1,0 {
36 status = "okay";
37 };
38 };
39 };
40
41 ocp@f1000000 {
42 pinctrl: pinctrl@10000 {
43 pinctrl-0 = <&pmx_usb_power>;
44 pinctrl-names = "default";
45
46 pmx_usb_power: pmx-usb-power {
47 marvell,pins = "mpp10";
48 marvell,function = "gpo";
49 };
50 };
51
52 serial@12000 {
53 status = "okay";
54
55 };
56
57 spi@10600 {
58 status = "okay";
59 pinctrl-0 = <&pmx_spi>;
60 pinctrl-names = "default";
61
62 m25p128@0 {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 compatible = "st,m25p128";
66 reg = <0>;
67 spi-max-frequency = <20000000>;
68 mode = <0>;
69 };
70 };
71
72 sata@80000 {
73 status = "okay";
74 nr-ports = <2>;
75 };
76 };
77
78 regulators {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <0>;
82 pinctrl-0 = <&pmx_usb_power>;
83 pinctrl-names = "default";
84
85 usb_power: regulator@0 {
86 compatible = "regulator-fixed";
87 reg = <0>;
88 regulator-name = "USB VBUS";
89 regulator-min-microvolt = <5000000>;
90 regulator-max-microvolt = <5000000>;
91 enable-active-high;
92 regulator-always-on;
93 regulator-boot-on;
94 gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
95 };
96 };
97};
98
99&mdio {
100 status = "okay";
101
102 ethphy0: ethernet-phy@8 {
103 reg = <8>;
104 };
105};
106
107&eth0 {
108 status = "okay";
109 ethernet0-port@0 {
110 phy-handle = <&ethphy0>;
111 };
112};
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