[deliverable/linux.git] / arch / arm / boot / dts / kirkwood-rd88f6281.dtsi

/*
 * Marvell RD88F6181 Common Board descrition
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * This file contains the definitions that are common between the two
 * variants of the Marvell Kirkwood Development Board.
 */

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = &uart0;
	};

	mbus {
		pcie-controller {
			status = "okay";

			pcie@1,0 {
				status = "okay";
			};
		};
	};

	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			pinctrl-0 = <&pmx_sdio_cd>;
			pinctrl-names = "default";

			pmx_sdio_cd: pmx-sdio-cd {
				marvell,pins = "mpp28";
				marvell,function = "gpio";
			};
		};

		serial@12000 {
			status = "okay";

		};

		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};
		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
			pinctrl-names = "default";
			status = "okay";
			cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
			/* No WP GPIO */
		};
	};

	dsa@0 {
		compatible = "marvell,dsa";
		#address-cells = <2>;
		#size-cells = <0>;

		dsa,ethernet = <&eth0>;
		dsa,mii-bus = <&ethphy1>;

		switch@0 {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "lan1";
			};

			port@1 {
				reg = <1>;
				label = "lan2";
			};

			port@2 {
				reg = <2>;
				label = "lan3";
			};

			port@3 {
				reg = <3>;
				label = "lan4";
			};

			port@5 {
				reg = <5>;
				label = "cpu";
			};
		};
       };
};

&nand {
	status = "okay";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x100000>;
		read-only;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x0100000 0x200000>;
	};

	partition@300000 {
		label = "data";
		reg = <0x0300000 0x500000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@ff {
		reg = <0xff>; /* No PHY attached */
		speed = <1000>;
		duple = <1>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&eth1 {
	status = "okay";
	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};
Commit	Line	Data
e2eaa339 AL	1	/*
	2	* Marvell RD88F6181 Common Board descrition
	3	*
	4	* Andrew Lunn <andrew@lunn.ch>
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*
	10	* This file contains the definitions that are common between the two
	11	* variants of the Marvell Kirkwood Development Board.
	12	*/
	13
	14	#include "kirkwood.dtsi"
	15	#include "kirkwood-6281.dtsi"
	16
	17	/ {
	18	memory {
	19	device_type = "memory";
	20	reg = <0x00000000 0x20000000>;
	21	};
	22
	23	chosen {
	24	bootargs = "console=ttyS0,115200n8";
ab833614	25	stdout-path = &uart0;
e2eaa339 AL	26	};
	27
	28	mbus {
	29	pcie-controller {
	30	status = "okay";
	31
	32	pcie@1,0 {
	33	status = "okay";
	34	};
	35	};
	36	};
	37
	38	ocp@f1000000 {
a9483969	39	pinctrl: pin-controller@10000 {
e2eaa339 AL	40	pinctrl-0 = <&pmx_sdio_cd>;
	41	pinctrl-names = "default";
	42
	43	pmx_sdio_cd: pmx-sdio-cd {
	44	marvell,pins = "mpp28";
	45	marvell,function = "gpio";
	46	};
	47	};
	48
	49	serial@12000 {
	50	status = "okay";
	51
	52	};
	53
	54	sata@80000 {
	55	status = "okay";
	56	nr-ports = <2>;
	57	};
	58	mvsdio@90000 {
	59	pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
	60	pinctrl-names = "default";
	61	status = "okay";
	62	cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
	63	/* No WP GPIO */
	64	};
	65	};
	66
	67	dsa@0 {
	68	compatible = "marvell,dsa";
	69	#address-cells = <2>;
	70	#size-cells = <0>;
	71
	72	dsa,ethernet = <&eth0>;
	73	dsa,mii-bus = <&ethphy1>;
	74
	75	switch@0 {
	76	#address-cells = <1>;
	77	#size-cells = <0>;
	78
	79	port@0 {
	80	reg = <0>;
	81	label = "lan1";
	82	};
	83
	84	port@1 {
	85	reg = <1>;
	86	label = "lan2";
	87	};
	88
	89	port@2 {
	90	reg = <2>;
	91	label = "lan3";
	92	};
	93
	94	port@3 {
	95	reg = <3>;
	96	label = "lan4";
	97	};
	98
	99	port@5 {
	100	reg = <5>;
	101	label = "cpu";
	102	};
	103	};
104	};
105	};
106
107	&nand {
108	status = "okay";
109
110	partition@0 {
111	label = "u-boot";
112	reg = <0x0000000 0x100000>;
113	read-only;
114	};
115
116	partition@100000 {
117	label = "uImage";
118	reg = <0x0100000 0x200000>;
119	};
120
121	partition@300000 {
122	label = "data";
123	reg = <0x0300000 0x500000>;
124	};
125	};
126
127	&mdio {
128	status = "okay";
129
130	ethphy0: ethernet-phy@0 {
131	reg = <0>;
132	};
133
134	ethphy1: ethernet-phy@ff {
135	reg = <0xff>; /* No PHY attached */
136	speed = <1000>;
137	duple = <1>;
138	};
139	};
140
141	&eth0 {
142	status = "okay";
143	ethernet0-port@0 {
144	phy-handle = <&ethphy0>;
145	};
146	};
147
148	&eth1 {
149	status = "okay";
150	ethernet1-port@0 {
151	phy-handle = <&ethphy1>;
152	};
153	};