projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 3d468b6d JC |
1 | /include/ "skeleton.dtsi" |
| 2 | ||
| 3 | / { | |
| 77843504 | 4 | compatible = "marvell,kirkwood"; |
| 278b45b0 AL |
5 | interrupt-parent = <&intc>; |
| 6 | ||
| f9e75922 AL |
7 | aliases { |
| 8 | gpio0 = &gpio0; | |
| 9 | gpio1 = &gpio1; | |
| 10 | }; | |
| 278b45b0 AL |
11 | intc: interrupt-controller { |
| 12 | compatible = "marvell,orion-intc", "marvell,intc"; | |
| 13 | interrupt-controller; | |
| 14 | #interrupt-cells = <1>; | |
| 15 | reg = <0xf1020204 0x04>, | |
| 16 | <0xf1020214 0x04>; | |
| 17 | }; | |
| 3d468b6d | 18 | |
| 163f2cea JC |
19 | ocp@f1000000 { |
| 20 | compatible = "simple-bus"; | |
| f37fbd36 AL |
21 | ranges = <0x00000000 0xf1000000 0x4000000 |
| 22 | 0xf5000000 0xf5000000 0x0000400>; | |
| 163f2cea JC |
23 | #address-cells = <1>; |
| 24 | #size-cells = <1>; | |
| 25 | ||
| 1611f872 AL |
26 | core_clk: core-clocks@10030 { |
| 27 | compatible = "marvell,kirkwood-core-clock"; | |
| 28 | reg = <0x10030 0x4>; | |
| 29 | #clock-cells = <1>; | |
| 30 | }; | |
| 31 | ||
| 278b45b0 AL |
32 | gpio0: gpio@10100 { |
| 33 | compatible = "marvell,orion-gpio"; | |
| 34 | #gpio-cells = <2>; | |
| 35 | gpio-controller; | |
| 36 | reg = <0x10100 0x40>; | |
| f9e75922 AL |
37 | ngpios = <32>; |
| 38 | interrupt-controller; | |
| 09d75bc7 | 39 | #interrupt-cells = <2>; |
| 278b45b0 | 40 | interrupts = <35>, <36>, <37>, <38>; |
| de88747f | 41 | clocks = <&gate_clk 7>; |
| 278b45b0 AL |
42 | }; |
| 43 | ||
| 44 | gpio1: gpio@10140 { | |
| 45 | compatible = "marvell,orion-gpio"; | |
| 46 | #gpio-cells = <2>; | |
| 47 | gpio-controller; | |
| 48 | reg = <0x10140 0x40>; | |
| f9e75922 AL |
49 | ngpios = <18>; |
| 50 | interrupt-controller; | |
| 09d75bc7 | 51 | #interrupt-cells = <2>; |
| 278b45b0 | 52 | interrupts = <39>, <40>, <41>; |
| de88747f | 53 | clocks = <&gate_clk 7>; |
| 278b45b0 AL |
54 | }; |
| 55 | ||
| 163f2cea JC |
56 | serial@12000 { |
| 57 | compatible = "ns16550a"; | |
| 58 | reg = <0x12000 0x100>; | |
| 59 | reg-shift = <2>; | |
| 60 | interrupts = <33>; | |
| 1611f872 | 61 | clocks = <&gate_clk 7>; |
| 163f2cea JC |
62 | status = "disabled"; |
| 63 | }; | |
| 64 | ||
| 65 | serial@12100 { | |
| 66 | compatible = "ns16550a"; | |
| 67 | reg = <0x12100 0x100>; | |
| 68 | reg-shift = <2>; | |
| 69 | interrupts = <34>; | |
| 1611f872 | 70 | clocks = <&gate_clk 7>; |
| 163f2cea JC |
71 | status = "disabled"; |
| 72 | }; | |
| e871b87a JC |
73 | |
| 74 | rtc@10300 { | |
| 77843504 | 75 | compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; |
| e871b87a JC |
76 | reg = <0x10300 0x20>; |
| 77 | interrupts = <53>; | |
| 89c58c19 | 78 | clocks = <&gate_clk 7>; |
| e871b87a | 79 | }; |
| 858156bd | 80 | |
| 76372120 MW |
81 | spi@10600 { |
| 82 | compatible = "marvell,orion-spi"; | |
| 83 | #address-cells = <1>; | |
| 84 | #size-cells = <0>; | |
| 85 | cell-index = <0>; | |
| 86 | interrupts = <23>; | |
| 87 | reg = <0x10600 0x28>; | |
| 1611f872 | 88 | clocks = <&gate_clk 7>; |
| 76372120 MW |
89 | status = "disabled"; |
| 90 | }; | |
| 91 | ||
| 1611f872 AL |
92 | gate_clk: clock-gating-control@2011c { |
| 93 | compatible = "marvell,kirkwood-gating-clock"; | |
| 94 | reg = <0x2011c 0x4>; | |
| 95 | clocks = <&core_clk 0>; | |
| 96 | #clock-cells = <1>; | |
| 97 | }; | |
| 98 | ||
| 1e7bad0f AL |
99 | wdt@20300 { |
| 100 | compatible = "marvell,orion-wdt"; | |
| 101 | reg = <0x20300 0x28>; | |
| 1611f872 | 102 | clocks = <&gate_clk 7>; |
| 1e7bad0f AL |
103 | status = "okay"; |
| 104 | }; | |
| 105 | ||
| c896ed0f AL |
106 | xor@60800 { |
| 107 | compatible = "marvell,orion-xor"; | |
| 108 | reg = <0x60800 0x100 | |
| 109 | 0x60A00 0x100>; | |
| 110 | status = "okay"; | |
| 111 | clocks = <&gate_clk 8>; | |
| 112 | ||
| 113 | xor00 { | |
| 114 | interrupts = <5>; | |
| 115 | dmacap,memcpy; | |
| 116 | dmacap,xor; | |
| 117 | }; | |
| 118 | xor01 { | |
| 119 | interrupts = <6>; | |
| 120 | dmacap,memcpy; | |
| 121 | dmacap,xor; | |
| 122 | dmacap,memset; | |
| 123 | }; | |
| 124 | }; | |
| 125 | ||
| 126 | xor@60900 { | |
| 127 | compatible = "marvell,orion-xor"; | |
| 128 | reg = <0x60900 0x100 | |
| 129 | 0xd0B00 0x100>; | |
| 1e7bad0f | 130 | status = "okay"; |
| c896ed0f AL |
131 | clocks = <&gate_clk 16>; |
| 132 | ||
| 133 | xor00 { | |
| 134 | interrupts = <7>; | |
| 135 | dmacap,memcpy; | |
| 136 | dmacap,xor; | |
| 137 | }; | |
| 138 | xor01 { | |
| 139 | interrupts = <8>; | |
| 140 | dmacap,memcpy; | |
| 141 | dmacap,xor; | |
| 142 | dmacap,memset; | |
| 143 | }; | |
| 1e7bad0f AL |
144 | }; |
| 145 | ||
| b6cf8070 AL |
146 | ehci@50000 { |
| 147 | compatible = "marvell,orion-ehci"; | |
| 148 | reg = <0x50000 0x1000>; | |
| 149 | interrupts = <19>; | |
| 53dfa8e4 | 150 | clocks = <&gate_clk 3>; |
| b6cf8070 AL |
151 | status = "okay"; |
| 152 | }; | |
| 153 | ||
| 97b414e1 AL |
154 | sata@80000 { |
| 155 | compatible = "marvell,orion-sata"; | |
| 156 | reg = <0x80000 0x5000>; | |
| 157 | interrupts = <21>; | |
| 1611f872 AL |
158 | clocks = <&gate_clk 14>, <&gate_clk 15>; |
| 159 | clock-names = "0", "1"; | |
| 97b414e1 AL |
160 | status = "disabled"; |
| 161 | }; | |
| 162 | ||
| 858156bd JL |
163 | nand@3000000 { |
| 164 | #address-cells = <1>; | |
| 165 | #size-cells = <1>; | |
| 166 | cle = <0>; | |
| 167 | ale = <1>; | |
| 168 | bank-width = <1>; | |
| 77843504 | 169 | compatible = "marvell,orion-nand"; |
| 858156bd JL |
170 | reg = <0x3000000 0x400>; |
| 171 | chip-delay = <25>; | |
| 172 | /* set partition map and/or chip-delay in board dts */ | |
| 1611f872 | 173 | clocks = <&gate_clk 7>; |
| 858156bd JL |
174 | status = "disabled"; |
| 175 | }; | |
| e91cac0a AL |
176 | |
| 177 | i2c@11000 { | |
| 178 | compatible = "marvell,mv64xxx-i2c"; | |
| 179 | reg = <0x11000 0x20>; | |
| 180 | #address-cells = <1>; | |
| 181 | #size-cells = <0>; | |
| 182 | interrupts = <29>; | |
| 183 | clock-frequency = <100000>; | |
| 1611f872 | 184 | clocks = <&gate_clk 7>; |
| e91cac0a AL |
185 | status = "disabled"; |
| 186 | }; | |
| f37fbd36 AL |
187 | |
| 188 | crypto@30000 { | |
| 189 | compatible = "marvell,orion-crypto"; | |
| 190 | reg = <0x30000 0x10000>, | |
| 191 | <0xf5000000 0x800>; | |
| 192 | reg-names = "regs", "sram"; | |
| 193 | interrupts = <22>; | |
| 1611f872 | 194 | clocks = <&gate_clk 17>; |
| f37fbd36 AL |
195 | status = "okay"; |
| 196 | }; | |
| ec05fcf6 TP |
197 | |
| 198 | mvsdio@90000 { | |
| 199 | compatible = "marvell,orion-sdio"; | |
| 200 | reg = <0x90000 0x200>; | |
| 201 | interrupts = <28>; | |
| 202 | clocks = <&gate_clk 4>; | |
| 203 | status = "disabled"; | |
| 204 | }; | |
| 163f2cea JC |
205 | }; |
| 206 | }; |