[deliverable/linux.git] / arch / arm / boot / dts / logicpd-som-lv.dtsi

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/input/input.h>

/ {
	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	wl12xx_vmmc: wl12xx_vmmc {
		compatible = "regulator-fixed";
		regulator-name = "vwl1271";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio1 3 0>;   /* gpio_3 */
		startup-delay-us = <70000>;
		enable-active-high;
		vin-supply = <&vmmc2>;
	};
};

&gpmc {
	ranges = <0 0 0x00000000 0x1000000>;	/* CS0: 16MB for NAND */

	nand@0,0 {
		linux,mtd-name = "micron,mt29f4g16abbda3w";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		nand-bus-width = <16>;
		ti,nand-ecc-opt = "bch8";
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		gpmc,device-width = <2>;

		gpmc,page-burst-access-ns = <5>;
		gpmc,cycle2cycle-delay-ns = <50>;

		#address-cells = <1>;
		#size-cells = <1>;

		/* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */

		x-loader@0 {
			label = "x-loader";
			reg = <0 0x80000>;
		};

		bootloaders@80000 {
			label = "u-boot";
			reg = <0x80000 0x1e0000>;
		};

		bootloaders_env@260000 {
			label = "u-boot-env";
			reg = <0x260000 0x20000>;
		};

		kernel@280000 {
			label = "kernel";
			reg = <0x280000 0x400000>;
		};

		filesystem@680000 {
			label = "fs";
			reg = <0x680000 0>;	/* 0 = MTDPART_SIZ_FULL */
		};
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;
		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
	};
};

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	clock-frequency = <400000>;
};

&mmc3 {
	interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
	pinctrl-0 = <&mmc3_pins>;
	pinctrl-names = "default";
	vmmc-supply = <&wl12xx_vmmc>;
	non-removable;
	bus-width = <4>;
	cap-power-off-card;
	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1273";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
		ref-clock-frequency = <26000000>;
	};
};

&omap3_pmx_core {
	mmc3_pins: pinmux_mm3_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat4.sdmmc3_dat0 */
			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat5.sdmmc3_dat1 */
			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat2 */
			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat3 */
			OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcbsp4_clkx.gpio_152 */
			OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)	/* sys_boot1.gpio_3 */
			OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
			OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs2.sdmmc_clk */
		>;
	};
	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
		>;
	};
	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)	/* uart2_cts.uart2_cts */
			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)	/* uart2_rts .uart2_rts*/
			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)	/* uart2_tx.uart2_tx */
			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)	/* uart2_rx.uart2_rx */
			OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)	/* GPIO_162,BT_EN */
		>;
	};
	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
		>;
	};
	hsusb_otg_pins: pinmux_hsusb_otg_pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk.hsusb0_clk */
			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp.hsusb0_stp */
			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */
			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */
			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0.hsusb0_data0 */
			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */
			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */
			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3.hsusb0_data3 */
			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4.hsusb0_data4 */
			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5.hsusb0_data5 */
			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6.hsusb0_data6 */
			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */
		>;
	};
};

&uart2 {
	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&twl {
	twl_power: power {
		compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
		ti,use_poweroff;
	};
};

&twl_gpio {
	ti,use-leds;
};
Commit	Line	Data
ab8dd3ae AF	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License version 2 as
	4	* published by the Free Software Foundation.
	5	*/
	6
	7	#include <dt-bindings/input/input.h>
	8
	9	/ {
	10	cpus {
	11	cpu@0 {
	12	cpu0-supply = <&vcc>;
	13	};
	14	};
	15
	16	wl12xx_vmmc: wl12xx_vmmc {
	17	compatible = "regulator-fixed";
	18	regulator-name = "vwl1271";
	19	regulator-min-microvolt = <1800000>;
	20	regulator-max-microvolt = <1800000>;
	21	gpio = <&gpio1 3 0>; /* gpio_3 */
	22	startup-delay-us = <70000>;
	23	enable-active-high;
	24	vin-supply = <&vmmc2>;
	25	};
	26	};
	27
	28	&gpmc {
	29	ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
	30
	31	nand@0,0 {
	32	linux,mtd-name = "micron,mt29f4g16abbda3w";
	33	reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
	34	nand-bus-width = <16>;
	35	ti,nand-ecc-opt = "bch8";
	36	gpmc,sync-clk-ps = <0>;
	37	gpmc,cs-on-ns = <0>;
	38	gpmc,cs-rd-off-ns = <44>;
	39	gpmc,cs-wr-off-ns = <44>;
	40	gpmc,adv-on-ns = <6>;
	41	gpmc,adv-rd-off-ns = <34>;
	42	gpmc,adv-wr-off-ns = <44>;
	43	gpmc,we-off-ns = <40>;
	44	gpmc,oe-off-ns = <54>;
	45	gpmc,access-ns = <64>;
	46	gpmc,rd-cycle-ns = <82>;
	47	gpmc,wr-cycle-ns = <82>;
	48	gpmc,wr-access-ns = <40>;
	49	gpmc,wr-data-mux-bus-ns = <0>;
	50	gpmc,device-width = <2>;
	51
	52	gpmc,page-burst-access-ns = <5>;
	53	gpmc,cycle2cycle-delay-ns = <50>;
	54
	55	#address-cells = <1>;
	56	#size-cells = <1>;
	57
	58	/* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
	59
	60	x-loader@0 {
	61	label = "x-loader";
	62	reg = <0 0x80000>;
	63	};
	64
65	bootloaders@80000 {
66	label = "u-boot";
67	reg = <0x80000 0x1e0000>;
68	};
69
70	bootloaders_env@260000 {
71	label = "u-boot-env";
72	reg = <0x260000 0x20000>;
73	};
74
75	kernel@280000 {
76	label = "kernel";
77	reg = <0x280000 0x400000>;
78	};
79
80	filesystem@680000 {
81	label = "fs";
82	reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */
83	};
84	};
85	};
86
87	&i2c1 {
88	clock-frequency = <2600000>;
89
90	twl: twl@48 {
91	reg = <0x48>;
92	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
93	interrupt-parent = <&intc>;
94	twl_audio: audio {
95	compatible = "ti,twl4030-audio";
96	codec {
97	};
98	};
99	};
100	};
101
102	&i2c2 {
103	clock-frequency = <400000>;
104	};
105
106	&i2c3 {
107	clock-frequency = <400000>;
108	};
109
110	&mmc3 {
111	interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
112	pinctrl-0 = <&mmc3_pins>;
113	pinctrl-names = "default";
114	vmmc-supply = <&wl12xx_vmmc>;
115	non-removable;
116	bus-width = <4>;
117	cap-power-off-card;
118	#address-cells = <1>;
119	#size-cells = <0>;
120	wlcore: wlcore@2 {
121	compatible = "ti,wl1273";
122	reg = <2>;
123	interrupt-parent = <&gpio5>;
124	interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
125	ref-clock-frequency = <26000000>;
126	};
127	};
128
129	&omap3_pmx_core {
130	mmc3_pins: pinmux_mm3_pins {
131	pinctrl-single,pins = <
132	OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
133	OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
134	OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
135	OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP \| MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
136	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP \| MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
137	OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT \| MUX_MODE4) /* sys_boot1.gpio_3 */
138	OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP \| MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
139	OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP \| MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
140	>;
141	};
142	mcbsp2_pins: pinmux_mcbsp2_pins {
143	pinctrl-single,pins = <
144	OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT \| MUX_MODE0) /* mcbsp2_fsx */
145	OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT \| MUX_MODE0) /* mcbsp2_clkx */
146	OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT \| MUX_MODE0) /* mcbsp2_dr */
147	OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT \| MUX_MODE0) /* mcbsp2_dx */
148	>;
149	};
150	uart2_pins: pinmux_uart2_pins {
151	pinctrl-single,pins = <
152	OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT \| MUX_MODE0) /* uart2_cts.uart2_cts */
153	OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT \| MUX_MODE0) /* uart2_rts .uart2_rts*/
154	OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */
155	OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */
156	OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT \| MUX_MODE4) /* GPIO_162,BT_EN */
157	>;
158	};
159	mcspi1_pins: pinmux_mcspi1_pins {
160	pinctrl-single,pins = <
161	OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT \| MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
162	OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT \| MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
163	OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP \| MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
164	OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT \| MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
165	>;
166	};
167	hsusb_otg_pins: pinmux_hsusb_otg_pins {
168	pinctrl-single,pins = <
169	OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT \| MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
170	OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT \| MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
171	OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT \| MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
172	OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT \| MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
173	OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT \| MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
174	OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT \| MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
175	OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT \| MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
176	OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT \| MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
177	OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT \| MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
178	OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT \| MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
179	OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT \| MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
180	OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT \| MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
181	>;
182	};
183	};
184
185	&uart2 {
186	interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
187	pinctrl-names = "default";
188	pinctrl-0 = <&uart2_pins>;
189	};
190
191	&mcspi1 {
192	pinctrl-names = "default";
193	pinctrl-0 = <&mcspi1_pins>;
194	};
195
196	#include "twl4030.dtsi"
197	#include "twl4030_omap3.dtsi"
198
199	&twl {
200	twl_power: power {
201	compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
202	ti,use_poweroff;
203	};
204	};
205
206	&twl_gpio {
207	ti,use-leds;
208	};