projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 56e2d8a6 DB |
1 | /dts-v1/; |
| 2 | ||
| 3 | /include/ "skeleton.dtsi" | |
| 4 | ||
| 5 | / { | |
| 6 | model = "Qualcomm MSM8660 SURF"; | |
| 7 | compatible = "qcom,msm8660-surf", "qcom,msm8660"; | |
| 8 | interrupt-parent = <&intc>; | |
| 9 | ||
| 84071160 | 10 | intc: interrupt-controller@2080000 { |
| 56e2d8a6 DB |
11 | compatible = "qcom,msm-8660-qgic"; |
| 12 | interrupt-controller; | |
| 2b7b9a7d | 13 | #interrupt-cells = <3>; |
| 56e2d8a6 DB |
14 | reg = < 0x02080000 0x1000 >, |
| 15 | < 0x02081000 0x1000 >; | |
| 16 | }; | |
| 17 | ||
| 84071160 | 18 | timer@2000004 { |
| eebdb0c1 SB |
19 | compatible = "qcom,scss-timer", "qcom,msm-timer"; |
| 20 | interrupts = <1 0 0x301>, | |
| 21 | <1 1 0x301>, | |
| 22 | <1 2 0x301>; | |
| 23 | reg = <0x02000000 0x100>; | |
| 24 | clock-frequency = <27000000>, | |
| 25 | <32768>; | |
| 84071160 SB |
26 | cpu-offset = <0x40000>; |
| 27 | }; | |
| 28 | ||
| 56e2d8a6 DB |
29 | serial@19c400000 { |
| 30 | compatible = "qcom,msm-hsuart", "qcom,msm-uart"; | |
| 31 | reg = <0x19c40000 0x1000>, | |
| 32 | <0x19c00000 0x1000>; | |
| 2b7b9a7d | 33 | interrupts = <0 195 0x0>; |
| 56e2d8a6 | 34 | }; |
| 97f00f71 DB |
35 | |
| 36 | qcom,ssbi@500000 { | |
| 37 | compatible = "qcom,ssbi"; | |
| 38 | reg = <0x500000 0x1000>; | |
| 39 | qcom,controller-type = "pmic-arbiter"; | |
| 40 | }; | |
| 56e2d8a6 | 41 | }; |