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f20b933d TL |
1 | /* |
2 | * Device Tree Source for OMAP2 SoC | |
3 | * | |
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /include/ "skeleton.dtsi" | |
12 | ||
13 | / { | |
14 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; | |
4c94ac29 | 15 | interrupt-parent = <&intc>; |
f20b933d TL |
16 | |
17 | aliases { | |
18 | serial0 = &uart1; | |
19 | serial1 = &uart2; | |
20 | serial2 = &uart3; | |
21 | }; | |
22 | ||
23 | cpus { | |
24 | cpu@0 { | |
25 | compatible = "arm,arm1136jf-s"; | |
26 | }; | |
27 | }; | |
28 | ||
29 | soc { | |
30 | compatible = "ti,omap-infra"; | |
31 | mpu { | |
32 | compatible = "ti,omap2-mpu"; | |
33 | ti,hwmods = "mpu"; | |
34 | }; | |
35 | }; | |
36 | ||
37 | ocp { | |
38 | compatible = "simple-bus"; | |
39 | #address-cells = <1>; | |
40 | #size-cells = <1>; | |
41 | ranges; | |
42 | ti,hwmods = "l3_main"; | |
43 | ||
44 | intc: interrupt-controller@1 { | |
45 | compatible = "ti,omap2-intc"; | |
46 | interrupt-controller; | |
47 | #interrupt-cells = <1>; | |
95dca12d JH |
48 | ti,intc-size = <96>; |
49 | reg = <0x480FE000 0x1000>; | |
f20b933d TL |
50 | }; |
51 | ||
52 | uart1: serial@4806a000 { | |
53 | compatible = "ti,omap2-uart"; | |
54 | ti,hwmods = "uart1"; | |
55 | clock-frequency = <48000000>; | |
56 | }; | |
57 | ||
58 | uart2: serial@4806c000 { | |
59 | compatible = "ti,omap2-uart"; | |
60 | ti,hwmods = "uart2"; | |
61 | clock-frequency = <48000000>; | |
62 | }; | |
63 | ||
64 | uart3: serial@4806e000 { | |
65 | compatible = "ti,omap2-uart"; | |
66 | ti,hwmods = "uart3"; | |
67 | clock-frequency = <48000000>; | |
68 | }; | |
fab8ad0b JH |
69 | |
70 | timer2: timer@4802a000 { | |
71 | compatible = "ti,omap2-timer"; | |
72 | reg = <0x4802a000 0x400>; | |
73 | interrupts = <38>; | |
74 | ti,hwmods = "timer2"; | |
75 | }; | |
76 | ||
77 | timer3: timer@48078000 { | |
78 | compatible = "ti,omap2-timer"; | |
79 | reg = <0x48078000 0x400>; | |
80 | interrupts = <39>; | |
81 | ti,hwmods = "timer3"; | |
82 | }; | |
83 | ||
84 | timer4: timer@4807a000 { | |
85 | compatible = "ti,omap2-timer"; | |
86 | reg = <0x4807a000 0x400>; | |
87 | interrupts = <40>; | |
88 | ti,hwmods = "timer4"; | |
89 | }; | |
90 | ||
91 | timer5: timer@4807c000 { | |
92 | compatible = "ti,omap2-timer"; | |
93 | reg = <0x4807c000 0x400>; | |
94 | interrupts = <41>; | |
95 | ti,hwmods = "timer5"; | |
96 | ti,timer-dsp; | |
97 | }; | |
98 | ||
99 | timer6: timer@4807e000 { | |
100 | compatible = "ti,omap2-timer"; | |
101 | reg = <0x4807e000 0x400>; | |
102 | interrupts = <42>; | |
103 | ti,hwmods = "timer6"; | |
104 | ti,timer-dsp; | |
105 | }; | |
106 | ||
107 | timer7: timer@48080000 { | |
108 | compatible = "ti,omap2-timer"; | |
109 | reg = <0x48080000 0x400>; | |
110 | interrupts = <43>; | |
111 | ti,hwmods = "timer7"; | |
112 | ti,timer-dsp; | |
113 | }; | |
114 | ||
115 | timer8: timer@48082000 { | |
116 | compatible = "ti,omap2-timer"; | |
117 | reg = <0x48082000 0x400>; | |
118 | interrupts = <44>; | |
119 | ti,hwmods = "timer8"; | |
120 | ti,timer-dsp; | |
121 | }; | |
122 | ||
123 | timer9: timer@48084000 { | |
124 | compatible = "ti,omap2-timer"; | |
125 | reg = <0x48084000 0x400>; | |
126 | interrupts = <45>; | |
127 | ti,hwmods = "timer9"; | |
128 | ti,timer-pwm; | |
129 | }; | |
130 | ||
131 | timer10: timer@48086000 { | |
132 | compatible = "ti,omap2-timer"; | |
133 | reg = <0x48086000 0x400>; | |
134 | interrupts = <46>; | |
135 | ti,hwmods = "timer10"; | |
136 | ti,timer-pwm; | |
137 | }; | |
138 | ||
139 | timer11: timer@48088000 { | |
140 | compatible = "ti,omap2-timer"; | |
141 | reg = <0x48088000 0x400>; | |
142 | interrupts = <47>; | |
143 | ti,hwmods = "timer11"; | |
144 | ti,timer-pwm; | |
145 | }; | |
146 | ||
147 | timer12: timer@4808a000 { | |
148 | compatible = "ti,omap2-timer"; | |
149 | reg = <0x4808a000 0x400>; | |
150 | interrupts = <48>; | |
151 | ti,hwmods = "timer12"; | |
152 | ti,timer-pwm; | |
153 | }; | |
f20b933d TL |
154 | }; |
155 | }; |