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f20b933d TL |
1 | /* |
2 | * Device Tree Source for OMAP2 SoC | |
3 | * | |
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
6d624eab | 11 | #include <dt-bindings/gpio/gpio.h> |
bcd3cca7 | 12 | #include <dt-bindings/pinctrl/omap.h> |
6d624eab | 13 | |
98ef7957 | 14 | #include "skeleton.dtsi" |
f20b933d TL |
15 | |
16 | / { | |
17 | compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; | |
4c94ac29 | 18 | interrupt-parent = <&intc>; |
f20b933d TL |
19 | |
20 | aliases { | |
21 | serial0 = &uart1; | |
22 | serial1 = &uart2; | |
23 | serial2 = &uart3; | |
24 | }; | |
25 | ||
26 | cpus { | |
eeb25fd5 LP |
27 | #address-cells = <0>; |
28 | #size-cells = <0>; | |
29 | ||
30 | cpu { | |
f20b933d | 31 | compatible = "arm,arm1136jf-s"; |
eeb25fd5 | 32 | device_type = "cpu"; |
f20b933d TL |
33 | }; |
34 | }; | |
35 | ||
9b07b477 JH |
36 | pmu { |
37 | compatible = "arm,arm1136-pmu"; | |
38 | interrupts = <3>; | |
39 | }; | |
40 | ||
f20b933d TL |
41 | soc { |
42 | compatible = "ti,omap-infra"; | |
43 | mpu { | |
44 | compatible = "ti,omap2-mpu"; | |
45 | ti,hwmods = "mpu"; | |
46 | }; | |
47 | }; | |
48 | ||
49 | ocp { | |
50 | compatible = "simple-bus"; | |
51 | #address-cells = <1>; | |
52 | #size-cells = <1>; | |
53 | ranges; | |
54 | ti,hwmods = "l3_main"; | |
55 | ||
56 | intc: interrupt-controller@1 { | |
57 | compatible = "ti,omap2-intc"; | |
58 | interrupt-controller; | |
59 | #interrupt-cells = <1>; | |
95dca12d JH |
60 | ti,intc-size = <96>; |
61 | reg = <0x480FE000 0x1000>; | |
f20b933d TL |
62 | }; |
63 | ||
2c2dc545 JH |
64 | sdma: dma-controller@48056000 { |
65 | compatible = "ti,omap2430-sdma", "ti,omap2420-sdma"; | |
66 | reg = <0x48056000 0x1000>; | |
67 | interrupts = <12>, | |
68 | <13>, | |
69 | <14>, | |
70 | <15>; | |
71 | #dma-cells = <1>; | |
72 | #dma-channels = <32>; | |
73 | #dma-requests = <64>; | |
74 | }; | |
75 | ||
f20b933d TL |
76 | uart1: serial@4806a000 { |
77 | compatible = "ti,omap2-uart"; | |
78 | ti,hwmods = "uart1"; | |
79 | clock-frequency = <48000000>; | |
80 | }; | |
81 | ||
82 | uart2: serial@4806c000 { | |
83 | compatible = "ti,omap2-uart"; | |
84 | ti,hwmods = "uart2"; | |
85 | clock-frequency = <48000000>; | |
86 | }; | |
87 | ||
88 | uart3: serial@4806e000 { | |
89 | compatible = "ti,omap2-uart"; | |
90 | ti,hwmods = "uart3"; | |
91 | clock-frequency = <48000000>; | |
92 | }; | |
fab8ad0b JH |
93 | |
94 | timer2: timer@4802a000 { | |
002e1ec5 | 95 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
96 | reg = <0x4802a000 0x400>; |
97 | interrupts = <38>; | |
98 | ti,hwmods = "timer2"; | |
99 | }; | |
100 | ||
101 | timer3: timer@48078000 { | |
002e1ec5 | 102 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
103 | reg = <0x48078000 0x400>; |
104 | interrupts = <39>; | |
105 | ti,hwmods = "timer3"; | |
106 | }; | |
107 | ||
108 | timer4: timer@4807a000 { | |
002e1ec5 | 109 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
110 | reg = <0x4807a000 0x400>; |
111 | interrupts = <40>; | |
112 | ti,hwmods = "timer4"; | |
113 | }; | |
114 | ||
115 | timer5: timer@4807c000 { | |
002e1ec5 | 116 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
117 | reg = <0x4807c000 0x400>; |
118 | interrupts = <41>; | |
119 | ti,hwmods = "timer5"; | |
120 | ti,timer-dsp; | |
121 | }; | |
122 | ||
123 | timer6: timer@4807e000 { | |
002e1ec5 | 124 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
125 | reg = <0x4807e000 0x400>; |
126 | interrupts = <42>; | |
127 | ti,hwmods = "timer6"; | |
128 | ti,timer-dsp; | |
129 | }; | |
130 | ||
131 | timer7: timer@48080000 { | |
002e1ec5 | 132 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
133 | reg = <0x48080000 0x400>; |
134 | interrupts = <43>; | |
135 | ti,hwmods = "timer7"; | |
136 | ti,timer-dsp; | |
137 | }; | |
138 | ||
139 | timer8: timer@48082000 { | |
002e1ec5 | 140 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
141 | reg = <0x48082000 0x400>; |
142 | interrupts = <44>; | |
143 | ti,hwmods = "timer8"; | |
144 | ti,timer-dsp; | |
145 | }; | |
146 | ||
147 | timer9: timer@48084000 { | |
002e1ec5 | 148 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
149 | reg = <0x48084000 0x400>; |
150 | interrupts = <45>; | |
151 | ti,hwmods = "timer9"; | |
152 | ti,timer-pwm; | |
153 | }; | |
154 | ||
155 | timer10: timer@48086000 { | |
002e1ec5 | 156 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
157 | reg = <0x48086000 0x400>; |
158 | interrupts = <46>; | |
159 | ti,hwmods = "timer10"; | |
160 | ti,timer-pwm; | |
161 | }; | |
162 | ||
163 | timer11: timer@48088000 { | |
002e1ec5 | 164 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
165 | reg = <0x48088000 0x400>; |
166 | interrupts = <47>; | |
167 | ti,hwmods = "timer11"; | |
168 | ti,timer-pwm; | |
169 | }; | |
170 | ||
171 | timer12: timer@4808a000 { | |
002e1ec5 | 172 | compatible = "ti,omap2420-timer"; |
fab8ad0b JH |
173 | reg = <0x4808a000 0x400>; |
174 | interrupts = <48>; | |
175 | ti,hwmods = "timer12"; | |
176 | ti,timer-pwm; | |
177 | }; | |
f20b933d TL |
178 | }; |
179 | }; |