[deliverable/linux.git] / arch / arm / boot / dts / omap2430.dtsi

/*
 * Device Tree Source for OMAP243x SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include "omap2.dtsi"

/ {
	compatible = "ti,omap2430", "ti,omap2";

	ocp {
		l4_wkup: l4_wkup@49000000 {
			compatible = "ti,omap2-l4-wkup", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x49000000 0x31000>;

			prcm: prcm@6000 {
				compatible = "ti,omap2-prcm";
				reg = <0x6000 0x1000>;

				prcm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prcm_clockdomains: clockdomains {
				};
			};

			scm: scm@2000 {
				compatible = "ti,omap2-scm", "simple-bus";
				reg = <0x2000 0x1000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x2000 0x1000>;

				omap2430_pmx: pinmux@30 {
					compatible = "ti,omap2430-padconf",
						     "pinctrl-single";
					reg = <0x30 0x0154>;
					#address-cells = <1>;
					#size-cells = <0>;
					pinctrl-single,register-width = <8>;
					pinctrl-single,function-mask = <0x3f>;
				};

				scm_conf: scm_conf@270 {
					compatible = "syscon",
						     "simple-bus";
					reg = <0x270 0x240>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x270 0x240>;

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};

					pbias_regulator: pbias_regulator@230 {
						compatible = "ti,pbias-omap2", "ti,pbias-omap";
						reg = <0x230 0x4>;
						syscon = <&scm_conf>;
						pbias_mmc_reg: pbias_mmc_omap2430 {
							regulator-name = "pbias_mmc_omap2430";
							regulator-min-microvolt = <1800000>;
							regulator-max-microvolt = <3000000>;
						};
					};
				};

				scm_clockdomains: clockdomains {
				};
			};

			counter32k: counter@20000 {
				compatible = "ti,omap-counter32k";
				reg = <0x20000 0x20>;
				ti,hwmods = "counter_32k";
			};
		};

		gpio1: gpio@4900c000 {
			compatible = "ti,omap2-gpio";
			reg = <0x4900c000 0x200>;
			interrupts = <29>;
			ti,hwmods = "gpio1";
			ti,gpio-always-on;
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio2: gpio@4900e000 {
			compatible = "ti,omap2-gpio";
			reg = <0x4900e000 0x200>;
			interrupts = <30>;
			ti,hwmods = "gpio2";
			ti,gpio-always-on;
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio3: gpio@49010000 {
			compatible = "ti,omap2-gpio";
			reg = <0x49010000 0x200>;
			interrupts = <31>;
			ti,hwmods = "gpio3";
			ti,gpio-always-on;
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio4: gpio@49012000 {
			compatible = "ti,omap2-gpio";
			reg = <0x49012000 0x200>;
			interrupts = <32>;
			ti,hwmods = "gpio4";
			ti,gpio-always-on;
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio5: gpio@480b6000 {
			compatible = "ti,omap2-gpio";
			reg = <0x480b6000 0x200>;
			interrupts = <33>;
			ti,hwmods = "gpio5";
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpmc: gpmc@6e000000 {
			compatible = "ti,omap2430-gpmc";
			reg = <0x6e000000 0x1000>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupts = <20>;
			gpmc,num-cs = <8>;
			gpmc,num-waitpins = <4>;
			ti,hwmods = "gpmc";
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		mcbsp1: mcbsp@48074000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48074000 0xff>;
			reg-names = "mpu";
			interrupts = <64>, /* OCP compliant interrupt */
				     <59>, /* TX interrupt */
				     <60>, /* RX interrupt */
				     <61>; /* RX overflow interrupt */
			interrupt-names = "common", "tx", "rx", "rx_overflow";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp1";
			dmas = <&sdma 31>,
			       <&sdma 32>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

		mcbsp2: mcbsp@48076000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48076000 0xff>;
			reg-names = "mpu";
			interrupts = <16>, /* OCP compliant interrupt */
				     <62>, /* TX interrupt */
				     <63>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp2";
			dmas = <&sdma 33>,
			       <&sdma 34>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

		mcbsp3: mcbsp@4808c000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x4808c000 0xff>;
			reg-names = "mpu";
			interrupts = <17>, /* OCP compliant interrupt */
				     <89>, /* TX interrupt */
				     <90>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp3";
			dmas = <&sdma 17>,
			       <&sdma 18>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

		mcbsp4: mcbsp@4808e000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x4808e000 0xff>;
			reg-names = "mpu";
			interrupts = <18>, /* OCP compliant interrupt */
				     <54>, /* TX interrupt */
				     <55>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp4";
			dmas = <&sdma 19>,
			       <&sdma 20>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

		mcbsp5: mcbsp@48096000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48096000 0xff>;
			reg-names = "mpu";
			interrupts = <19>, /* OCP compliant interrupt */
				     <81>, /* TX interrupt */
				     <82>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp5";
			dmas = <&sdma 21>,
			       <&sdma 22>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

		mmc1: mmc@4809c000 {
			compatible = "ti,omap2-hsmmc";
			reg = <0x4809c000 0x200>;
			interrupts = <83>;
			ti,hwmods = "mmc1";
			ti,dual-volt;
			dmas = <&sdma 61>, <&sdma 62>;
			dma-names = "tx", "rx";
			pbias-supply = <&pbias_mmc_reg>;
		};

		mmc2: mmc@480b4000 {
			compatible = "ti,omap2-hsmmc";
			reg = <0x480b4000 0x200>;
			interrupts = <86>;
			ti,hwmods = "mmc2";
			dmas = <&sdma 47>, <&sdma 48>;
			dma-names = "tx", "rx";
		};

		mailbox: mailbox@48094000 {
			compatible = "ti,omap2-mailbox";
			reg = <0x48094000 0x200>;
			interrupts = <26>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <6>;
			mbox_dsp: dsp {
				ti,mbox-tx = <0 0 0>;
				ti,mbox-rx = <1 0 0>;
			};
		};

		timer1: timer@49018000 {
			compatible = "ti,omap2420-timer";
			reg = <0x49018000 0x400>;
			interrupts = <37>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		mcspi3: mcspi@480b8000 {
			compatible = "ti,omap2-mcspi";
			ti,hwmods = "mcspi3";
			reg = <0x480b8000 0x100>;
			interrupts = <91>;
			dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
		};

		usb_otg_hs: usb_otg_hs@480ac000 {
			compatible = "ti,omap2-musb";
			ti,hwmods = "usb_otg_hs";
			reg = <0x480ac000 0x1000>;
			interrupts = <93>;
		};

		wd_timer2: wdt@49016000 {
			compatible = "ti,omap2-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x49016000 0x80>;
		};
	};
};

&i2c1 {
	compatible = "ti,omap2430-i2c";
};

&i2c2 {
	compatible = "ti,omap2430-i2c";
};

/include/ "omap24xx-clocks.dtsi"
/include/ "omap2430-clocks.dtsi"
Commit	Line	Data
3f187f82 PU	1	/*
	2	* Device Tree Source for OMAP243x SoC
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
98ef7957	11	#include "omap2.dtsi"
3f187f82 PU	12
	13	/ {
	14	compatible = "ti,omap2430", "ti,omap2";
	15
	16	ocp {
72b10ac0 TK	17	l4_wkup: l4_wkup@49000000 {
	18	compatible = "ti,omap2-l4-wkup", "simple-bus";
	19	#address-cells = <1>;
	20	#size-cells = <1>;
	21	ranges = <0 0x49000000 0x31000>;
bc797691	22
72b10ac0 TK	23	prcm: prcm@6000 {
	24	compatible = "ti,omap2-prcm";
	25	reg = <0x6000 0x1000>;
bc797691	26
72b10ac0 TK	27	prcm_clocks: clocks {
	28	#address-cells = <1>;
	29	#size-cells = <0>;
	30	};
bc797691	31
72b10ac0 TK	32	prcm_clockdomains: clockdomains {
	33	};
	34	};
bc797691	35
72b10ac0 TK	36	scm: scm@2000 {
	37	compatible = "ti,omap2-scm", "simple-bus";
	38	reg = <0x2000 0x1000>;
bc797691	39	#address-cells = <1>;
72b10ac0 TK	40	#size-cells = <1>;
72b10ac0 TK	41	ranges = <0 0x2000 0x1000>;
bc797691	42
72b10ac0 TK	43	omap2430_pmx: pinmux@30 {
	44	compatible = "ti,omap2430-padconf",
	45	"pinctrl-single";
	46	reg = <0x30 0x0154>;
	47	#address-cells = <1>;
	48	#size-cells = <0>;
	49	pinctrl-single,register-width = <8>;
	50	pinctrl-single,function-mask = <0x3f>;
	51	};
bc797691	52
72b10ac0	53	scm_conf: scm_conf@270 {
4317c8c9 KVA	54	compatible = "syscon",
4317c8c9 KVA	55	"simple-bus";
72b10ac0 TK	56	reg = <0x270 0x240>;
	57	#address-cells = <1>;
	58	#size-cells = <1>;
9a5e3f27	59	ranges = <0 0x270 0x240>;
510c0ffd	60
72b10ac0 TK	61	scm_clocks: clocks {
	62	#address-cells = <1>;
	63	#size-cells = <0>;
	64	};
679e3310	65
308cfdaf	66	pbias_regulator: pbias_regulator@230 {
737f146f	67	compatible = "ti,pbias-omap2", "ti,pbias-omap";
72b10ac0 TK	68	reg = <0x230 0x4>;
	69	syscon = <&scm_conf>;
	70	pbias_mmc_reg: pbias_mmc_omap2430 {
	71	regulator-name = "pbias_mmc_omap2430";
	72	regulator-min-microvolt = <1800000>;
	73	regulator-max-microvolt = <3000000>;
	74	};
	75	};
	76	};
	77
	78	scm_clockdomains: clockdomains {
	79	};
	80	};
cd042fe5	81
72b10ac0 TK	82	counter32k: counter@20000 {
	83	compatible = "ti,omap-counter32k";
	84	reg = <0x20000 0x20>;
	85	ti,hwmods = "counter_32k";
cd042fe5 B	86	};
	87	};
	88
423182e3 JH	89	gpio1: gpio@4900c000 {
	90	compatible = "ti,omap2-gpio";
	91	reg = <0x4900c000 0x200>;
	92	interrupts = <29>;
	93	ti,hwmods = "gpio1";
e4b9b9f3	94	ti,gpio-always-on;
423182e3 JH	95	#gpio-cells = <2>;
	96	gpio-controller;
	97	#interrupt-cells = <2>;
	98	interrupt-controller;
	99	};
	100
	101	gpio2: gpio@4900e000 {
	102	compatible = "ti,omap2-gpio";
	103	reg = <0x4900e000 0x200>;
	104	interrupts = <30>;
	105	ti,hwmods = "gpio2";
e4b9b9f3	106	ti,gpio-always-on;
423182e3 JH	107	#gpio-cells = <2>;
	108	gpio-controller;
	109	#interrupt-cells = <2>;
	110	interrupt-controller;
	111	};
	112
	113	gpio3: gpio@49010000 {
	114	compatible = "ti,omap2-gpio";
	115	reg = <0x49010000 0x200>;
	116	interrupts = <31>;
	117	ti,hwmods = "gpio3";
e4b9b9f3	118	ti,gpio-always-on;
423182e3 JH	119	#gpio-cells = <2>;
	120	gpio-controller;
	121	#interrupt-cells = <2>;
	122	interrupt-controller;
	123	};
	124
	125	gpio4: gpio@49012000 {
	126	compatible = "ti,omap2-gpio";
	127	reg = <0x49012000 0x200>;
	128	interrupts = <32>;
	129	ti,hwmods = "gpio4";
e4b9b9f3	130	ti,gpio-always-on;
423182e3 JH	131	#gpio-cells = <2>;
	132	gpio-controller;
	133	#interrupt-cells = <2>;
	134	interrupt-controller;
	135	};
	136
	137	gpio5: gpio@480b6000 {
	138	compatible = "ti,omap2-gpio";
	139	reg = <0x480b6000 0x200>;
	140	interrupts = <33>;
	141	ti,hwmods = "gpio5";
	142	#gpio-cells = <2>;
	143	gpio-controller;
	144	#interrupt-cells = <2>;
	145	interrupt-controller;
	146	};
	147
1c7dbb55 JH	148	gpmc: gpmc@6e000000 {
	149	compatible = "ti,omap2430-gpmc";
	150	reg = <0x6e000000 0x1000>;
	151	#address-cells = <2>;
	152	#size-cells = <1>;
	153	interrupts = <20>;
	154	gpmc,num-cs = <8>;
	155	gpmc,num-waitpins = <4>;
	156	ti,hwmods = "gpmc";
ffee5bf3 RQ	157	interrupt-controller;
	158	#interrupt-cells = <2>;
	159	gpio-controller;
	160	#gpio-cells = <2>;
1c7dbb55 JH	161	};
1c7dbb55 JH	162
3f187f82 PU	163	mcbsp1: mcbsp@48074000 {
	164	compatible = "ti,omap2430-mcbsp";
	165	reg = <0x48074000 0xff>;
	166	reg-names = "mpu";
	167	interrupts = <64>, /* OCP compliant interrupt */
	168	<59>, /* TX interrupt */
	169	<60>, /* RX interrupt */
	170	<61>; /* RX overflow interrupt */
	171	interrupt-names = "common", "tx", "rx", "rx_overflow";
3f187f82 PU	172	ti,buffer-size = <128>;
3f187f82 PU	173	ti,hwmods = "mcbsp1";
4e4ead73 SG	174	dmas = <&sdma 31>,
	175	<&sdma 32>;
	176	dma-names = "tx", "rx";
faa00deb	177	status = "disabled";
3f187f82 PU	178	};
	179
	180	mcbsp2: mcbsp@48076000 {
	181	compatible = "ti,omap2430-mcbsp";
	182	reg = <0x48076000 0xff>;
	183	reg-names = "mpu";
	184	interrupts = <16>, /* OCP compliant interrupt */
	185	<62>, /* TX interrupt */
	186	<63>; /* RX interrupt */
	187	interrupt-names = "common", "tx", "rx";
3f187f82 PU	188	ti,buffer-size = <128>;
3f187f82 PU	189	ti,hwmods = "mcbsp2";
4e4ead73 SG	190	dmas = <&sdma 33>,
	191	<&sdma 34>;
	192	dma-names = "tx", "rx";
faa00deb	193	status = "disabled";
3f187f82 PU	194	};
	195
	196	mcbsp3: mcbsp@4808c000 {
	197	compatible = "ti,omap2430-mcbsp";
	198	reg = <0x4808c000 0xff>;
	199	reg-names = "mpu";
	200	interrupts = <17>, /* OCP compliant interrupt */
	201	<89>, /* TX interrupt */
	202	<90>; /* RX interrupt */
	203	interrupt-names = "common", "tx", "rx";
3f187f82 PU	204	ti,buffer-size = <128>;
3f187f82 PU	205	ti,hwmods = "mcbsp3";
4e4ead73 SG	206	dmas = <&sdma 17>,
	207	<&sdma 18>;
	208	dma-names = "tx", "rx";
faa00deb	209	status = "disabled";
3f187f82 PU	210	};
	211
	212	mcbsp4: mcbsp@4808e000 {
	213	compatible = "ti,omap2430-mcbsp";
	214	reg = <0x4808e000 0xff>;
	215	reg-names = "mpu";
	216	interrupts = <18>, /* OCP compliant interrupt */
	217	<54>, /* TX interrupt */
	218	<55>; /* RX interrupt */
	219	interrupt-names = "common", "tx", "rx";
3f187f82 PU	220	ti,buffer-size = <128>;
3f187f82 PU	221	ti,hwmods = "mcbsp4";
4e4ead73 SG	222	dmas = <&sdma 19>,
	223	<&sdma 20>;
	224	dma-names = "tx", "rx";
faa00deb	225	status = "disabled";
3f187f82 PU	226	};
	227
	228	mcbsp5: mcbsp@48096000 {
	229	compatible = "ti,omap2430-mcbsp";
	230	reg = <0x48096000 0xff>;
	231	reg-names = "mpu";
	232	interrupts = <19>, /* OCP compliant interrupt */
	233	<81>, /* TX interrupt */
	234	<82>; /* RX interrupt */
	235	interrupt-names = "common", "tx", "rx";
3f187f82 PU	236	ti,buffer-size = <128>;
3f187f82 PU	237	ti,hwmods = "mcbsp5";
4e4ead73 SG	238	dmas = <&sdma 21>,
	239	<&sdma 22>;
	240	dma-names = "tx", "rx";
faa00deb	241	status = "disabled";
3f187f82	242	};
fab8ad0b	243
467f4bd2 TL	244	mmc1: mmc@4809c000 {
	245	compatible = "ti,omap2-hsmmc";
	246	reg = <0x4809c000 0x200>;
	247	interrupts = <83>;
	248	ti,hwmods = "mmc1";
	249	ti,dual-volt;
	250	dmas = <&sdma 61>, <&sdma 62>;
	251	dma-names = "tx", "rx";
cd042fe5	252	pbias-supply = <&pbias_mmc_reg>;
467f4bd2 TL	253	};
	254
	255	mmc2: mmc@480b4000 {
	256	compatible = "ti,omap2-hsmmc";
	257	reg = <0x480b4000 0x200>;
	258	interrupts = <86>;
	259	ti,hwmods = "mmc2";
	260	dmas = <&sdma 47>, <&sdma 48>;
	261	dma-names = "tx", "rx";
	262	};
	263
4fe5bd5d SA	264	mailbox: mailbox@48094000 {
	265	compatible = "ti,omap2-mailbox";
	266	reg = <0x48094000 0x200>;
	267	interrupts = <26>;
	268	ti,hwmods = "mailbox";
24df0453	269	#mbox-cells = <1>;
41ffada1 SA	270	ti,mbox-num-users = <4>;
41ffada1 SA	271	ti,mbox-num-fifos = <6>;
d27704d1 SA	272	mbox_dsp: dsp {
	273	ti,mbox-tx = <0 0 0>;
	274	ti,mbox-rx = <1 0 0>;
	275	};
4fe5bd5d SA	276	};
4fe5bd5d SA	277
fab8ad0b	278	timer1: timer@49018000 {
002e1ec5	279	compatible = "ti,omap2420-timer";
fab8ad0b JH	280	reg = <0x49018000 0x400>;
	281	interrupts = <37>;
	282	ti,hwmods = "timer1";
	283	ti,timer-alwon;
	284	};
467f4bd2 TL	285
	286	mcspi3: mcspi@480b8000 {
	287	compatible = "ti,omap2-mcspi";
	288	ti,hwmods = "mcspi3";
	289	reg = <0x480b8000 0x100>;
	290	interrupts = <91>;
	291	dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
	292	dma-names = "tx0", "rx0", "tx1", "rx1";
	293	};
	294
	295	usb_otg_hs: usb_otg_hs@480ac000 {
	296	compatible = "ti,omap2-musb";
	297	ti,hwmods = "usb_otg_hs";
	298	reg = <0x480ac000 0x1000>;
	299	interrupts = <93>;
	300	};
	301
	302	wd_timer2: wdt@49016000 {
	303	compatible = "ti,omap2-wdt";
	304	ti,hwmods = "wd_timer2";
	305	reg = <0x49016000 0x80>;
	306	};
3f187f82 PU	307	};
3f187f82 PU	308	};
467f4bd2 TL	309
	310	&i2c1 {
	311	compatible = "ti,omap2430-i2c";
	312	};
	313
	314	&i2c2 {
	315	compatible = "ti,omap2430-i2c";
	316	};
69a1e7a1 TK	317
	318	/include/ "omap24xx-clocks.dtsi"
	319	/include/ "omap2430-clocks.dtsi"