[deliverable/linux.git] / arch / arm / boot / dts / omap2430.dtsi

/*
 * Device Tree Source for OMAP243x SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "omap2.dtsi"

/ {
	compatible = "ti,omap2430", "ti,omap2";

	ocp {
		counter32k: counter@49020000 {
			compatible = "ti,omap-counter32k";
			reg = <0x49020000 0x20>;
			ti,hwmods = "counter_32k";
		};

		omap2430_pmx: pinmux@49002030 {
			compatible = "ti,omap2430-padconf", "pinctrl-single";
			reg = <0x49002030 0x0154>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-single,register-width = <8>;
			pinctrl-single,function-mask = <0x3f>;
		};

		gpio1: gpio@4900c000 {
			compatible = "ti,omap2-gpio";
			reg = <0x4900c000 0x200>;
			interrupts = <29>;
			ti,hwmods = "gpio1";
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio2: gpio@4900e000 {
			compatible = "ti,omap2-gpio";
			reg = <0x4900e000 0x200>;
			interrupts = <30>;
			ti,hwmods = "gpio2";
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio3: gpio@49010000 {
			compatible = "ti,omap2-gpio";
			reg = <0x49010000 0x200>;
			interrupts = <31>;
			ti,hwmods = "gpio3";
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio4: gpio@49012000 {
			compatible = "ti,omap2-gpio";
			reg = <0x49012000 0x200>;
			interrupts = <32>;
			ti,hwmods = "gpio4";
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpio5: gpio@480b6000 {
			compatible = "ti,omap2-gpio";
			reg = <0x480b6000 0x200>;
			interrupts = <33>;
			ti,hwmods = "gpio5";
			#gpio-cells = <2>;
			gpio-controller;
			#interrupt-cells = <2>;
			interrupt-controller;
		};

		gpmc: gpmc@6e000000 {
			compatible = "ti,omap2430-gpmc";
			reg = <0x6e000000 0x1000>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupts = <20>;
			gpmc,num-cs = <8>;
			gpmc,num-waitpins = <4>;
			ti,hwmods = "gpmc";
		};

		mcbsp1: mcbsp@48074000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48074000 0xff>;
			reg-names = "mpu";
			interrupts = <64>, /* OCP compliant interrupt */
				     <59>, /* TX interrupt */
				     <60>, /* RX interrupt */
				     <61>; /* RX overflow interrupt */
			interrupt-names = "common", "tx", "rx", "rx_overflow";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp1";
			dmas = <&sdma 31>,
			       <&sdma 32>;
			dma-names = "tx", "rx";
		};

		mcbsp2: mcbsp@48076000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48076000 0xff>;
			reg-names = "mpu";
			interrupts = <16>, /* OCP compliant interrupt */
				     <62>, /* TX interrupt */
				     <63>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp2";
			dmas = <&sdma 33>,
			       <&sdma 34>;
			dma-names = "tx", "rx";
		};

		mcbsp3: mcbsp@4808c000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x4808c000 0xff>;
			reg-names = "mpu";
			interrupts = <17>, /* OCP compliant interrupt */
				     <89>, /* TX interrupt */
				     <90>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp3";
			dmas = <&sdma 17>,
			       <&sdma 18>;
			dma-names = "tx", "rx";
		};

		mcbsp4: mcbsp@4808e000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x4808e000 0xff>;
			reg-names = "mpu";
			interrupts = <18>, /* OCP compliant interrupt */
				     <54>, /* TX interrupt */
				     <55>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp4";
			dmas = <&sdma 19>,
			       <&sdma 20>;
			dma-names = "tx", "rx";
		};

		mcbsp5: mcbsp@48096000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48096000 0xff>;
			reg-names = "mpu";
			interrupts = <19>, /* OCP compliant interrupt */
				     <81>, /* TX interrupt */
				     <82>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp5";
			dmas = <&sdma 21>,
			       <&sdma 22>;
			dma-names = "tx", "rx";
		};

		timer1: timer@49018000 {
			compatible = "ti,omap2-timer";
			reg = <0x49018000 0x400>;
			interrupts = <37>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};
	};
};
Commit	Line	Data
3f187f82 PU	1	/*
	2	* Device Tree Source for OMAP243x SoC
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
	11	/include/ "omap2.dtsi"
	12
	13	/ {
	14	compatible = "ti,omap2430", "ti,omap2";
	15
	16	ocp {
510c0ffd JH	17	counter32k: counter@49020000 {
	18	compatible = "ti,omap-counter32k";
	19	reg = <0x49020000 0x20>;
	20	ti,hwmods = "counter_32k";
	21	};
	22
679e3310 TL	23	omap2430_pmx: pinmux@49002030 {
	24	compatible = "ti,omap2430-padconf", "pinctrl-single";
	25	reg = <0x49002030 0x0154>;
	26	#address-cells = <1>;
	27	#size-cells = <0>;
	28	pinctrl-single,register-width = <8>;
	29	pinctrl-single,function-mask = <0x3f>;
	30	};
	31
423182e3 JH	32	gpio1: gpio@4900c000 {
	33	compatible = "ti,omap2-gpio";
	34	reg = <0x4900c000 0x200>;
	35	interrupts = <29>;
	36	ti,hwmods = "gpio1";
	37	#gpio-cells = <2>;
	38	gpio-controller;
	39	#interrupt-cells = <2>;
	40	interrupt-controller;
	41	};
	42
	43	gpio2: gpio@4900e000 {
	44	compatible = "ti,omap2-gpio";
	45	reg = <0x4900e000 0x200>;
	46	interrupts = <30>;
	47	ti,hwmods = "gpio2";
	48	#gpio-cells = <2>;
	49	gpio-controller;
	50	#interrupt-cells = <2>;
	51	interrupt-controller;
	52	};
	53
	54	gpio3: gpio@49010000 {
	55	compatible = "ti,omap2-gpio";
	56	reg = <0x49010000 0x200>;
	57	interrupts = <31>;
	58	ti,hwmods = "gpio3";
	59	#gpio-cells = <2>;
	60	gpio-controller;
	61	#interrupt-cells = <2>;
	62	interrupt-controller;
	63	};
	64
	65	gpio4: gpio@49012000 {
	66	compatible = "ti,omap2-gpio";
	67	reg = <0x49012000 0x200>;
	68	interrupts = <32>;
	69	ti,hwmods = "gpio4";
	70	#gpio-cells = <2>;
	71	gpio-controller;
	72	#interrupt-cells = <2>;
	73	interrupt-controller;
	74	};
	75
	76	gpio5: gpio@480b6000 {
	77	compatible = "ti,omap2-gpio";
	78	reg = <0x480b6000 0x200>;
	79	interrupts = <33>;
	80	ti,hwmods = "gpio5";
	81	#gpio-cells = <2>;
	82	gpio-controller;
	83	#interrupt-cells = <2>;
	84	interrupt-controller;
	85	};
	86
1c7dbb55 JH	87	gpmc: gpmc@6e000000 {
	88	compatible = "ti,omap2430-gpmc";
	89	reg = <0x6e000000 0x1000>;
	90	#address-cells = <2>;
	91	#size-cells = <1>;
	92	interrupts = <20>;
	93	gpmc,num-cs = <8>;
	94	gpmc,num-waitpins = <4>;
	95	ti,hwmods = "gpmc";
	96	};
	97
3f187f82 PU	98	mcbsp1: mcbsp@48074000 {
	99	compatible = "ti,omap2430-mcbsp";
	100	reg = <0x48074000 0xff>;
	101	reg-names = "mpu";
	102	interrupts = <64>, /* OCP compliant interrupt */
	103	<59>, /* TX interrupt */
	104	<60>, /* RX interrupt */
	105	<61>; /* RX overflow interrupt */
	106	interrupt-names = "common", "tx", "rx", "rx_overflow";
3f187f82 PU	107	ti,buffer-size = <128>;
3f187f82 PU	108	ti,hwmods = "mcbsp1";
4e4ead73 SG	109	dmas = <&sdma 31>,
	110	<&sdma 32>;
	111	dma-names = "tx", "rx";
3f187f82 PU	112	};
	113
	114	mcbsp2: mcbsp@48076000 {
	115	compatible = "ti,omap2430-mcbsp";
	116	reg = <0x48076000 0xff>;
	117	reg-names = "mpu";
	118	interrupts = <16>, /* OCP compliant interrupt */
	119	<62>, /* TX interrupt */
	120	<63>; /* RX interrupt */
	121	interrupt-names = "common", "tx", "rx";
3f187f82 PU	122	ti,buffer-size = <128>;
3f187f82 PU	123	ti,hwmods = "mcbsp2";
4e4ead73 SG	124	dmas = <&sdma 33>,
	125	<&sdma 34>;
	126	dma-names = "tx", "rx";
3f187f82 PU	127	};
	128
	129	mcbsp3: mcbsp@4808c000 {
	130	compatible = "ti,omap2430-mcbsp";
	131	reg = <0x4808c000 0xff>;
	132	reg-names = "mpu";
	133	interrupts = <17>, /* OCP compliant interrupt */
	134	<89>, /* TX interrupt */
	135	<90>; /* RX interrupt */
	136	interrupt-names = "common", "tx", "rx";
3f187f82 PU	137	ti,buffer-size = <128>;
3f187f82 PU	138	ti,hwmods = "mcbsp3";
4e4ead73 SG	139	dmas = <&sdma 17>,
	140	<&sdma 18>;
	141	dma-names = "tx", "rx";
3f187f82 PU	142	};
	143
	144	mcbsp4: mcbsp@4808e000 {
	145	compatible = "ti,omap2430-mcbsp";
	146	reg = <0x4808e000 0xff>;
	147	reg-names = "mpu";
	148	interrupts = <18>, /* OCP compliant interrupt */
	149	<54>, /* TX interrupt */
	150	<55>; /* RX interrupt */
	151	interrupt-names = "common", "tx", "rx";
3f187f82 PU	152	ti,buffer-size = <128>;
3f187f82 PU	153	ti,hwmods = "mcbsp4";
4e4ead73 SG	154	dmas = <&sdma 19>,
	155	<&sdma 20>;
	156	dma-names = "tx", "rx";
3f187f82 PU	157	};
	158
	159	mcbsp5: mcbsp@48096000 {
	160	compatible = "ti,omap2430-mcbsp";
	161	reg = <0x48096000 0xff>;
	162	reg-names = "mpu";
	163	interrupts = <19>, /* OCP compliant interrupt */
	164	<81>, /* TX interrupt */
	165	<82>; /* RX interrupt */
	166	interrupt-names = "common", "tx", "rx";
3f187f82 PU	167	ti,buffer-size = <128>;
3f187f82 PU	168	ti,hwmods = "mcbsp5";
4e4ead73 SG	169	dmas = <&sdma 21>,
	170	<&sdma 22>;
	171	dma-names = "tx", "rx";
3f187f82	172	};
fab8ad0b JH	173
	174	timer1: timer@49018000 {
	175	compatible = "ti,omap2-timer";
	176	reg = <0x49018000 0x400>;
	177	interrupts = <37>;
	178	ti,hwmods = "timer1";
	179	ti,timer-alwon;
	180	};
3f187f82 PU	181	};
3f187f82 PU	182	};