Commit | Line | Data |
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5a8095e9 JH |
1 | /* |
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | /dts-v1/; | |
9 | ||
98ef7957 | 10 | #include "omap34xx.dtsi" |
5a8095e9 JH |
11 | |
12 | / { | |
13 | model = "TI OMAP3 BeagleBoard"; | |
14 | compatible = "ti,omap3-beagle", "ti,omap3"; | |
15 | ||
a134be34 NM |
16 | cpus { |
17 | cpu@0 { | |
18 | cpu0-supply = <&vcc>; | |
19 | }; | |
20 | }; | |
21 | ||
5a8095e9 JH |
22 | memory { |
23 | device_type = "memory"; | |
24 | reg = <0x80000000 0x10000000>; /* 256 MB */ | |
25 | }; | |
26 | ||
8cecf52b TV |
27 | aliases { |
28 | display0 = &dvi0; | |
29 | display1 = &tv0; | |
30 | }; | |
31 | ||
5a8095e9 JH |
32 | leds { |
33 | compatible = "gpio-leds"; | |
34 | pmu_stat { | |
35 | label = "beagleboard::pmu_stat"; | |
6d624eab | 36 | gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ |
5a8095e9 JH |
37 | }; |
38 | ||
39 | heartbeat { | |
40 | label = "beagleboard::usr0"; | |
6d624eab | 41 | gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ |
5a8095e9 JH |
42 | linux,default-trigger = "heartbeat"; |
43 | }; | |
44 | ||
45 | mmc { | |
46 | label = "beagleboard::usr1"; | |
6d624eab | 47 | gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ |
5a8095e9 JH |
48 | linux,default-trigger = "mmc0"; |
49 | }; | |
50 | }; | |
51 | ||
2e5f78ae RQ |
52 | /* HS USB Port 2 Power */ |
53 | hsusb2_power: hsusb2_power_reg { | |
54 | compatible = "regulator-fixed"; | |
55 | regulator-name = "hsusb2_vbus"; | |
56 | regulator-min-microvolt = <3300000>; | |
57 | regulator-max-microvolt = <3300000>; | |
3a637e00 | 58 | gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */ |
2e5f78ae RQ |
59 | startup-delay-us = <70000>; |
60 | }; | |
61 | ||
62 | /* HS USB Host PHY on PORT 2 */ | |
63 | hsusb2_phy: hsusb2_phy { | |
64 | compatible = "usb-nop-xceiv"; | |
633b940f | 65 | reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ |
2e5f78ae RQ |
66 | vcc-supply = <&hsusb2_power>; |
67 | }; | |
d641c3d5 | 68 | |
33e9c392 JN |
69 | sound { |
70 | compatible = "ti,omap-twl4030"; | |
71 | ti,model = "omap3beagle"; | |
72 | ||
73 | ti,mcbsp = <&mcbsp2>; | |
33e9c392 JN |
74 | }; |
75 | ||
d641c3d5 KH |
76 | gpio_keys { |
77 | compatible = "gpio-keys"; | |
78 | ||
79 | user { | |
80 | label = "user"; | |
81 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; | |
82 | linux,code = <0x114>; | |
0c4d63b3 | 83 | wakeup-source; |
d641c3d5 KH |
84 | }; |
85 | ||
86 | }; | |
8cecf52b TV |
87 | |
88 | tfp410: encoder@0 { | |
89 | compatible = "ti,tfp410"; | |
90 | powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */ | |
91 | ||
92 | pinctrl-names = "default"; | |
93 | pinctrl-0 = <&tfp410_pins>; | |
94 | ||
95 | ports { | |
96 | #address-cells = <1>; | |
97 | #size-cells = <0>; | |
98 | ||
99 | port@0 { | |
100 | reg = <0>; | |
101 | ||
102 | tfp410_in: endpoint@0 { | |
103 | remote-endpoint = <&dpi_out>; | |
104 | }; | |
105 | }; | |
106 | ||
107 | port@1 { | |
108 | reg = <1>; | |
109 | ||
110 | tfp410_out: endpoint@0 { | |
111 | remote-endpoint = <&dvi_connector_in>; | |
112 | }; | |
113 | }; | |
114 | }; | |
115 | }; | |
116 | ||
117 | dvi0: connector@0 { | |
118 | compatible = "dvi-connector"; | |
119 | label = "dvi"; | |
120 | ||
121 | digital; | |
122 | ||
123 | ddc-i2c-bus = <&i2c3>; | |
124 | ||
125 | port { | |
126 | dvi_connector_in: endpoint { | |
127 | remote-endpoint = <&tfp410_out>; | |
128 | }; | |
129 | }; | |
130 | }; | |
131 | ||
132 | tv0: connector@1 { | |
133 | compatible = "svideo-connector"; | |
134 | label = "tv"; | |
135 | ||
136 | port { | |
137 | tv_connector_in: endpoint { | |
138 | remote-endpoint = <&venc_out>; | |
139 | }; | |
140 | }; | |
141 | }; | |
9d316202 MP |
142 | |
143 | etb@540000000 { | |
144 | compatible = "arm,coresight-etb10", "arm,primecell"; | |
145 | reg = <0x5401b000 0x1000>; | |
146 | ||
9d316202 MP |
147 | clocks = <&emu_src_ck>; |
148 | clock-names = "apb_pclk"; | |
149 | port { | |
150 | etb_in: endpoint { | |
151 | slave-mode; | |
152 | remote-endpoint = <&etm_out>; | |
153 | }; | |
154 | }; | |
155 | }; | |
156 | ||
157 | etm@54010000 { | |
158 | compatible = "arm,coresight-etm3x", "arm,primecell"; | |
159 | reg = <0x54010000 0x1000>; | |
160 | ||
161 | clocks = <&emu_src_ck>; | |
162 | clock-names = "apb_pclk"; | |
163 | port { | |
164 | etm_out: endpoint { | |
165 | remote-endpoint = <&etb_in>; | |
166 | }; | |
167 | }; | |
168 | }; | |
d641c3d5 KH |
169 | }; |
170 | ||
171 | &omap3_pmx_wkup { | |
172 | gpio1_pins: pinmux_gpio1_pins { | |
173 | pinctrl-single,pins = < | |
161312d6 | 174 | OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ |
d641c3d5 KH |
175 | >; |
176 | }; | |
2e5f78ae RQ |
177 | }; |
178 | ||
179 | &omap3_pmx_core { | |
180 | pinctrl-names = "default"; | |
181 | pinctrl-0 = < | |
3d495383 | 182 | &hsusb2_pins |
2e5f78ae RQ |
183 | >; |
184 | ||
3d495383 | 185 | hsusb2_pins: pinmux_hsusb2_pins { |
2e5f78ae | 186 | pinctrl-single,pins = < |
3d495383 LP |
187 | OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ |
188 | OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ | |
189 | OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ | |
190 | OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ | |
191 | OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ | |
192 | OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ | |
2e5f78ae RQ |
193 | >; |
194 | }; | |
b859c1ef KH |
195 | |
196 | uart3_pins: pinmux_uart3_pins { | |
197 | pinctrl-single,pins = < | |
161312d6 JMC |
198 | OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ |
199 | OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ | |
b859c1ef KH |
200 | >; |
201 | }; | |
8cecf52b TV |
202 | |
203 | tfp410_pins: pinmux_tfp410_pins { | |
204 | pinctrl-single,pins = < | |
161312d6 | 205 | OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ |
8cecf52b TV |
206 | >; |
207 | }; | |
208 | ||
209 | dss_dpi_pins: pinmux_dss_dpi_pins { | |
210 | pinctrl-single,pins = < | |
161312d6 JMC |
211 | OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ |
212 | OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ | |
213 | OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ | |
214 | OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ | |
215 | OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ | |
216 | OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ | |
217 | OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ | |
218 | OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ | |
219 | OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ | |
220 | OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ | |
221 | OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ | |
222 | OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ | |
223 | OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ | |
224 | OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ | |
225 | OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ | |
226 | OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ | |
227 | OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ | |
228 | OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ | |
229 | OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ | |
230 | OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ | |
231 | OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ | |
232 | OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ | |
233 | OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ | |
234 | OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ | |
235 | OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ | |
236 | OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ | |
237 | OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ | |
238 | OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ | |
8cecf52b TV |
239 | >; |
240 | }; | |
5a8095e9 JH |
241 | }; |
242 | ||
3d495383 LP |
243 | &omap3_pmx_core2 { |
244 | pinctrl-names = "default"; | |
245 | pinctrl-0 = < | |
246 | &hsusb2_2_pins | |
247 | >; | |
248 | ||
249 | hsusb2_2_pins: pinmux_hsusb2_2_pins { | |
250 | pinctrl-single,pins = < | |
251 | OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ | |
252 | OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ | |
253 | OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ | |
254 | OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ | |
255 | OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ | |
256 | OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ | |
257 | >; | |
258 | }; | |
259 | }; | |
260 | ||
5a8095e9 JH |
261 | &i2c1 { |
262 | clock-frequency = <2600000>; | |
263 | ||
264 | twl: twl@48 { | |
265 | reg = <0x48>; | |
266 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | |
267 | interrupt-parent = <&intc>; | |
33e9c392 JN |
268 | |
269 | twl_audio: audio { | |
270 | compatible = "ti,twl4030-audio"; | |
271 | codec { | |
272 | }; | |
273 | }; | |
5a8095e9 JH |
274 | }; |
275 | }; | |
276 | ||
98ef7957 | 277 | #include "twl4030.dtsi" |
f9688457 | 278 | #include "twl4030_omap3.dtsi" |
5a8095e9 | 279 | |
8cecf52b TV |
280 | &i2c3 { |
281 | clock-frequency = <100000>; | |
282 | }; | |
283 | ||
5a8095e9 JH |
284 | &mmc1 { |
285 | vmmc-supply = <&vmmc1>; | |
286 | vmmc_aux-supply = <&vsim>; | |
287 | bus-width = <8>; | |
288 | }; | |
289 | ||
290 | &mmc2 { | |
291 | status = "disabled"; | |
292 | }; | |
293 | ||
294 | &mmc3 { | |
295 | status = "disabled"; | |
296 | }; | |
2e5f78ae RQ |
297 | |
298 | &usbhshost { | |
299 | port2-mode = "ehci-phy"; | |
300 | }; | |
301 | ||
302 | &usbhsehci { | |
303 | phys = <0 &hsusb2_phy>; | |
304 | }; | |
305 | ||
306 | &twl_gpio { | |
307 | ti,use-leds; | |
308 | /* pullups: BIT(1) */ | |
309 | ti,pullups = <0x000002>; | |
310 | /* | |
311 | * pulldowns: | |
312 | * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13) | |
313 | * BIT(15), BIT(16), BIT(17) | |
314 | */ | |
315 | ti,pulldowns = <0x03a1c4>; | |
316 | }; | |
b859c1ef KH |
317 | |
318 | &uart3 { | |
319 | pinctrl-names = "default"; | |
320 | pinctrl-0 = <&uart3_pins>; | |
c15adae8 | 321 | interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; |
b859c1ef | 322 | }; |
d641c3d5 KH |
323 | |
324 | &gpio1 { | |
325 | pinctrl-names = "default"; | |
326 | pinctrl-0 = <&gpio1_pins>; | |
327 | }; | |
81660208 RQ |
328 | |
329 | &usb_otg_hs { | |
330 | interface-type = <0>; | |
331 | usb-phy = <&usb2_phy>; | |
b462b05a RQ |
332 | phys = <&usb2_phy>; |
333 | phy-names = "usb2-phy"; | |
81660208 RQ |
334 | mode = <3>; |
335 | power = <50>; | |
336 | }; | |
30023a7e RQ |
337 | |
338 | &vaux2 { | |
339 | regulator-name = "vdd_ehci"; | |
340 | regulator-min-microvolt = <1800000>; | |
341 | regulator-max-microvolt = <1800000>; | |
342 | regulator-always-on; | |
343 | }; | |
726322ce PU |
344 | |
345 | &mcbsp2 { | |
346 | status = "okay"; | |
347 | }; | |
8cecf52b TV |
348 | |
349 | /* Needed to power the DPI pins */ | |
350 | &vpll2 { | |
351 | regulator-always-on; | |
352 | }; | |
353 | ||
354 | &dss { | |
355 | status = "ok"; | |
356 | ||
357 | pinctrl-names = "default"; | |
358 | pinctrl-0 = <&dss_dpi_pins>; | |
359 | ||
360 | port { | |
361 | dpi_out: endpoint { | |
362 | remote-endpoint = <&tfp410_in>; | |
363 | data-lines = <24>; | |
364 | }; | |
365 | }; | |
366 | }; | |
367 | ||
368 | &venc { | |
369 | status = "ok"; | |
370 | ||
371 | vdda-supply = <&vdac>; | |
372 | ||
373 | port { | |
374 | venc_out: endpoint { | |
375 | remote-endpoint = <&tv_connector_in>; | |
376 | ti,channels = <2>; | |
377 | }; | |
378 | }; | |
379 | }; | |
d37530a0 RQ |
380 | |
381 | &gpmc { | |
382 | status = "ok"; | |
383 | ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */ | |
384 | ||
385 | /* Chip select 0 */ | |
386 | nand@0,0 { | |
44e47164 | 387 | compatible = "ti,omap2-nand"; |
d37530a0 | 388 | reg = <0 0 4>; /* NAND I/O window, 4 bytes */ |
44e47164 RQ |
389 | interrupt-parent = <&gpmc>; |
390 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ | |
391 | <1 IRQ_TYPE_NONE>; /* termcount */ | |
d37530a0 | 392 | ti,nand-ecc-opt = "ham1"; |
4cb53a23 | 393 | rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ |
d37530a0 RQ |
394 | nand-bus-width = <16>; |
395 | #address-cells = <1>; | |
396 | #size-cells = <1>; | |
397 | ||
398 | gpmc,device-width = <2>; | |
399 | gpmc,cs-on-ns = <0>; | |
400 | gpmc,cs-rd-off-ns = <36>; | |
401 | gpmc,cs-wr-off-ns = <36>; | |
402 | gpmc,adv-on-ns = <6>; | |
403 | gpmc,adv-rd-off-ns = <24>; | |
404 | gpmc,adv-wr-off-ns = <36>; | |
405 | gpmc,oe-on-ns = <6>; | |
406 | gpmc,oe-off-ns = <48>; | |
407 | gpmc,we-on-ns = <6>; | |
408 | gpmc,we-off-ns = <30>; | |
409 | gpmc,rd-cycle-ns = <72>; | |
410 | gpmc,wr-cycle-ns = <72>; | |
411 | gpmc,access-ns = <54>; | |
412 | gpmc,wr-access-ns = <30>; | |
413 | ||
414 | partition@0 { | |
415 | label = "X-Loader"; | |
416 | reg = <0 0x80000>; | |
417 | }; | |
418 | partition@80000 { | |
419 | label = "U-Boot"; | |
420 | reg = <0x80000 0x1e0000>; | |
421 | }; | |
422 | partition@1c0000 { | |
423 | label = "U-Boot Env"; | |
424 | reg = <0x260000 0x20000>; | |
425 | }; | |
426 | partition@280000 { | |
427 | label = "Kernel"; | |
428 | reg = <0x280000 0x400000>; | |
429 | }; | |
430 | partition@780000 { | |
431 | label = "Filesystem"; | |
432 | reg = <0x680000 0xf980000>; | |
433 | }; | |
434 | }; | |
435 | }; |