Commit | Line | Data |
---|---|---|
0f0cfc69 | 1 | /* |
d234e423 | 2 | * Common support for CompuLab CM-T3x30 CoMs |
0f0cfc69 TL |
3 | */ |
4 | ||
d234e423 | 5 | #include "omap3-cm-t3x.dtsi" |
0f0cfc69 | 6 | |
d234e423 | 7 | / { |
0f0cfc69 TL |
8 | cpus { |
9 | cpu@0 { | |
10 | cpu0-supply = <&vcc>; | |
11 | }; | |
12 | }; | |
01e9ef69 DL |
13 | |
14 | sound { | |
15 | compatible = "ti,omap-twl4030"; | |
16 | ti,model = "cm-t35"; | |
17 | ||
18 | ti,mcbsp = <&mcbsp2>; | |
19 | ti,codec = <&twl_audio>; | |
20 | }; | |
0f0cfc69 TL |
21 | }; |
22 | ||
d234e423 DL |
23 | &omap3_pmx_core { |
24 | ||
25 | smsc1_pins: pinmux_smsc1_pins { | |
26 | pinctrl-single,pins = < | |
27 | OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */ | |
28 | OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */ | |
29 | >; | |
30 | }; | |
dcb27bee DL |
31 | |
32 | hsusb0_pins: pinmux_hsusb0_pins { | |
33 | pinctrl-single,pins = < | |
20f670dc TL |
34 | OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ |
35 | OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ | |
36 | OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ | |
37 | OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ | |
38 | OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */ | |
39 | OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ | |
40 | OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ | |
41 | OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */ | |
42 | OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */ | |
43 | OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */ | |
44 | OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */ | |
45 | OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ | |
dcb27bee DL |
46 | >; |
47 | }; | |
d234e423 DL |
48 | }; |
49 | ||
de9949a4 TL |
50 | #include "omap-gpmc-smsc911x.dtsi" |
51 | ||
0f0cfc69 | 52 | &gpmc { |
df73b7f8 DL |
53 | ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ |
54 | <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ | |
0f0cfc69 | 55 | |
de9949a4 | 56 | smsc1: ethernet@gpmc { |
0f0cfc69 | 57 | compatible = "smsc,lan9221", "smsc,lan9115"; |
d234e423 DL |
58 | pinctrl-names = "default"; |
59 | pinctrl-0 = <&smsc1_pins>; | |
0f0cfc69 TL |
60 | interrupt-parent = <&gpio6>; |
61 | interrupts = <3 IRQ_TYPE_LEVEL_LOW>; | |
62 | reg = <5 0 0xff>; | |
0f0cfc69 TL |
63 | }; |
64 | }; | |
65 | ||
66 | &i2c1 { | |
0f0cfc69 TL |
67 | twl: twl@48 { |
68 | reg = <0x48>; | |
69 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | |
70 | interrupt-parent = <&intc>; | |
01e9ef69 DL |
71 | |
72 | twl_audio: audio { | |
73 | compatible = "ti,twl4030-audio"; | |
74 | codec { | |
75 | }; | |
76 | }; | |
0f0cfc69 TL |
77 | }; |
78 | }; | |
79 | ||
80 | #include "twl4030.dtsi" | |
81 | #include "twl4030_omap3.dtsi" | |
828b949f | 82 | #include <dt-bindings/input/input.h> |
0f0cfc69 | 83 | |
e6fb4272 DL |
84 | &venc { |
85 | vdda-supply = <&vdac>; | |
86 | }; | |
87 | ||
d234e423 DL |
88 | &mmc1 { |
89 | vmmc-supply = <&vmmc1>; | |
0f0cfc69 TL |
90 | }; |
91 | ||
92 | &twl_gpio { | |
93 | ti,use-leds; | |
0cc73cd4 DL |
94 | /* pullups: BIT(0) */ |
95 | ti,pullups = <0x000001>; | |
0f0cfc69 | 96 | }; |
ce5abbb8 | 97 | |
828b949f DL |
98 | &twl_keypad { |
99 | linux,keymap = < | |
100 | MATRIX_KEY(0x00, 0x01, KEY_A) | |
101 | MATRIX_KEY(0x00, 0x02, KEY_B) | |
102 | MATRIX_KEY(0x00, 0x03, KEY_LEFT) | |
103 | ||
104 | MATRIX_KEY(0x01, 0x01, KEY_UP) | |
105 | MATRIX_KEY(0x01, 0x02, KEY_ENTER) | |
106 | MATRIX_KEY(0x01, 0x03, KEY_DOWN) | |
107 | ||
108 | MATRIX_KEY(0x02, 0x01, KEY_RIGHT) | |
109 | MATRIX_KEY(0x02, 0x02, KEY_C) | |
110 | MATRIX_KEY(0x02, 0x03, KEY_D) | |
111 | >; | |
112 | }; | |
113 | ||
ce5abbb8 DL |
114 | &hsusb1_phy { |
115 | reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>; | |
116 | }; | |
117 | ||
118 | &hsusb2_phy { | |
119 | reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>; | |
120 | }; | |
dcb27bee DL |
121 | |
122 | &usb_otg_hs { | |
123 | pinctrl-names = "default"; | |
124 | pinctrl-0 = <&hsusb0_pins>; | |
125 | interface-type = <0>; | |
126 | usb-phy = <&usb2_phy>; | |
127 | phys = <&usb2_phy>; | |
128 | phy-names = "usb2-phy"; | |
129 | mode = <3>; | |
130 | power = <50>; | |
131 | }; |