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5992234b TL |
1 | /* |
2 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | /dts-v1/; | |
9 | ||
10 | #include "omap36xx.dtsi" | |
11 | #include "omap3-evm-common.dtsi" | |
12 | ||
13 | ||
14 | / { | |
15 | model = "TI OMAP37XX EVM (TMDSEVM3730)"; | |
57df5380 | 16 | compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3"; |
5992234b TL |
17 | |
18 | memory { | |
19 | device_type = "memory"; | |
20 | reg = <0x80000000 0x10000000>; /* 256 MB */ | |
21 | }; | |
22 | ||
23 | wl12xx_vmmc: wl12xx_vmmc { | |
24 | pinctrl-names = "default"; | |
25 | pinctrl-0 = <&wl12xx_gpio>; | |
26 | }; | |
27 | }; | |
28 | ||
bc10f310 TL |
29 | &dss { |
30 | pinctrl-names = "default"; | |
31 | pinctrl-0 = < | |
32 | &dss_dpi_pins1 | |
33 | &dss_dpi_pins2 | |
34 | >; | |
35 | }; | |
36 | ||
5992234b | 37 | &omap3_pmx_core { |
bc10f310 TL |
38 | dss_dpi_pins1: pinmux_dss_dpi_pins2 { |
39 | pinctrl-single,pins = < | |
40 | OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ | |
41 | OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ | |
42 | OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ | |
43 | OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ | |
44 | ||
45 | OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ | |
46 | OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ | |
47 | OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ | |
48 | OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ | |
49 | OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ | |
50 | OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ | |
51 | OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ | |
52 | OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ | |
53 | OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ | |
54 | OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ | |
55 | OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ | |
56 | OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ | |
57 | ||
58 | OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */ | |
59 | OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */ | |
60 | OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */ | |
61 | OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */ | |
62 | OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */ | |
63 | OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */ | |
64 | >; | |
65 | }; | |
66 | ||
5992234b TL |
67 | mmc1_pins: pinmux_mmc1_pins { |
68 | pinctrl-single,pins = < | |
8acf1b30 JMC |
69 | OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ |
70 | OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ | |
71 | OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ | |
72 | OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ | |
73 | OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ | |
74 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ | |
75 | OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ | |
76 | OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ | |
77 | OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ | |
78 | OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ | |
5992234b TL |
79 | >; |
80 | }; | |
81 | ||
82 | /* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */ | |
83 | mmc2_pins: pinmux_mmc2_pins { | |
84 | pinctrl-single,pins = < | |
8acf1b30 JMC |
85 | OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ |
86 | OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ | |
87 | OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ | |
88 | OMAP3_CORE1_IOPAD(0x215e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ | |
89 | OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ | |
90 | OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ | |
5992234b TL |
91 | >; |
92 | }; | |
93 | ||
94 | uart3_pins: pinmux_uart3_pins { | |
95 | pinctrl-single,pins = < | |
8acf1b30 JMC |
96 | OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ |
97 | OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ | |
5992234b TL |
98 | >; |
99 | }; | |
100 | ||
101 | wl12xx_gpio: pinmux_wl12xx_gpio { | |
102 | pinctrl-single,pins = < | |
8acf1b30 JMC |
103 | OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */ |
104 | OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */ | |
5992234b TL |
105 | >; |
106 | }; | |
107 | ||
108 | smsc911x_pins: pinmux_smsc911x_pins { | |
109 | pinctrl-single,pins = < | |
8acf1b30 | 110 | OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ |
5992234b TL |
111 | >; |
112 | }; | |
113 | }; | |
114 | ||
bc10f310 TL |
115 | &omap3_pmx_wkup { |
116 | dss_dpi_pins2: pinmux_dss_dpi_pins1 { | |
117 | pinctrl-single,pins = < | |
8acf1b30 JMC |
118 | OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */ |
119 | OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */ | |
120 | OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */ | |
121 | OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */ | |
122 | OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */ | |
123 | OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */ | |
bc10f310 TL |
124 | >; |
125 | }; | |
126 | }; | |
127 | ||
5992234b TL |
128 | &mmc1 { |
129 | pinctrl-names = "default"; | |
130 | pinctrl-0 = <&mmc1_pins>; | |
131 | }; | |
132 | ||
133 | &mmc2 { | |
134 | pinctrl-names = "default"; | |
135 | pinctrl-0 = <&mmc2_pins>; | |
136 | }; | |
137 | ||
138 | &mmc3 { | |
139 | status = "disabled"; | |
140 | }; | |
141 | ||
31f0820a TL |
142 | &uart1 { |
143 | interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>; | |
144 | }; | |
145 | ||
146 | &uart2 { | |
147 | interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; | |
148 | }; | |
149 | ||
5992234b | 150 | &uart3 { |
31f0820a | 151 | interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; |
5992234b TL |
152 | pinctrl-names = "default"; |
153 | pinctrl-0 = <&uart3_pins>; | |
154 | }; | |
155 | ||
156 | &gpmc { | |
44e47164 | 157 | ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */ |
5992234b TL |
158 | <5 0 0x2c000000 0x01000000>; |
159 | ||
160 | nand@0,0 { | |
44e47164 RQ |
161 | compatible = "ti,omap2-nand"; |
162 | reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ | |
163 | interrupt-parent = <&gpmc>; | |
164 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ | |
165 | <1 IRQ_TYPE_NONE>; /* termcount */ | |
5992234b | 166 | linux,mtd-name= "hynix,h8kds0un0mer-4em"; |
5992234b | 167 | nand-bus-width = <16>; |
24f284af | 168 | gpmc,device-width = <2>; |
5992234b TL |
169 | ti,nand-ecc-opt = "bch8"; |
170 | ||
171 | gpmc,sync-clk-ps = <0>; | |
172 | gpmc,cs-on-ns = <0>; | |
173 | gpmc,cs-rd-off-ns = <44>; | |
174 | gpmc,cs-wr-off-ns = <44>; | |
175 | gpmc,adv-on-ns = <6>; | |
176 | gpmc,adv-rd-off-ns = <34>; | |
177 | gpmc,adv-wr-off-ns = <44>; | |
178 | gpmc,we-off-ns = <40>; | |
179 | gpmc,oe-off-ns = <54>; | |
180 | gpmc,access-ns = <64>; | |
181 | gpmc,rd-cycle-ns = <82>; | |
182 | gpmc,wr-cycle-ns = <82>; | |
183 | gpmc,wr-access-ns = <40>; | |
184 | gpmc,wr-data-mux-bus-ns = <0>; | |
185 | ||
186 | #address-cells = <1>; | |
187 | #size-cells = <1>; | |
188 | ||
189 | partition@0 { | |
190 | label = "X-Loader"; | |
191 | reg = <0 0x80000>; | |
192 | }; | |
193 | partition@0x80000 { | |
194 | label = "U-Boot"; | |
195 | reg = <0x80000 0x1c0000>; | |
196 | }; | |
197 | partition@0x1c0000 { | |
198 | label = "Environment"; | |
199 | reg = <0x240000 0x40000>; | |
200 | }; | |
201 | partition@0x280000 { | |
202 | label = "Kernel"; | |
203 | reg = <0x280000 0x500000>; | |
204 | }; | |
205 | partition@0x780000 { | |
206 | label = "Filesystem"; | |
207 | reg = <0x780000 0x1f880000>; | |
208 | }; | |
209 | }; | |
210 | ||
211 | ethernet@gpmc { | |
212 | pinctrl-names = "default"; | |
213 | pinctrl-0 = <&smsc911x_pins>; | |
214 | }; | |
215 | }; |