[deliverable/linux.git] / arch / arm / boot / dts / omap3-igep.dtsi

/*
 * Common device tree for IGEP boards based on AM/DM37x
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "omap36xx.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "igep2";
		ti,mcbsp = <&mcbsp2>;
	};

	vdd33: regulator-vdd33 {
		compatible = "regulator-fixed";
		regulator-name = "vdd33";
		regulator-always-on;
	};

};

&omap3_pmx_core {
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x152 (PIN_INPUT | MUX_MODE0)		/* uart1_rx.uart1_rx */
			0x14c (PIN_OUTPUT |MUX_MODE0)		/* uart1_tx.uart1_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x16e (PIN_INPUT | MUX_MODE0)		/* uart3_rx.uart3_rx */
			0x170 (PIN_OUTPUT | MUX_MODE0)		/* uart3_tx.uart3_tx */
		>;
	};

	mcbsp2_pins: pinmux_mcbsp2_pins {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT | MUX_MODE0)		/* mcbsp2_fsx.mcbsp2_fsx */
			0x10e (PIN_INPUT | MUX_MODE0)		/* mcbsp2_clkx.mcbsp2_clkx */
			0x110 (PIN_INPUT | MUX_MODE0)		/* mcbsp2_dr.mcbsp2.dr */
			0x112 (PIN_OUTPUT | MUX_MODE0)		/* mcbsp2_dx.mcbsp2_dx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x114 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			0x116 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			0x118 (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc1_dat0.sdmmc1_dat0 */
			0x11a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			0x11c (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			0x11e (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};

	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			0x128 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			0x12a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			0x12c (PIN_INPUT_PULLUP | MUX_MODE0) 	/* sdmmc2_dat0.sdmmc2_dat0 */
			0x12e (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			0x130 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			0x132 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
		>;
	};

	smsc9221_pins: pinmux_smsc9221_pins {
		pinctrl-single,pins = <
			0x1a2 (PIN_INPUT | MUX_MODE4)		/* mcspi1_cs2.gpio_176 */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x18a (PIN_INPUT | MUX_MODE0)   /* i2c1_scl.i2c1_scl */
			0x18c (PIN_INPUT | MUX_MODE0)   /* i2c1_sda.i2c1_sda */
		>;
	};

	i2c3_pins: pinmux_i2c3_pins {
		pinctrl-single,pins = <
			0x192 (PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
			0x194 (PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
		>;
	};
};

&gpmc {
	nand@0,0 {
		linux,mtd-name= "micron,mt29c4g96maz";
		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		ti,nand-ecc-opt = "bch8";

		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "SPL";
			reg = <0 0x100000>;
		};
		partition@80000 {
			label = "U-Boot";
			reg = <0x100000 0x180000>;
		};
		partition@1c0000 {
			label = "Environment";
			reg = <0x280000 0x100000>;
		};
		partition@280000 {
			label = "Kernel";
			reg = <0x380000 0x300000>;
		};
		partition@780000 {
			label = "Filesystem";
			reg = <0x680000 0x1f980000>;
		};
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			      };
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3_pins>;
};

&mcbsp2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcbsp2_pins>;
	status = "okay";
};

&mmc1 {
      pinctrl-names = "default";
      pinctrl-0 = <&mmc1_pins>;
      vmmc-supply = <&vmmc1>;
      vmmc_aux-supply = <&vsim>;
      bus-width = <4>;
};

&mmc3 {
	status = "disabled";
};

&uart1 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart1_pins>;
};

&uart3 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart3_pins>;
};

&twl_gpio {
	ti,use-leds;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	phys = <&usb2_phy>;
	phy-names = "usb2-phy";
	mode = <3>;
	power = <50>;
};
Commit	Line	Data
947fd0a2	1	/*
9aa36dfd	2	* Common device tree for IGEP boards based on AM/DM37x
947fd0a2 JMC	3	*
	4	* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
	5	* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	/dts-v1/;
	12
9aa36dfd	13	#include "omap36xx.dtsi"
947fd0a2 JMC	14
	15	/ {
	16	memory {
	17	device_type = "memory";
	18	reg = <0x80000000 0x20000000>; /* 512 MB */
	19	};
	20
	21	sound {
	22	compatible = "ti,omap-twl4030";
	23	ti,model = "igep2";
	24	ti,mcbsp = <&mcbsp2>;
947fd0a2	25	};
0e9fd777 EBS	26
	27	vdd33: regulator-vdd33 {
	28	compatible = "regulator-fixed";
	29	regulator-name = "vdd33";
	30	regulator-always-on;
	31	};
	32
947fd0a2 JMC	33	};
	34
	35	&omap3_pmx_core {
bc0b8b70 MB	36	uart1_pins: pinmux_uart1_pins {
bc0b8b70 MB	37	pinctrl-single,pins = <
bcd3cca7 FV	38	0x152 (PIN_INPUT \| MUX_MODE0) /* uart1_rx.uart1_rx */
bcd3cca7 FV	39	0x14c (PIN_OUTPUT \|MUX_MODE0) /* uart1_tx.uart1_tx */
bc0b8b70 MB	40	>;
	41	};
	42
947fd0a2 JMC	43	uart3_pins: pinmux_uart3_pins {
947fd0a2 JMC	44	pinctrl-single,pins = <
bcd3cca7 FV	45	0x16e (PIN_INPUT \| MUX_MODE0) /* uart3_rx.uart3_rx */
bcd3cca7 FV	46	0x170 (PIN_OUTPUT \| MUX_MODE0) /* uart3_tx.uart3_tx */
947fd0a2 JMC	47	>;
	48	};
	49
65399f03 EBS	50	mcbsp2_pins: pinmux_mcbsp2_pins {
	51	pinctrl-single,pins = <
	52	0x10c (PIN_INPUT \| MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
	53	0x10e (PIN_INPUT \| MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
	54	0x110 (PIN_INPUT \| MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
	55	0x112 (PIN_OUTPUT \| MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
	56	>;
	57	};
	58
947fd0a2 JMC	59	mmc1_pins: pinmux_mmc1_pins {
947fd0a2 JMC	60	pinctrl-single,pins = <
bcd3cca7 FV	61	0x114 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
	62	0x116 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
	63	0x118 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
	64	0x11a (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
	65	0x11c (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
	66	0x11e (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
947fd0a2 JMC	67	>;
947fd0a2 JMC	68	};
d72b4415	69
0e9fd777 EBS	70	mmc2_pins: pinmux_mmc2_pins {
	71	pinctrl-single,pins = <
	72	0x128 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
	73	0x12a (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
	74	0x12c (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
	75	0x12e (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
	76	0x130 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
	77	0x132 (PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
	78	>;
	79	};
	80
ef139e13	81	smsc9221_pins: pinmux_smsc9221_pins {
d72b4415	82	pinctrl-single,pins = <
bcd3cca7	83	0x1a2 (PIN_INPUT \| MUX_MODE4) /* mcspi1_cs2.gpio_176 */
d72b4415 JMC	84	>;
d72b4415 JMC	85	};
00964a90	86
d526daeb JMC	87	i2c1_pins: pinmux_i2c1_pins {
	88	pinctrl-single,pins = <
	89	0x18a (PIN_INPUT \| MUX_MODE0) /* i2c1_scl.i2c1_scl */
	90	0x18c (PIN_INPUT \| MUX_MODE0) /* i2c1_sda.i2c1_sda */
	91	>;
	92	};
	93
d526daeb JMC	94	i2c3_pins: pinmux_i2c3_pins {
	95	pinctrl-single,pins = <
	96	0x192 (PIN_INPUT \| MUX_MODE0) /* i2c3_scl.i2c3_scl */
	97	0x194 (PIN_INPUT \| MUX_MODE0) /* i2c3_sda.i2c3_sda */
	98	>;
	99	};
947fd0a2 JMC	100	};
947fd0a2 JMC	101
e170db3c EBS	102	&gpmc {
	103	nand@0,0 {
	104	linux,mtd-name= "micron,mt29c4g96maz";
	105	reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
	106	nand-bus-width = <16>;
	107	gpmc,device-width = <2>;
	108	ti,nand-ecc-opt = "bch8";
	109
	110	gpmc,sync-clk-ps = <0>;
	111	gpmc,cs-on-ns = <0>;
	112	gpmc,cs-rd-off-ns = <44>;
	113	gpmc,cs-wr-off-ns = <44>;
	114	gpmc,adv-on-ns = <6>;
	115	gpmc,adv-rd-off-ns = <34>;
	116	gpmc,adv-wr-off-ns = <44>;
	117	gpmc,we-off-ns = <40>;
	118	gpmc,oe-off-ns = <54>;
	119	gpmc,access-ns = <64>;
	120	gpmc,rd-cycle-ns = <82>;
	121	gpmc,wr-cycle-ns = <82>;
	122	gpmc,wr-access-ns = <40>;
	123	gpmc,wr-data-mux-bus-ns = <0>;
	124
	125	#address-cells = <1>;
	126	#size-cells = <1>;
	127
	128	partition@0 {
	129	label = "SPL";
	130	reg = <0 0x100000>;
	131	};
	132	partition@80000 {
	133	label = "U-Boot";
	134	reg = <0x100000 0x180000>;
	135	};
	136	partition@1c0000 {
	137	label = "Environment";
	138	reg = <0x280000 0x100000>;
	139	};
	140	partition@280000 {
	141	label = "Kernel";
	142	reg = <0x380000 0x300000>;
	143	};
	144	partition@780000 {
	145	label = "Filesystem";
	146	reg = <0x680000 0x1f980000>;
	147	};
	148	};
	149	};
	150
947fd0a2	151	&i2c1 {
d526daeb JMC	152	pinctrl-names = "default";
d526daeb JMC	153	pinctrl-0 = <&i2c1_pins>;
947fd0a2 JMC	154	clock-frequency = <2600000>;
	155
	156	twl: twl@48 {
	157	reg = <0x48>;
	158	interrupts = <7>; /* SYS_NIRQ cascaded to intc */
	159	interrupt-parent = <&intc>;
	160
	161	twl_audio: audio {
	162	compatible = "ti,twl4030-audio";
	163	codec {
	164	};
	165	};
	166	};
	167	};
	168
98ef7957	169	#include "twl4030.dtsi"
f9688457	170	#include "twl4030_omap3.dtsi"
947fd0a2	171
d526daeb JMC	172	&i2c3 {
	173	pinctrl-names = "default";
	174	pinctrl-0 = <&i2c3_pins>;
	175	};
	176
65399f03 EBS	177	&mcbsp2 {
	178	pinctrl-names = "default";
	179	pinctrl-0 = <&mcbsp2_pins>;
726322ce	180	status = "okay";
65399f03 EBS	181	};
65399f03 EBS	182
947fd0a2 JMC	183	&mmc1 {
	184	pinctrl-names = "default";
	185	pinctrl-0 = <&mmc1_pins>;
	186	vmmc-supply = <&vmmc1>;
	187	vmmc_aux-supply = <&vsim>;
8559133d	188	bus-width = <4>;
947fd0a2 JMC	189	};
947fd0a2 JMC	190
947fd0a2 JMC	191	&mmc3 {
	192	status = "disabled";
	193	};
	194
bc0b8b70 MB	195	&uart1 {
	196	pinctrl-names = "default";
	197	pinctrl-0 = <&uart1_pins>;
	198	};
	199
947fd0a2 JMC	200	&uart3 {
	201	pinctrl-names = "default";
	202	pinctrl-0 = <&uart3_pins>;
	203	};
	204
	205	&twl_gpio {
	206	ti,use-leds;
	207	};
aa496bde JMC	208
	209	&usb_otg_hs {
	210	interface-type = <0>;
	211	usb-phy = <&usb2_phy>;
	212	phys = <&usb2_phy>;
	213	phy-names = "usb2-phy";
	214	mode = <3>;
	215	power = <50>;
	216	};