Commit | Line | Data |
---|---|---|
189892f4 BC |
1 | /* |
2 | * Device Tree Source for OMAP3 SoC | |
3 | * | |
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /include/ "skeleton.dtsi" | |
12 | ||
13 | / { | |
14 | compatible = "ti,omap3430", "ti,omap3"; | |
4c94ac29 | 15 | interrupt-parent = <&intc>; |
189892f4 | 16 | |
cf3c79de RN |
17 | aliases { |
18 | serial0 = &uart1; | |
19 | serial1 = &uart2; | |
20 | serial2 = &uart3; | |
cf3c79de RN |
21 | }; |
22 | ||
476b679a BC |
23 | cpus { |
24 | cpu@0 { | |
25 | compatible = "arm,cortex-a8"; | |
26 | }; | |
27 | }; | |
28 | ||
9b07b477 JH |
29 | pmu { |
30 | compatible = "arm,cortex-a8-pmu"; | |
31 | interrupts = <3>; | |
32 | ti,hwmods = "debugss"; | |
33 | }; | |
34 | ||
189892f4 | 35 | /* |
161e89a6 | 36 | * The soc node represents the soc top level view. It is used for IPs |
189892f4 BC |
37 | * that are not memory mapped in the MPU view or for the MPU itself. |
38 | */ | |
39 | soc { | |
40 | compatible = "ti,omap-infra"; | |
476b679a BC |
41 | mpu { |
42 | compatible = "ti,omap3-mpu"; | |
43 | ti,hwmods = "mpu"; | |
44 | }; | |
45 | ||
46 | iva { | |
47 | compatible = "ti,iva2.2"; | |
48 | ti,hwmods = "iva"; | |
49 | ||
50 | dsp { | |
51 | compatible = "ti,omap3-c64"; | |
52 | }; | |
53 | }; | |
189892f4 BC |
54 | }; |
55 | ||
56 | /* | |
57 | * XXX: Use a flat representation of the OMAP3 interconnect. | |
58 | * The real OMAP interconnect network is quite complex. | |
59 | * Since that will not bring real advantage to represent that in DT for | |
60 | * the moment, just use a fake OCP bus entry to represent the whole bus | |
61 | * hierarchy. | |
62 | */ | |
63 | ocp { | |
64 | compatible = "simple-bus"; | |
65 | #address-cells = <1>; | |
66 | #size-cells = <1>; | |
67 | ranges; | |
68 | ti,hwmods = "l3_main"; | |
69 | ||
510c0ffd JH |
70 | counter32k: counter@48320000 { |
71 | compatible = "ti,omap-counter32k"; | |
72 | reg = <0x48320000 0x20>; | |
73 | ti,hwmods = "counter_32k"; | |
74 | }; | |
75 | ||
d65c5423 BC |
76 | intc: interrupt-controller@48200000 { |
77 | compatible = "ti,omap2-intc"; | |
189892f4 BC |
78 | interrupt-controller; |
79 | #interrupt-cells = <1>; | |
d65c5423 BC |
80 | ti,intc-size = <96>; |
81 | reg = <0x48200000 0x1000>; | |
189892f4 | 82 | }; |
cf3c79de | 83 | |
2c2dc545 JH |
84 | sdma: dma-controller@48056000 { |
85 | compatible = "ti,omap3630-sdma", "ti,omap3430-sdma"; | |
86 | reg = <0x48056000 0x1000>; | |
87 | interrupts = <12>, | |
88 | <13>, | |
89 | <14>, | |
90 | <15>; | |
91 | #dma-cells = <1>; | |
92 | #dma-channels = <32>; | |
93 | #dma-requests = <96>; | |
94 | }; | |
95 | ||
679e3310 TL |
96 | omap3_pmx_core: pinmux@48002030 { |
97 | compatible = "ti,omap3-padconf", "pinctrl-single"; | |
98 | reg = <0x48002030 0x05cc>; | |
99 | #address-cells = <1>; | |
100 | #size-cells = <0>; | |
101 | pinctrl-single,register-width = <16>; | |
161e89a6 | 102 | pinctrl-single,function-mask = <0x7f1f>; |
679e3310 TL |
103 | }; |
104 | ||
161e89a6 | 105 | omap3_pmx_wkup: pinmux@0x48002a00 { |
679e3310 | 106 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
161e89a6 | 107 | reg = <0x48002a00 0x5c>; |
679e3310 TL |
108 | #address-cells = <1>; |
109 | #size-cells = <0>; | |
110 | pinctrl-single,register-width = <16>; | |
161e89a6 | 111 | pinctrl-single,function-mask = <0x7f1f>; |
679e3310 TL |
112 | }; |
113 | ||
385a64bb BC |
114 | gpio1: gpio@48310000 { |
115 | compatible = "ti,omap3-gpio"; | |
e299185a JH |
116 | reg = <0x48310000 0x200>; |
117 | interrupts = <29>; | |
385a64bb | 118 | ti,hwmods = "gpio1"; |
e4b9b9f3 | 119 | ti,gpio-always-on; |
385a64bb BC |
120 | gpio-controller; |
121 | #gpio-cells = <2>; | |
122 | interrupt-controller; | |
ff5c9059 | 123 | #interrupt-cells = <2>; |
385a64bb BC |
124 | }; |
125 | ||
126 | gpio2: gpio@49050000 { | |
127 | compatible = "ti,omap3-gpio"; | |
e299185a JH |
128 | reg = <0x49050000 0x200>; |
129 | interrupts = <30>; | |
385a64bb BC |
130 | ti,hwmods = "gpio2"; |
131 | gpio-controller; | |
132 | #gpio-cells = <2>; | |
133 | interrupt-controller; | |
ff5c9059 | 134 | #interrupt-cells = <2>; |
385a64bb BC |
135 | }; |
136 | ||
137 | gpio3: gpio@49052000 { | |
138 | compatible = "ti,omap3-gpio"; | |
e299185a JH |
139 | reg = <0x49052000 0x200>; |
140 | interrupts = <31>; | |
385a64bb BC |
141 | ti,hwmods = "gpio3"; |
142 | gpio-controller; | |
143 | #gpio-cells = <2>; | |
144 | interrupt-controller; | |
ff5c9059 | 145 | #interrupt-cells = <2>; |
385a64bb BC |
146 | }; |
147 | ||
148 | gpio4: gpio@49054000 { | |
149 | compatible = "ti,omap3-gpio"; | |
e299185a JH |
150 | reg = <0x49054000 0x200>; |
151 | interrupts = <32>; | |
385a64bb BC |
152 | ti,hwmods = "gpio4"; |
153 | gpio-controller; | |
154 | #gpio-cells = <2>; | |
155 | interrupt-controller; | |
ff5c9059 | 156 | #interrupt-cells = <2>; |
385a64bb BC |
157 | }; |
158 | ||
159 | gpio5: gpio@49056000 { | |
160 | compatible = "ti,omap3-gpio"; | |
e299185a JH |
161 | reg = <0x49056000 0x200>; |
162 | interrupts = <33>; | |
385a64bb BC |
163 | ti,hwmods = "gpio5"; |
164 | gpio-controller; | |
165 | #gpio-cells = <2>; | |
166 | interrupt-controller; | |
ff5c9059 | 167 | #interrupt-cells = <2>; |
385a64bb BC |
168 | }; |
169 | ||
170 | gpio6: gpio@49058000 { | |
171 | compatible = "ti,omap3-gpio"; | |
e299185a JH |
172 | reg = <0x49058000 0x200>; |
173 | interrupts = <34>; | |
385a64bb BC |
174 | ti,hwmods = "gpio6"; |
175 | gpio-controller; | |
176 | #gpio-cells = <2>; | |
177 | interrupt-controller; | |
ff5c9059 | 178 | #interrupt-cells = <2>; |
385a64bb BC |
179 | }; |
180 | ||
19bfb76c | 181 | uart1: serial@4806a000 { |
cf3c79de RN |
182 | compatible = "ti,omap3-uart"; |
183 | ti,hwmods = "uart1"; | |
184 | clock-frequency = <48000000>; | |
185 | }; | |
186 | ||
19bfb76c | 187 | uart2: serial@4806c000 { |
cf3c79de RN |
188 | compatible = "ti,omap3-uart"; |
189 | ti,hwmods = "uart2"; | |
190 | clock-frequency = <48000000>; | |
191 | }; | |
192 | ||
19bfb76c | 193 | uart3: serial@49020000 { |
cf3c79de RN |
194 | compatible = "ti,omap3-uart"; |
195 | ti,hwmods = "uart3"; | |
196 | clock-frequency = <48000000>; | |
197 | }; | |
198 | ||
ca59a5c1 BC |
199 | i2c1: i2c@48070000 { |
200 | compatible = "ti,omap3-i2c"; | |
201 | #address-cells = <1>; | |
202 | #size-cells = <0>; | |
203 | ti,hwmods = "i2c1"; | |
204 | }; | |
205 | ||
206 | i2c2: i2c@48072000 { | |
207 | compatible = "ti,omap3-i2c"; | |
208 | #address-cells = <1>; | |
209 | #size-cells = <0>; | |
210 | ti,hwmods = "i2c2"; | |
211 | }; | |
212 | ||
213 | i2c3: i2c@48060000 { | |
214 | compatible = "ti,omap3-i2c"; | |
215 | #address-cells = <1>; | |
216 | #size-cells = <0>; | |
217 | ti,hwmods = "i2c3"; | |
218 | }; | |
fc72d248 BC |
219 | |
220 | mcspi1: spi@48098000 { | |
221 | compatible = "ti,omap2-mcspi"; | |
222 | #address-cells = <1>; | |
223 | #size-cells = <0>; | |
224 | ti,hwmods = "mcspi1"; | |
225 | ti,spi-num-cs = <4>; | |
2c2dc545 JH |
226 | dmas = <&sdma 35>, |
227 | <&sdma 36>, | |
228 | <&sdma 37>, | |
229 | <&sdma 38>, | |
230 | <&sdma 39>, | |
231 | <&sdma 40>, | |
232 | <&sdma 41>, | |
233 | <&sdma 42>; | |
234 | dma-names = "tx0", "rx0", "tx1", "rx1", | |
235 | "tx2", "rx2", "tx3", "rx3"; | |
fc72d248 BC |
236 | }; |
237 | ||
238 | mcspi2: spi@4809a000 { | |
239 | compatible = "ti,omap2-mcspi"; | |
240 | #address-cells = <1>; | |
241 | #size-cells = <0>; | |
242 | ti,hwmods = "mcspi2"; | |
243 | ti,spi-num-cs = <2>; | |
2c2dc545 JH |
244 | dmas = <&sdma 43>, |
245 | <&sdma 44>, | |
246 | <&sdma 45>, | |
247 | <&sdma 46>; | |
248 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
fc72d248 BC |
249 | }; |
250 | ||
251 | mcspi3: spi@480b8000 { | |
252 | compatible = "ti,omap2-mcspi"; | |
253 | #address-cells = <1>; | |
254 | #size-cells = <0>; | |
255 | ti,hwmods = "mcspi3"; | |
256 | ti,spi-num-cs = <2>; | |
2c2dc545 JH |
257 | dmas = <&sdma 15>, |
258 | <&sdma 16>, | |
259 | <&sdma 23>, | |
260 | <&sdma 24>; | |
261 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
fc72d248 BC |
262 | }; |
263 | ||
264 | mcspi4: spi@480ba000 { | |
265 | compatible = "ti,omap2-mcspi"; | |
266 | #address-cells = <1>; | |
267 | #size-cells = <0>; | |
268 | ti,hwmods = "mcspi4"; | |
269 | ti,spi-num-cs = <1>; | |
2c2dc545 JH |
270 | dmas = <&sdma 70>, <&sdma 71>; |
271 | dma-names = "tx0", "rx0"; | |
fc72d248 | 272 | }; |
b3431f5b RN |
273 | |
274 | mmc1: mmc@4809c000 { | |
275 | compatible = "ti,omap3-hsmmc"; | |
276 | ti,hwmods = "mmc1"; | |
277 | ti,dual-volt; | |
2c2dc545 JH |
278 | dmas = <&sdma 61>, <&sdma 62>; |
279 | dma-names = "tx", "rx"; | |
b3431f5b RN |
280 | }; |
281 | ||
282 | mmc2: mmc@480b4000 { | |
283 | compatible = "ti,omap3-hsmmc"; | |
284 | ti,hwmods = "mmc2"; | |
2c2dc545 JH |
285 | dmas = <&sdma 47>, <&sdma 48>; |
286 | dma-names = "tx", "rx"; | |
b3431f5b RN |
287 | }; |
288 | ||
289 | mmc3: mmc@480ad000 { | |
290 | compatible = "ti,omap3-hsmmc"; | |
291 | ti,hwmods = "mmc3"; | |
2c2dc545 JH |
292 | dmas = <&sdma 77>, <&sdma 78>; |
293 | dma-names = "tx", "rx"; | |
b3431f5b | 294 | }; |
94c30732 XJ |
295 | |
296 | wdt2: wdt@48314000 { | |
297 | compatible = "ti,omap3-wdt"; | |
298 | ti,hwmods = "wd_timer2"; | |
299 | }; | |
0be484bf PU |
300 | |
301 | mcbsp1: mcbsp@48074000 { | |
302 | compatible = "ti,omap3-mcbsp"; | |
303 | reg = <0x48074000 0xff>; | |
304 | reg-names = "mpu"; | |
305 | interrupts = <16>, /* OCP compliant interrupt */ | |
306 | <59>, /* TX interrupt */ | |
307 | <60>; /* RX interrupt */ | |
308 | interrupt-names = "common", "tx", "rx"; | |
0be484bf PU |
309 | ti,buffer-size = <128>; |
310 | ti,hwmods = "mcbsp1"; | |
4e4ead73 SG |
311 | dmas = <&sdma 31>, |
312 | <&sdma 32>; | |
313 | dma-names = "tx", "rx"; | |
0be484bf PU |
314 | }; |
315 | ||
316 | mcbsp2: mcbsp@49022000 { | |
317 | compatible = "ti,omap3-mcbsp"; | |
318 | reg = <0x49022000 0xff>, | |
319 | <0x49028000 0xff>; | |
320 | reg-names = "mpu", "sidetone"; | |
321 | interrupts = <17>, /* OCP compliant interrupt */ | |
322 | <62>, /* TX interrupt */ | |
323 | <63>, /* RX interrupt */ | |
324 | <4>; /* Sidetone */ | |
325 | interrupt-names = "common", "tx", "rx", "sidetone"; | |
0be484bf | 326 | ti,buffer-size = <1280>; |
eef6fcaa | 327 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; |
4e4ead73 SG |
328 | dmas = <&sdma 33>, |
329 | <&sdma 34>; | |
330 | dma-names = "tx", "rx"; | |
0be484bf PU |
331 | }; |
332 | ||
333 | mcbsp3: mcbsp@49024000 { | |
334 | compatible = "ti,omap3-mcbsp"; | |
335 | reg = <0x49024000 0xff>, | |
336 | <0x4902a000 0xff>; | |
337 | reg-names = "mpu", "sidetone"; | |
338 | interrupts = <22>, /* OCP compliant interrupt */ | |
339 | <89>, /* TX interrupt */ | |
340 | <90>, /* RX interrupt */ | |
341 | <5>; /* Sidetone */ | |
342 | interrupt-names = "common", "tx", "rx", "sidetone"; | |
0be484bf | 343 | ti,buffer-size = <128>; |
eef6fcaa | 344 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; |
4e4ead73 SG |
345 | dmas = <&sdma 17>, |
346 | <&sdma 18>; | |
347 | dma-names = "tx", "rx"; | |
0be484bf PU |
348 | }; |
349 | ||
350 | mcbsp4: mcbsp@49026000 { | |
351 | compatible = "ti,omap3-mcbsp"; | |
352 | reg = <0x49026000 0xff>; | |
353 | reg-names = "mpu"; | |
354 | interrupts = <23>, /* OCP compliant interrupt */ | |
355 | <54>, /* TX interrupt */ | |
356 | <55>; /* RX interrupt */ | |
357 | interrupt-names = "common", "tx", "rx"; | |
0be484bf PU |
358 | ti,buffer-size = <128>; |
359 | ti,hwmods = "mcbsp4"; | |
4e4ead73 SG |
360 | dmas = <&sdma 19>, |
361 | <&sdma 20>; | |
362 | dma-names = "tx", "rx"; | |
0be484bf PU |
363 | }; |
364 | ||
365 | mcbsp5: mcbsp@48096000 { | |
366 | compatible = "ti,omap3-mcbsp"; | |
367 | reg = <0x48096000 0xff>; | |
368 | reg-names = "mpu"; | |
369 | interrupts = <27>, /* OCP compliant interrupt */ | |
370 | <81>, /* TX interrupt */ | |
371 | <82>; /* RX interrupt */ | |
372 | interrupt-names = "common", "tx", "rx"; | |
0be484bf PU |
373 | ti,buffer-size = <128>; |
374 | ti,hwmods = "mcbsp5"; | |
4e4ead73 SG |
375 | dmas = <&sdma 21>, |
376 | <&sdma 22>; | |
377 | dma-names = "tx", "rx"; | |
0be484bf | 378 | }; |
fab8ad0b JH |
379 | |
380 | timer1: timer@48318000 { | |
002e1ec5 | 381 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
382 | reg = <0x48318000 0x400>; |
383 | interrupts = <37>; | |
384 | ti,hwmods = "timer1"; | |
385 | ti,timer-alwon; | |
386 | }; | |
387 | ||
388 | timer2: timer@49032000 { | |
002e1ec5 | 389 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
390 | reg = <0x49032000 0x400>; |
391 | interrupts = <38>; | |
392 | ti,hwmods = "timer2"; | |
393 | }; | |
394 | ||
395 | timer3: timer@49034000 { | |
002e1ec5 | 396 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
397 | reg = <0x49034000 0x400>; |
398 | interrupts = <39>; | |
399 | ti,hwmods = "timer3"; | |
400 | }; | |
401 | ||
402 | timer4: timer@49036000 { | |
002e1ec5 | 403 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
404 | reg = <0x49036000 0x400>; |
405 | interrupts = <40>; | |
406 | ti,hwmods = "timer4"; | |
407 | }; | |
408 | ||
409 | timer5: timer@49038000 { | |
002e1ec5 | 410 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
411 | reg = <0x49038000 0x400>; |
412 | interrupts = <41>; | |
413 | ti,hwmods = "timer5"; | |
414 | ti,timer-dsp; | |
415 | }; | |
416 | ||
417 | timer6: timer@4903a000 { | |
002e1ec5 | 418 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
419 | reg = <0x4903a000 0x400>; |
420 | interrupts = <42>; | |
421 | ti,hwmods = "timer6"; | |
422 | ti,timer-dsp; | |
423 | }; | |
424 | ||
425 | timer7: timer@4903c000 { | |
002e1ec5 | 426 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
427 | reg = <0x4903c000 0x400>; |
428 | interrupts = <43>; | |
429 | ti,hwmods = "timer7"; | |
430 | ti,timer-dsp; | |
431 | }; | |
432 | ||
433 | timer8: timer@4903e000 { | |
002e1ec5 | 434 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
435 | reg = <0x4903e000 0x400>; |
436 | interrupts = <44>; | |
437 | ti,hwmods = "timer8"; | |
438 | ti,timer-pwm; | |
439 | ti,timer-dsp; | |
440 | }; | |
441 | ||
442 | timer9: timer@49040000 { | |
002e1ec5 | 443 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
444 | reg = <0x49040000 0x400>; |
445 | interrupts = <45>; | |
446 | ti,hwmods = "timer9"; | |
447 | ti,timer-pwm; | |
448 | }; | |
449 | ||
450 | timer10: timer@48086000 { | |
002e1ec5 | 451 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
452 | reg = <0x48086000 0x400>; |
453 | interrupts = <46>; | |
454 | ti,hwmods = "timer10"; | |
455 | ti,timer-pwm; | |
456 | }; | |
457 | ||
458 | timer11: timer@48088000 { | |
002e1ec5 | 459 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
460 | reg = <0x48088000 0x400>; |
461 | interrupts = <47>; | |
462 | ti,hwmods = "timer11"; | |
463 | ti,timer-pwm; | |
464 | }; | |
465 | ||
466 | timer12: timer@48304000 { | |
002e1ec5 | 467 | compatible = "ti,omap3430-timer"; |
fab8ad0b JH |
468 | reg = <0x48304000 0x400>; |
469 | interrupts = <95>; | |
470 | ti,hwmods = "timer12"; | |
471 | ti,timer-alwon; | |
472 | ti,timer-secure; | |
473 | }; | |
af3eb366 RQ |
474 | |
475 | usbhstll: usbhstll@48062000 { | |
476 | compatible = "ti,usbhs-tll"; | |
477 | reg = <0x48062000 0x1000>; | |
478 | interrupts = <78>; | |
479 | ti,hwmods = "usb_tll_hs"; | |
480 | }; | |
481 | ||
482 | usbhshost: usbhshost@48064000 { | |
483 | compatible = "ti,usbhs-host"; | |
484 | reg = <0x48064000 0x400>; | |
485 | ti,hwmods = "usb_host_hs"; | |
486 | #address-cells = <1>; | |
487 | #size-cells = <1>; | |
488 | ranges; | |
489 | ||
490 | usbhsohci: ohci@48064400 { | |
491 | compatible = "ti,ohci-omap3", "usb-ohci"; | |
492 | reg = <0x48064400 0x400>; | |
493 | interrupt-parent = <&intc>; | |
494 | interrupts = <76>; | |
495 | }; | |
496 | ||
497 | usbhsehci: ehci@48064800 { | |
498 | compatible = "ti,ehci-omap", "usb-ehci"; | |
499 | reg = <0x48064800 0x400>; | |
500 | interrupt-parent = <&intc>; | |
501 | interrupts = <77>; | |
502 | }; | |
503 | }; | |
504 | ||
6e8489df FV |
505 | gpmc: gpmc@6e000000 { |
506 | compatible = "ti,omap3430-gpmc"; | |
507 | ti,hwmods = "gpmc"; | |
41644e75 | 508 | reg = <0x6e000000 0x02d0>; |
6e8489df FV |
509 | interrupts = <20>; |
510 | gpmc,num-cs = <8>; | |
511 | gpmc,num-waitpins = <4>; | |
512 | #address-cells = <2>; | |
513 | #size-cells = <1>; | |
514 | }; | |
ad871c10 KVA |
515 | |
516 | usb_otg_hs: usb_otg_hs@480ab000 { | |
517 | compatible = "ti,omap3-musb"; | |
518 | reg = <0x480ab000 0x1000>; | |
304e71e0 | 519 | interrupts = <92>, <93>; |
ad871c10 KVA |
520 | interrupt-names = "mc", "dma"; |
521 | ti,hwmods = "usb_otg_hs"; | |
ad871c10 KVA |
522 | multipoint = <1>; |
523 | num-eps = <16>; | |
524 | ram-bits = <12>; | |
525 | }; | |
189892f4 BC |
526 | }; |
527 | }; |