[deliverable/linux.git] / arch / arm / boot / dts / omap3.dtsi

/*
 * Device Tree Source for OMAP3 SoC
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

/ {
	compatible = "ti,omap3430", "ti,omap3";
	interrupt-parent = <&intc>;

	aliases {
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
	};

	cpus {
		cpu@0 {
			compatible = "arm,cortex-a8";
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
		ti,hwmods = "debugss";
	};

	/*
	 * The soc node represents the soc top level view. It is uses for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};

		iva {
			compatible = "ti,iva2.2";
			ti,hwmods = "iva";

			dsp {
				compatible = "ti,omap3-c64";
			};
		};
	};

	/*
	 * XXX: Use a flat representation of the OMAP3 interconnect.
	 * The real OMAP interconnect network is quite complex.
	 * Since that will not bring real advantage to represent that in DT for
	 * the moment, just use a fake OCP bus entry to represent the whole bus
	 * hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		counter32k: counter@48320000 {
			compatible = "ti,omap-counter32k";
			reg = <0x48320000 0x20>;
			ti,hwmods = "counter_32k";
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,omap2-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			ti,intc-size = <96>;
			reg = <0x48200000 0x1000>;
		};

		sdma: dma-controller@48056000 {
			compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
			reg = <0x48056000 0x1000>;
			interrupts = <12>,
				     <13>,
				     <14>,
				     <15>;
			#dma-cells = <1>;
			#dma-channels = <32>;
			#dma-requests = <96>;
		};

		omap3_pmx_core: pinmux@48002030 {
			compatible = "ti,omap3-padconf", "pinctrl-single";
			reg = <0x48002030 0x05cc>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-single,register-width = <16>;
			pinctrl-single,function-mask = <0x7fff>;
		};

		omap3_pmx_wkup: pinmux@0x48002a58 {
			compatible = "ti,omap3-padconf", "pinctrl-single";
			reg = <0x48002a58 0x5c>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-single,register-width = <16>;
			pinctrl-single,function-mask = <0x7fff>;
		};

		gpio1: gpio@48310000 {
			compatible = "ti,omap3-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio@49050000 {
			compatible = "ti,omap3-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio3: gpio@49052000 {
			compatible = "ti,omap3-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio4: gpio@49054000 {
			compatible = "ti,omap3-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio5: gpio@49056000 {
			compatible = "ti,omap3-gpio";
			ti,hwmods = "gpio5";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio6: gpio@49058000 {
			compatible = "ti,omap3-gpio";
			ti,hwmods = "gpio6";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		uart1: serial@4806a000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
		};

		uart2: serial@4806c000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
		};

		uart3: serial@49020000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
		};

		i2c1: i2c@48070000 {
			compatible = "ti,omap3-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
		};

		i2c2: i2c@48072000 {
			compatible = "ti,omap3-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
		};

		i2c3: i2c@48060000 {
			compatible = "ti,omap3-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
		};

		mcspi1: spi@48098000 {
			compatible = "ti,omap2-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi1";
			ti,spi-num-cs = <4>;
			dmas = <&sdma 35>,
			       <&sdma 36>,
			       <&sdma 37>,
			       <&sdma 38>,
			       <&sdma 39>,
			       <&sdma 40>,
			       <&sdma 41>,
			       <&sdma 42>;
			dma-names = "tx0", "rx0", "tx1", "rx1",
				    "tx2", "rx2", "tx3", "rx3";
		};

		mcspi2: spi@4809a000 {
			compatible = "ti,omap2-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi2";
			ti,spi-num-cs = <2>;
			dmas = <&sdma 43>,
			       <&sdma 44>,
			       <&sdma 45>,
			       <&sdma 46>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
		};

		mcspi3: spi@480b8000 {
			compatible = "ti,omap2-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi3";
			ti,spi-num-cs = <2>;
			dmas = <&sdma 15>,
			       <&sdma 16>,
			       <&sdma 23>,
			       <&sdma 24>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
		};

		mcspi4: spi@480ba000 {
			compatible = "ti,omap2-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi4";
			ti,spi-num-cs = <1>;
			dmas = <&sdma 70>, <&sdma 71>;
			dma-names = "tx0", "rx0";
		};

		mmc1: mmc@4809c000 {
			compatible = "ti,omap3-hsmmc";
			ti,hwmods = "mmc1";
			ti,dual-volt;
			dmas = <&sdma 61>, <&sdma 62>;
			dma-names = "tx", "rx";
		};

		mmc2: mmc@480b4000 {
			compatible = "ti,omap3-hsmmc";
			ti,hwmods = "mmc2";
			dmas = <&sdma 47>, <&sdma 48>;
			dma-names = "tx", "rx";
		};

		mmc3: mmc@480ad000 {
			compatible = "ti,omap3-hsmmc";
			ti,hwmods = "mmc3";
			dmas = <&sdma 77>, <&sdma 78>;
			dma-names = "tx", "rx";
		};

		wdt2: wdt@48314000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
		};

		mcbsp1: mcbsp@48074000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x48074000 0xff>;
			reg-names = "mpu";
			interrupts = <16>, /* OCP compliant interrupt */
				     <59>, /* TX interrupt */
				     <60>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp1";
		};

		mcbsp2: mcbsp@49022000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x49022000 0xff>,
			      <0x49028000 0xff>;
			reg-names = "mpu", "sidetone";
			interrupts = <17>, /* OCP compliant interrupt */
				     <62>, /* TX interrupt */
				     <63>, /* RX interrupt */
				     <4>;  /* Sidetone */
			interrupt-names = "common", "tx", "rx", "sidetone";
			ti,buffer-size = <1280>;
			ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
		};

		mcbsp3: mcbsp@49024000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x49024000 0xff>,
			      <0x4902a000 0xff>;
			reg-names = "mpu", "sidetone";
			interrupts = <22>, /* OCP compliant interrupt */
				     <89>, /* TX interrupt */
				     <90>, /* RX interrupt */
				     <5>;  /* Sidetone */
			interrupt-names = "common", "tx", "rx", "sidetone";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
		};

		mcbsp4: mcbsp@49026000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x49026000 0xff>;
			reg-names = "mpu";
			interrupts = <23>, /* OCP compliant interrupt */
				     <54>, /* TX interrupt */
				     <55>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp4";
		};

		mcbsp5: mcbsp@48096000 {
			compatible = "ti,omap3-mcbsp";
			reg = <0x48096000 0xff>;
			reg-names = "mpu";
			interrupts = <27>, /* OCP compliant interrupt */
				     <81>, /* TX interrupt */
				     <82>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp5";
		};

		timer1: timer@48318000 {
			compatible = "ti,omap2-timer";
			reg = <0x48318000 0x400>;
			interrupts = <37>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@49032000 {
			compatible = "ti,omap2-timer";
			reg = <0x49032000 0x400>;
			interrupts = <38>;
			ti,hwmods = "timer2";
		};

		timer3: timer@49034000 {
			compatible = "ti,omap2-timer";
			reg = <0x49034000 0x400>;
			interrupts = <39>;
			ti,hwmods = "timer3";
		};

		timer4: timer@49036000 {
			compatible = "ti,omap2-timer";
			reg = <0x49036000 0x400>;
			interrupts = <40>;
			ti,hwmods = "timer4";
		};

		timer5: timer@49038000 {
			compatible = "ti,omap2-timer";
			reg = <0x49038000 0x400>;
			interrupts = <41>;
			ti,hwmods = "timer5";
			ti,timer-dsp;
		};

		timer6: timer@4903a000 {
			compatible = "ti,omap2-timer";
			reg = <0x4903a000 0x400>;
			interrupts = <42>;
			ti,hwmods = "timer6";
			ti,timer-dsp;
		};

		timer7: timer@4903c000 {
			compatible = "ti,omap2-timer";
			reg = <0x4903c000 0x400>;
			interrupts = <43>;
			ti,hwmods = "timer7";
			ti,timer-dsp;
		};

		timer8: timer@4903e000 {
			compatible = "ti,omap2-timer";
			reg = <0x4903e000 0x400>;
			interrupts = <44>;
			ti,hwmods = "timer8";
			ti,timer-pwm;
			ti,timer-dsp;
		};

		timer9: timer@49040000 {
			compatible = "ti,omap2-timer";
			reg = <0x49040000 0x400>;
			interrupts = <45>;
			ti,hwmods = "timer9";
			ti,timer-pwm;
		};

		timer10: timer@48086000 {
			compatible = "ti,omap2-timer";
			reg = <0x48086000 0x400>;
			interrupts = <46>;
			ti,hwmods = "timer10";
			ti,timer-pwm;
		};

		timer11: timer@48088000 {
			compatible = "ti,omap2-timer";
			reg = <0x48088000 0x400>;
			interrupts = <47>;
			ti,hwmods = "timer11";
			ti,timer-pwm;
		};

		timer12: timer@48304000 {
			compatible = "ti,omap2-timer";
			reg = <0x48304000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer12";
			ti,timer-alwon;
			ti,timer-secure;
		};

		usbhstll: usbhstll@48062000 {
			compatible = "ti,usbhs-tll";
			reg = <0x48062000 0x1000>;
			interrupts = <78>;
			ti,hwmods = "usb_tll_hs";
		};

		usbhshost: usbhshost@48064000 {
			compatible = "ti,usbhs-host";
			reg = <0x48064000 0x400>;
			ti,hwmods = "usb_host_hs";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			usbhsohci: ohci@48064400 {
				compatible = "ti,ohci-omap3", "usb-ohci";
				reg = <0x48064400 0x400>;
				interrupt-parent = <&intc>;
				interrupts = <76>;
			};

			usbhsehci: ehci@48064800 {
				compatible = "ti,ehci-omap", "usb-ehci";
				reg = <0x48064800 0x400>;
				interrupt-parent = <&intc>;
				interrupts = <77>;
			};
		};

		gpmc: gpmc@6e000000 {
			compatible = "ti,omap3430-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x6e000000 0x02d0>;
			interrupts = <20>;
			gpmc,num-cs = <8>;
			gpmc,num-waitpins = <4>;
			#address-cells = <2>;
			#size-cells = <1>;
		};

		usb_otg_hs: usb_otg_hs@480ab000 {
			compatible = "ti,omap3-musb";
			reg = <0x480ab000 0x1000>;
			interrupts = <0 92 0x4>, <0 93 0x4>;
			interrupt-names = "mc", "dma";
			ti,hwmods = "usb_otg_hs";
			usb-phy = <&usb2_phy>;
			multipoint = <1>;
			num-eps = <16>;
			ram-bits = <12>;
		};
	};
};
Commit	Line	Data
189892f4 BC	1	/*
	2	* Device Tree Source for OMAP3 SoC
	3	*
	4	* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
	11	/include/ "skeleton.dtsi"
	12
	13	/ {
	14	compatible = "ti,omap3430", "ti,omap3";
4c94ac29	15	interrupt-parent = <&intc>;
189892f4	16
cf3c79de RN	17	aliases {
	18	serial0 = &uart1;
	19	serial1 = &uart2;
	20	serial2 = &uart3;
cf3c79de RN	21	};
cf3c79de RN	22
476b679a BC	23	cpus {
	24	cpu@0 {
	25	compatible = "arm,cortex-a8";
	26	};
	27	};
	28
9b07b477 JH	29	pmu {
	30	compatible = "arm,cortex-a8-pmu";
	31	interrupts = <3>;
	32	ti,hwmods = "debugss";
	33	};
	34
189892f4 BC	35	/*
	36	* The soc node represents the soc top level view. It is uses for IPs
	37	* that are not memory mapped in the MPU view or for the MPU itself.
	38	*/
	39	soc {
	40	compatible = "ti,omap-infra";
476b679a BC	41	mpu {
	42	compatible = "ti,omap3-mpu";
	43	ti,hwmods = "mpu";
	44	};
	45
	46	iva {
	47	compatible = "ti,iva2.2";
	48	ti,hwmods = "iva";
	49
	50	dsp {
	51	compatible = "ti,omap3-c64";
	52	};
	53	};
189892f4 BC	54	};
	55
	56	/*
	57	* XXX: Use a flat representation of the OMAP3 interconnect.
	58	* The real OMAP interconnect network is quite complex.
	59	* Since that will not bring real advantage to represent that in DT for
	60	* the moment, just use a fake OCP bus entry to represent the whole bus
	61	* hierarchy.
	62	*/
	63	ocp {
	64	compatible = "simple-bus";
	65	#address-cells = <1>;
	66	#size-cells = <1>;
	67	ranges;
	68	ti,hwmods = "l3_main";
	69
510c0ffd JH	70	counter32k: counter@48320000 {
	71	compatible = "ti,omap-counter32k";
	72	reg = <0x48320000 0x20>;
	73	ti,hwmods = "counter_32k";
	74	};
	75
d65c5423 BC	76	intc: interrupt-controller@48200000 {
d65c5423 BC	77	compatible = "ti,omap2-intc";
189892f4 BC	78	interrupt-controller;
189892f4 BC	79	#interrupt-cells = <1>;
d65c5423 BC	80	ti,intc-size = <96>;
d65c5423 BC	81	reg = <0x48200000 0x1000>;
189892f4	82	};
cf3c79de	83
2c2dc545 JH	84	sdma: dma-controller@48056000 {
	85	compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
	86	reg = <0x48056000 0x1000>;
	87	interrupts = <12>,
	88	<13>,
	89	<14>,
	90	<15>;
	91	#dma-cells = <1>;
	92	#dma-channels = <32>;
	93	#dma-requests = <96>;
	94	};
	95
679e3310 TL	96	omap3_pmx_core: pinmux@48002030 {
	97	compatible = "ti,omap3-padconf", "pinctrl-single";
	98	reg = <0x48002030 0x05cc>;
	99	#address-cells = <1>;
	100	#size-cells = <0>;
	101	pinctrl-single,register-width = <16>;
	102	pinctrl-single,function-mask = <0x7fff>;
	103	};
	104
	105	omap3_pmx_wkup: pinmux@0x48002a58 {
	106	compatible = "ti,omap3-padconf", "pinctrl-single";
	107	reg = <0x48002a58 0x5c>;
	108	#address-cells = <1>;
	109	#size-cells = <0>;
	110	pinctrl-single,register-width = <16>;
	111	pinctrl-single,function-mask = <0x7fff>;
	112	};
	113
385a64bb BC	114	gpio1: gpio@48310000 {
	115	compatible = "ti,omap3-gpio";
	116	ti,hwmods = "gpio1";
	117	gpio-controller;
	118	#gpio-cells = <2>;
	119	interrupt-controller;
ff5c9059	120	#interrupt-cells = <2>;
385a64bb BC	121	};
	122
	123	gpio2: gpio@49050000 {
	124	compatible = "ti,omap3-gpio";
	125	ti,hwmods = "gpio2";
	126	gpio-controller;
	127	#gpio-cells = <2>;
	128	interrupt-controller;
ff5c9059	129	#interrupt-cells = <2>;
385a64bb BC	130	};
	131
	132	gpio3: gpio@49052000 {
	133	compatible = "ti,omap3-gpio";
	134	ti,hwmods = "gpio3";
	135	gpio-controller;
	136	#gpio-cells = <2>;
	137	interrupt-controller;
ff5c9059	138	#interrupt-cells = <2>;
385a64bb BC	139	};
	140
	141	gpio4: gpio@49054000 {
	142	compatible = "ti,omap3-gpio";
	143	ti,hwmods = "gpio4";
	144	gpio-controller;
	145	#gpio-cells = <2>;
	146	interrupt-controller;
ff5c9059	147	#interrupt-cells = <2>;
385a64bb BC	148	};
	149
	150	gpio5: gpio@49056000 {
	151	compatible = "ti,omap3-gpio";
	152	ti,hwmods = "gpio5";
	153	gpio-controller;
	154	#gpio-cells = <2>;
	155	interrupt-controller;
ff5c9059	156	#interrupt-cells = <2>;
385a64bb BC	157	};
	158
	159	gpio6: gpio@49058000 {
	160	compatible = "ti,omap3-gpio";
	161	ti,hwmods = "gpio6";
	162	gpio-controller;
	163	#gpio-cells = <2>;
	164	interrupt-controller;
ff5c9059	165	#interrupt-cells = <2>;
385a64bb BC	166	};
385a64bb BC	167
19bfb76c	168	uart1: serial@4806a000 {
cf3c79de RN	169	compatible = "ti,omap3-uart";
	170	ti,hwmods = "uart1";
	171	clock-frequency = <48000000>;
	172	};
	173
19bfb76c	174	uart2: serial@4806c000 {
cf3c79de RN	175	compatible = "ti,omap3-uart";
	176	ti,hwmods = "uart2";
	177	clock-frequency = <48000000>;
	178	};
	179
19bfb76c	180	uart3: serial@49020000 {
cf3c79de RN	181	compatible = "ti,omap3-uart";
	182	ti,hwmods = "uart3";
	183	clock-frequency = <48000000>;
	184	};
	185
ca59a5c1 BC	186	i2c1: i2c@48070000 {
	187	compatible = "ti,omap3-i2c";
	188	#address-cells = <1>;
	189	#size-cells = <0>;
	190	ti,hwmods = "i2c1";
	191	};
	192
	193	i2c2: i2c@48072000 {
	194	compatible = "ti,omap3-i2c";
	195	#address-cells = <1>;
	196	#size-cells = <0>;
	197	ti,hwmods = "i2c2";
	198	};
	199
	200	i2c3: i2c@48060000 {
	201	compatible = "ti,omap3-i2c";
	202	#address-cells = <1>;
	203	#size-cells = <0>;
	204	ti,hwmods = "i2c3";
	205	};
fc72d248 BC	206
	207	mcspi1: spi@48098000 {
	208	compatible = "ti,omap2-mcspi";
	209	#address-cells = <1>;
	210	#size-cells = <0>;
	211	ti,hwmods = "mcspi1";
	212	ti,spi-num-cs = <4>;
2c2dc545 JH	213	dmas = <&sdma 35>,
	214	<&sdma 36>,
	215	<&sdma 37>,
	216	<&sdma 38>,
	217	<&sdma 39>,
	218	<&sdma 40>,
	219	<&sdma 41>,
	220	<&sdma 42>;
	221	dma-names = "tx0", "rx0", "tx1", "rx1",
	222	"tx2", "rx2", "tx3", "rx3";
fc72d248 BC	223	};
	224
	225	mcspi2: spi@4809a000 {
	226	compatible = "ti,omap2-mcspi";
	227	#address-cells = <1>;
	228	#size-cells = <0>;
	229	ti,hwmods = "mcspi2";
	230	ti,spi-num-cs = <2>;
2c2dc545 JH	231	dmas = <&sdma 43>,
	232	<&sdma 44>,
	233	<&sdma 45>,
	234	<&sdma 46>;
	235	dma-names = "tx0", "rx0", "tx1", "rx1";
fc72d248 BC	236	};
	237
	238	mcspi3: spi@480b8000 {
	239	compatible = "ti,omap2-mcspi";
	240	#address-cells = <1>;
	241	#size-cells = <0>;
	242	ti,hwmods = "mcspi3";
	243	ti,spi-num-cs = <2>;
2c2dc545 JH	244	dmas = <&sdma 15>,
	245	<&sdma 16>,
	246	<&sdma 23>,
	247	<&sdma 24>;
	248	dma-names = "tx0", "rx0", "tx1", "rx1";
fc72d248 BC	249	};
	250
	251	mcspi4: spi@480ba000 {
	252	compatible = "ti,omap2-mcspi";
	253	#address-cells = <1>;
	254	#size-cells = <0>;
	255	ti,hwmods = "mcspi4";
	256	ti,spi-num-cs = <1>;
2c2dc545 JH	257	dmas = <&sdma 70>, <&sdma 71>;
2c2dc545 JH	258	dma-names = "tx0", "rx0";
fc72d248	259	};
b3431f5b RN	260
	261	mmc1: mmc@4809c000 {
	262	compatible = "ti,omap3-hsmmc";
	263	ti,hwmods = "mmc1";
	264	ti,dual-volt;
2c2dc545 JH	265	dmas = <&sdma 61>, <&sdma 62>;
2c2dc545 JH	266	dma-names = "tx", "rx";
b3431f5b RN	267	};
	268
	269	mmc2: mmc@480b4000 {
	270	compatible = "ti,omap3-hsmmc";
	271	ti,hwmods = "mmc2";
2c2dc545 JH	272	dmas = <&sdma 47>, <&sdma 48>;
2c2dc545 JH	273	dma-names = "tx", "rx";
b3431f5b RN	274	};
	275
	276	mmc3: mmc@480ad000 {
	277	compatible = "ti,omap3-hsmmc";
	278	ti,hwmods = "mmc3";
2c2dc545 JH	279	dmas = <&sdma 77>, <&sdma 78>;
2c2dc545 JH	280	dma-names = "tx", "rx";
b3431f5b	281	};
94c30732 XJ	282
	283	wdt2: wdt@48314000 {
	284	compatible = "ti,omap3-wdt";
	285	ti,hwmods = "wd_timer2";
	286	};
0be484bf PU	287
	288	mcbsp1: mcbsp@48074000 {
	289	compatible = "ti,omap3-mcbsp";
	290	reg = <0x48074000 0xff>;
	291	reg-names = "mpu";
	292	interrupts = <16>, /* OCP compliant interrupt */
	293	<59>, /* TX interrupt */
	294	<60>; /* RX interrupt */
	295	interrupt-names = "common", "tx", "rx";
0be484bf PU	296	ti,buffer-size = <128>;
	297	ti,hwmods = "mcbsp1";
	298	};
	299
	300	mcbsp2: mcbsp@49022000 {
	301	compatible = "ti,omap3-mcbsp";
	302	reg = <0x49022000 0xff>,
	303	<0x49028000 0xff>;
	304	reg-names = "mpu", "sidetone";
	305	interrupts = <17>, /* OCP compliant interrupt */
	306	<62>, /* TX interrupt */
	307	<63>, /* RX interrupt */
	308	<4>; /* Sidetone */
	309	interrupt-names = "common", "tx", "rx", "sidetone";
0be484bf	310	ti,buffer-size = <1280>;
eef6fcaa	311	ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
0be484bf PU	312	};
	313
	314	mcbsp3: mcbsp@49024000 {
	315	compatible = "ti,omap3-mcbsp";
	316	reg = <0x49024000 0xff>,
	317	<0x4902a000 0xff>;
	318	reg-names = "mpu", "sidetone";
	319	interrupts = <22>, /* OCP compliant interrupt */
	320	<89>, /* TX interrupt */
	321	<90>, /* RX interrupt */
	322	<5>; /* Sidetone */
	323	interrupt-names = "common", "tx", "rx", "sidetone";
0be484bf	324	ti,buffer-size = <128>;
eef6fcaa	325	ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
0be484bf PU	326	};
	327
	328	mcbsp4: mcbsp@49026000 {
	329	compatible = "ti,omap3-mcbsp";
	330	reg = <0x49026000 0xff>;
	331	reg-names = "mpu";
	332	interrupts = <23>, /* OCP compliant interrupt */
	333	<54>, /* TX interrupt */
	334	<55>; /* RX interrupt */
	335	interrupt-names = "common", "tx", "rx";
0be484bf PU	336	ti,buffer-size = <128>;
	337	ti,hwmods = "mcbsp4";
	338	};
	339
	340	mcbsp5: mcbsp@48096000 {
	341	compatible = "ti,omap3-mcbsp";
	342	reg = <0x48096000 0xff>;
	343	reg-names = "mpu";
	344	interrupts = <27>, /* OCP compliant interrupt */
	345	<81>, /* TX interrupt */
	346	<82>; /* RX interrupt */
	347	interrupt-names = "common", "tx", "rx";
0be484bf PU	348	ti,buffer-size = <128>;
	349	ti,hwmods = "mcbsp5";
	350	};
fab8ad0b JH	351
	352	timer1: timer@48318000 {
	353	compatible = "ti,omap2-timer";
	354	reg = <0x48318000 0x400>;
	355	interrupts = <37>;
	356	ti,hwmods = "timer1";
	357	ti,timer-alwon;
	358	};
	359
	360	timer2: timer@49032000 {
	361	compatible = "ti,omap2-timer";
	362	reg = <0x49032000 0x400>;
	363	interrupts = <38>;
	364	ti,hwmods = "timer2";
	365	};
	366
	367	timer3: timer@49034000 {
	368	compatible = "ti,omap2-timer";
	369	reg = <0x49034000 0x400>;
	370	interrupts = <39>;
	371	ti,hwmods = "timer3";
	372	};
	373
	374	timer4: timer@49036000 {
	375	compatible = "ti,omap2-timer";
	376	reg = <0x49036000 0x400>;
	377	interrupts = <40>;
	378	ti,hwmods = "timer4";
	379	};
	380
	381	timer5: timer@49038000 {
	382	compatible = "ti,omap2-timer";
	383	reg = <0x49038000 0x400>;
	384	interrupts = <41>;
	385	ti,hwmods = "timer5";
	386	ti,timer-dsp;
	387	};
	388
	389	timer6: timer@4903a000 {
	390	compatible = "ti,omap2-timer";
	391	reg = <0x4903a000 0x400>;
	392	interrupts = <42>;
	393	ti,hwmods = "timer6";
	394	ti,timer-dsp;
	395	};
	396
	397	timer7: timer@4903c000 {
	398	compatible = "ti,omap2-timer";
	399	reg = <0x4903c000 0x400>;
	400	interrupts = <43>;
	401	ti,hwmods = "timer7";
	402	ti,timer-dsp;
	403	};
	404
	405	timer8: timer@4903e000 {
	406	compatible = "ti,omap2-timer";
	407	reg = <0x4903e000 0x400>;
	408	interrupts = <44>;
	409	ti,hwmods = "timer8";
	410	ti,timer-pwm;
	411	ti,timer-dsp;
	412	};
	413
	414	timer9: timer@49040000 {
415	compatible = "ti,omap2-timer";
416	reg = <0x49040000 0x400>;
417	interrupts = <45>;
418	ti,hwmods = "timer9";
419	ti,timer-pwm;
420	};
421
422	timer10: timer@48086000 {
423	compatible = "ti,omap2-timer";
424	reg = <0x48086000 0x400>;
425	interrupts = <46>;
426	ti,hwmods = "timer10";
427	ti,timer-pwm;
428	};
429
430	timer11: timer@48088000 {
431	compatible = "ti,omap2-timer";
432	reg = <0x48088000 0x400>;
433	interrupts = <47>;
434	ti,hwmods = "timer11";
435	ti,timer-pwm;
436	};
437
438	timer12: timer@48304000 {
439	compatible = "ti,omap2-timer";
440	reg = <0x48304000 0x400>;
441	interrupts = <95>;
442	ti,hwmods = "timer12";
443	ti,timer-alwon;
444	ti,timer-secure;
445	};
af3eb366 RQ	446
	447	usbhstll: usbhstll@48062000 {
	448	compatible = "ti,usbhs-tll";
	449	reg = <0x48062000 0x1000>;
	450	interrupts = <78>;
	451	ti,hwmods = "usb_tll_hs";
	452	};
	453
	454	usbhshost: usbhshost@48064000 {
	455	compatible = "ti,usbhs-host";
	456	reg = <0x48064000 0x400>;
	457	ti,hwmods = "usb_host_hs";
	458	#address-cells = <1>;
	459	#size-cells = <1>;
	460	ranges;
	461
	462	usbhsohci: ohci@48064400 {
	463	compatible = "ti,ohci-omap3", "usb-ohci";
	464	reg = <0x48064400 0x400>;
	465	interrupt-parent = <&intc>;
	466	interrupts = <76>;
	467	};
	468
	469	usbhsehci: ehci@48064800 {
	470	compatible = "ti,ehci-omap", "usb-ehci";
	471	reg = <0x48064800 0x400>;
	472	interrupt-parent = <&intc>;
	473	interrupts = <77>;
	474	};
	475	};
	476
6e8489df FV	477	gpmc: gpmc@6e000000 {
	478	compatible = "ti,omap3430-gpmc";
	479	ti,hwmods = "gpmc";
41644e75	480	reg = <0x6e000000 0x02d0>;
6e8489df FV	481	interrupts = <20>;
	482	gpmc,num-cs = <8>;
	483	gpmc,num-waitpins = <4>;
	484	#address-cells = <2>;
	485	#size-cells = <1>;
	486	};
ad871c10 KVA	487
	488	usb_otg_hs: usb_otg_hs@480ab000 {
	489	compatible = "ti,omap3-musb";
	490	reg = <0x480ab000 0x1000>;
	491	interrupts = <0 92 0x4>, <0 93 0x4>;
	492	interrupt-names = "mc", "dma";
	493	ti,hwmods = "usb_otg_hs";
	494	usb-phy = <&usb2_phy>;
	495	multipoint = <1>;
	496	num-eps = <16>;
	497	ram-bits = <12>;
	498	};
189892f4 BC	499	};
189892f4 BC	500	};