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1bffb4a8 TP |
1 | /* |
2 | * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
3 | * | |
4 | * This file is licensed under the terms of the GNU General Public | |
5 | * License version 2. This program is licensed "as is" without any | |
6 | * warranty of any kind, whether express or implied. | |
7 | */ | |
8 | ||
48be9707 | 9 | #include "skeleton.dtsi" |
1bffb4a8 TP |
10 | |
11 | / { | |
12 | model = "Marvell Orion5x SoC"; | |
13 | compatible = "marvell,orion5x"; | |
14 | interrupt-parent = <&intc>; | |
15 | ||
835f6322 AC |
16 | aliases { |
17 | gpio0 = &gpio0; | |
18 | }; | |
cabbd6bd | 19 | |
1bffb4a8 TP |
20 | ocp@f1000000 { |
21 | compatible = "simple-bus"; | |
22 | ranges = <0x00000000 0xf1000000 0x4000000 | |
23 | 0xf2200000 0xf2200000 0x0000800>; | |
24 | #address-cells = <1>; | |
25 | #size-cells = <1>; | |
26 | ||
27 | gpio0: gpio@10100 { | |
28 | compatible = "marvell,orion-gpio"; | |
29 | #gpio-cells = <2>; | |
30 | gpio-controller; | |
31 | reg = <0x10100 0x40>; | |
835f6322 AC |
32 | ngpios = <32>; |
33 | interrupt-controller; | |
34 | #interrupt-cells = <2>; | |
1bffb4a8 TP |
35 | interrupts = <6>, <7>, <8>, <9>; |
36 | }; | |
37 | ||
6226cf18 JC |
38 | spi@10600 { |
39 | compatible = "marvell,orion-spi"; | |
40 | #address-cells = <1>; | |
41 | #size-cells = <0>; | |
42 | cell-index = <0>; | |
43 | reg = <0x10600 0x28>; | |
44 | status = "disabled"; | |
45 | }; | |
46 | ||
47 | i2c@11000 { | |
48 | compatible = "marvell,mv64xxx-i2c"; | |
49 | reg = <0x11000 0x20>; | |
50 | #address-cells = <1>; | |
51 | #size-cells = <0>; | |
52 | interrupts = <5>; | |
53 | clock-frequency = <100000>; | |
54 | status = "disabled"; | |
55 | }; | |
56 | ||
1bffb4a8 TP |
57 | serial@12000 { |
58 | compatible = "ns16550a"; | |
59 | reg = <0x12000 0x100>; | |
60 | reg-shift = <2>; | |
61 | interrupts = <3>; | |
62 | /* set clock-frequency in board dts */ | |
63 | status = "disabled"; | |
64 | }; | |
65 | ||
66 | serial@12100 { | |
67 | compatible = "ns16550a"; | |
68 | reg = <0x12100 0x100>; | |
69 | reg-shift = <2>; | |
70 | interrupts = <4>; | |
71 | /* set clock-frequency in board dts */ | |
72 | status = "disabled"; | |
73 | }; | |
74 | ||
0fb28811 TP |
75 | intc: interrupt-controller@20200 { |
76 | compatible = "marvell,orion-intc"; | |
77 | interrupt-controller; | |
78 | #interrupt-cells = <1>; | |
79 | reg = <0x20200 0x08>; | |
80 | }; | |
81 | ||
1bffb4a8 TP |
82 | wdt@20300 { |
83 | compatible = "marvell,orion-wdt"; | |
84 | reg = <0x20300 0x28>; | |
85 | status = "okay"; | |
86 | }; | |
87 | ||
48e86997 AC |
88 | ehci@50000 { |
89 | compatible = "marvell,orion-ehci"; | |
90 | reg = <0x50000 0x1000>; | |
91 | interrupts = <17>; | |
92 | status = "disabled"; | |
93 | }; | |
94 | ||
4504607f AC |
95 | xor@60900 { |
96 | compatible = "marvell,orion-xor"; | |
97 | reg = <0x60900 0x100 | |
98 | 0x60b00 0x100>; | |
99 | status = "okay"; | |
100 | ||
101 | xor00 { | |
102 | interrupts = <30>; | |
103 | dmacap,memcpy; | |
104 | dmacap,xor; | |
105 | }; | |
106 | xor01 { | |
107 | interrupts = <31>; | |
108 | dmacap,memcpy; | |
109 | dmacap,xor; | |
110 | dmacap,memset; | |
111 | }; | |
112 | }; | |
113 | ||
99d6455b SH |
114 | eth: ethernet-controller@72000 { |
115 | compatible = "marvell,orion-eth"; | |
116 | #address-cells = <1>; | |
117 | #size-cells = <0>; | |
118 | reg = <0x72000 0x4000>; | |
119 | marvell,tx-checksum-limit = <1600>; | |
120 | status = "disabled"; | |
121 | ||
122 | ethernet-port@0 { | |
99d6455b SH |
123 | compatible = "marvell,orion-eth-port"; |
124 | reg = <0>; | |
125 | /* overwrite MAC address in bootloader */ | |
126 | local-mac-address = [00 00 00 00 00 00]; | |
127 | /* set phy-handle property in board file */ | |
128 | }; | |
129 | }; | |
6226cf18 JC |
130 | |
131 | mdio: mdio-bus@72004 { | |
132 | compatible = "marvell,orion-mdio"; | |
133 | #address-cells = <1>; | |
134 | #size-cells = <0>; | |
135 | reg = <0x72004 0x84>; | |
136 | interrupts = <22>; | |
137 | status = "disabled"; | |
138 | ||
139 | /* add phy nodes in board file */ | |
140 | }; | |
141 | ||
142 | sata@80000 { | |
143 | compatible = "marvell,orion-sata"; | |
144 | reg = <0x80000 0x5000>; | |
145 | interrupts = <29>; | |
146 | status = "disabled"; | |
147 | }; | |
148 | ||
149 | crypto@90000 { | |
150 | compatible = "marvell,orion-crypto"; | |
151 | reg = <0x90000 0x10000>, | |
152 | <0xf2200000 0x800>; | |
153 | reg-names = "regs", "sram"; | |
154 | interrupts = <28>; | |
155 | status = "okay"; | |
156 | }; | |
157 | ||
158 | ehci@a0000 { | |
159 | compatible = "marvell,orion-ehci"; | |
160 | reg = <0xa0000 0x1000>; | |
161 | interrupts = <12>; | |
162 | status = "disabled"; | |
163 | }; | |
1bffb4a8 TP |
164 | }; |
165 | }; |