[deliverable/linux.git] / arch / arm / boot / dts / prima2-cb.dts

/dts-v1/;
/ {
	model = "SiRF Prima2 eVB";
	compatible = "sirf,prima2-cb", "sirf,prima2";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&intc>;

	memory {
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
		linux,stdout-path = &uart1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			/* from bootloader */
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
		};
	};

	axi {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x40000000 0x40000000 0x80000000>;

		l2-cache-controller@80040000 {
			compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
			reg = <0x80040000 0x1000>;
			interrupts = <59>;
			arm,tag-latency = <1 1 1>;
			arm,data-latency = <1 1 1>;
			arm,filter-ranges = <0 0x40000000>;
		};

		intc: interrupt-controller@80020000 {
			#interrupt-cells = <1>;
			interrupt-controller;
			compatible = "sirf,prima2-intc";
			reg = <0x80020000 0x1000>;
		};

		sys-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x88000000 0x88000000 0x40000>;

			clock-controller@88000000 {
				compatible = "sirf,prima2-clkc";
				reg = <0x88000000 0x1000>;
				interrupts = <3>;
			};

			reset-controller@88010000 {
				compatible = "sirf,prima2-rstc";
				reg = <0x88010000 0x1000>;
			};

			rsc-controller@88020000 {
				compatible = "sirf,prima2-rsc";
				reg = <0x88020000 0x1000>;
			};
		};

		mem-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x90000000 0x90000000 0x10000>;

			memory-controller@90000000 {
				compatible = "sirf,prima2-memc";
				reg = <0x90000000 0x10000>;
				interrupts = <27>;
			};
		};

		disp-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x90010000 0x90010000 0x30000>;

			display@90010000 {
				compatible = "sirf,prima2-lcd";
				reg = <0x90010000 0x20000>;
				interrupts = <30>;
			};

			vpp@90020000 {
				compatible = "sirf,prima2-vpp";
				reg = <0x90020000 0x10000>;
				interrupts = <31>;
			};
		};

		graphics-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x98000000 0x98000000 0x8000000>;

			graphics@98000000 {
				compatible = "powervr,sgx531";
				reg = <0x98000000 0x8000000>;
				interrupts = <6>;
			};
		};

		multimedia-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0xa0000000 0xa0000000 0x8000000>;

			multimedia@a0000000 {
				compatible = "sirf,prima2-video-codec";
				reg = <0xa0000000 0x8000000>;
				interrupts = <5>;
			};
		};

		dsp-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0xa8000000 0xa8000000 0x2000000>;

			dspif@a8000000 {
				compatible = "sirf,prima2-dspif";
				reg = <0xa8000000 0x10000>;
				interrupts = <9>;
			};

			gps@a8010000 {
				compatible = "sirf,prima2-gps";
				reg = <0xa8010000 0x10000>;
				interrupts = <7>;
			};

			dsp@a9000000 {
				compatible = "sirf,prima2-dsp";
				reg = <0xa9000000 0x1000000>;
				interrupts = <8>;
			};
		};

		peri-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0xb0000000 0xb0000000 0x180000>;

			timer@b0020000 {
				compatible = "sirf,prima2-tick";
				reg = <0xb0020000 0x1000>;
				interrupts = <0>;
			};

			nand@b0030000 {
				compatible = "sirf,prima2-nand";
				reg = <0xb0030000 0x10000>;
				interrupts = <41>;
			};

			audio@b0040000 {
				compatible = "sirf,prima2-audio";
				reg = <0xb0040000 0x10000>;
				interrupts = <35>;
			};

			uart0: uart@b0050000 {
				cell-index = <0>;
				compatible = "sirf,prima2-uart";
				reg = <0xb0050000 0x10000>;
				interrupts = <17>;
			};

			uart1: uart@b0060000 {
				cell-index = <1>;
				compatible = "sirf,prima2-uart";
				reg = <0xb0060000 0x10000>;
				interrupts = <18>;
			};

			uart2: uart@b0070000 {
				cell-index = <2>;
				compatible = "sirf,prima2-uart";
				reg = <0xb0070000 0x10000>;
				interrupts = <19>;
			};

			usp0: usp@b0080000 {
				cell-index = <0>;
				compatible = "sirf,prima2-usp";
				reg = <0xb0080000 0x10000>;
				interrupts = <20>;
			};

			usp1: usp@b0090000 {
				cell-index = <1>;
				compatible = "sirf,prima2-usp";
				reg = <0xb0090000 0x10000>;
				interrupts = <21>;
			};

			usp2: usp@b00a0000 {
				cell-index = <2>;
				compatible = "sirf,prima2-usp";
				reg = <0xb00a0000 0x10000>;
				interrupts = <22>;
			};

			dmac0: dma-controller@b00b0000 {
				cell-index = <0>;
				compatible = "sirf,prima2-dmac";
				reg = <0xb00b0000 0x10000>;
				interrupts = <12>;
			};

			dmac1: dma-controller@b0160000 {
				cell-index = <1>;
				compatible = "sirf,prima2-dmac";
				reg = <0xb0160000 0x10000>;
				interrupts = <13>;
			};

			vip@b00C0000 {
				compatible = "sirf,prima2-vip";
				reg = <0xb00C0000 0x10000>;
			};

			spi0: spi@b00d0000 {
				cell-index = <0>;
				compatible = "sirf,prima2-spi";
				reg = <0xb00d0000 0x10000>;
				interrupts = <15>;
			};

			spi1: spi@b0170000 {
				cell-index = <1>;
				compatible = "sirf,prima2-spi";
				reg = <0xb0170000 0x10000>;
				interrupts = <16>;
			};

			i2c0: i2c@b00e0000 {
				cell-index = <0>;
				compatible = "sirf,prima2-i2c";
				reg = <0xb00e0000 0x10000>;
				interrupts = <24>;
			};

			i2c1: i2c@b00f0000 {
				cell-index = <1>;
				compatible = "sirf,prima2-i2c";
				reg = <0xb00f0000 0x10000>;
				interrupts = <25>;
			};

			tsc@b0110000 {
				compatible = "sirf,prima2-tsc";
				reg = <0xb0110000 0x10000>;
				interrupts = <33>;
			};

			gpio: gpio-controller@b0120000 {
				#gpio-cells = <2>;
				#interrupt-cells = <2>;
				compatible = "sirf,prima2-gpio-pinmux";
				reg = <0xb0120000 0x10000>;
				gpio-controller;
				interrupt-controller;
			};

			pwm@b0130000 {
				compatible = "sirf,prima2-pwm";
				reg = <0xb0130000 0x10000>;
			};

			efusesys@b0140000 {
				compatible = "sirf,prima2-efuse";
				reg = <0xb0140000 0x10000>;
			};

			pulsec@b0150000 {
				compatible = "sirf,prima2-pulsec";
				reg = <0xb0150000 0x10000>;
				interrupts = <48>;
			};

			pci-iobg {
				compatible = "sirf,prima2-pciiobg", "simple-bus";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x56000000 0x56000000 0x1b00000>;

				sd0: sdhci@56000000 {
					cell-index = <0>;
					compatible = "sirf,prima2-sdhc";
					reg = <0x56000000 0x100000>;
					interrupts = <38>;
				};

				sd1: sdhci@56100000 {
					cell-index = <1>;
					compatible = "sirf,prima2-sdhc";
					reg = <0x56100000 0x100000>;
					interrupts = <38>;
				};

				sd2: sdhci@56200000 {
					cell-index = <2>;
					compatible = "sirf,prima2-sdhc";
					reg = <0x56200000 0x100000>;
					interrupts = <23>;
				};

				sd3: sdhci@56300000 {
					cell-index = <3>;
					compatible = "sirf,prima2-sdhc";
					reg = <0x56300000 0x100000>;
					interrupts = <23>;
				};

				sd4: sdhci@56400000 {
					cell-index = <4>;
					compatible = "sirf,prima2-sdhc";
					reg = <0x56400000 0x100000>;
					interrupts = <39>;
				};

				sd5: sdhci@56500000 {
					cell-index = <5>;
					compatible = "sirf,prima2-sdhc";
					reg = <0x56500000 0x100000>;
					interrupts = <39>;
				};

				pci-copy@57900000 {
					compatible = "sirf,prima2-pcicp";
					reg = <0x57900000 0x100000>;
					interrupts = <40>;
				};

				rom-interface@57a00000 {
					compatible = "sirf,prima2-romif";
					reg = <0x57a00000 0x100000>;
				};
			};
		};

		rtc-iobg {
			compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80030000 0x10000>;

			gpsrtc@1000 {
				compatible = "sirf,prima2-gpsrtc";
				reg = <0x1000 0x1000>;
				interrupts = <55 56 57>;
			};

			sysrtc@2000 {
				compatible = "sirf,prima2-sysrtc";
				reg = <0x2000 0x1000>;
				interrupts = <52 53 54>;
			};

			pwrc@3000 {
				compatible = "sirf,prima2-pwrc";
				reg = <0x3000 0x1000>;
				interrupts = <32>;
			};
		};

		uus-iobg {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0xb8000000 0xb8000000 0x40000>;

			usb0: usb@b00e0000 {
				compatible = "chipidea,ci13611a-prima2";
				reg = <0xb8000000 0x10000>;
				interrupts = <10>;
			};

			usb1: usb@b00f0000 {
				compatible = "chipidea,ci13611a-prima2";
				reg = <0xb8010000 0x10000>;
				interrupts = <11>;
			};

			sata@b00f0000 {
				compatible = "synopsys,dwc-ahsata";
				reg = <0xb8020000 0x10000>;
				interrupts = <37>;
			};

			security@b00f0000 {
				compatible = "sirf,prima2-security";
				reg = <0xb8030000 0x10000>;
				interrupts = <42>;
			};
		};
	};
};
Commit	Line	Data
02c981c0 BD	1	/dts-v1/;
	2	/ {
	3	model = "SiRF Prima2 eVB";
	4	compatible = "sirf,prima2-cb", "sirf,prima2";
	5	#address-cells = <1>;
	6	#size-cells = <1>;
	7	interrupt-parent = <&intc>;
	8
	9	memory {
	10	reg = <0x00000000 0x20000000>;
	11	};
	12
	13	chosen {
	14	bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
	15	linux,stdout-path = &uart1;
	16	};
	17
	18	cpus {
	19	#address-cells = <1>;
	20	#size-cells = <0>;
	21
	22	cpu@0 {
	23	reg = <0x0>;
	24	d-cache-line-size = <32>;
	25	i-cache-line-size = <32>;
	26	d-cache-size = <32768>;
	27	i-cache-size = <32768>;
	28	/* from bootloader */
	29	timebase-frequency = <0>;
	30	bus-frequency = <0>;
	31	clock-frequency = <0>;
	32	};
	33	};
	34
	35	axi {
	36	compatible = "simple-bus";
	37	#address-cells = <1>;
	38	#size-cells = <1>;
	39	ranges = <0x40000000 0x40000000 0x80000000>;
	40
	41	l2-cache-controller@80040000 {
917d8535	42	compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
02c981c0 BD	43	reg = <0x80040000 0x1000>;
02c981c0 BD	44	interrupts = <59>;
917d8535 BS	45	arm,tag-latency = <1 1 1>;
	46	arm,data-latency = <1 1 1>;
	47	arm,filter-ranges = <0 0x40000000>;
02c981c0 BD	48	};
	49
	50	intc: interrupt-controller@80020000 {
	51	#interrupt-cells = <1>;
	52	interrupt-controller;
	53	compatible = "sirf,prima2-intc";
	54	reg = <0x80020000 0x1000>;
	55	};
	56
	57	sys-iobg {
	58	compatible = "simple-bus";
	59	#address-cells = <1>;
	60	#size-cells = <1>;
	61	ranges = <0x88000000 0x88000000 0x40000>;
	62
	63	clock-controller@88000000 {
	64	compatible = "sirf,prima2-clkc";
	65	reg = <0x88000000 0x1000>;
	66	interrupts = <3>;
	67	};
	68
	69	reset-controller@88010000 {
	70	compatible = "sirf,prima2-rstc";
	71	reg = <0x88010000 0x1000>;
	72	};
073adf4f BS	73
	74	rsc-controller@88020000 {
	75	compatible = "sirf,prima2-rsc";
	76	reg = <0x88020000 0x1000>;
	77	};
02c981c0 BD	78	};
	79
	80	mem-iobg {
	81	compatible = "simple-bus";
	82	#address-cells = <1>;
	83	#size-cells = <1>;
	84	ranges = <0x90000000 0x90000000 0x10000>;
	85
	86	memory-controller@90000000 {
	87	compatible = "sirf,prima2-memc";
	88	reg = <0x90000000 0x10000>;
	89	interrupts = <27>;
	90	};
	91	};
	92
	93	disp-iobg {
	94	compatible = "simple-bus";
	95	#address-cells = <1>;
	96	#size-cells = <1>;
	97	ranges = <0x90010000 0x90010000 0x30000>;
	98
	99	display@90010000 {
	100	compatible = "sirf,prima2-lcd";
	101	reg = <0x90010000 0x20000>;
	102	interrupts = <30>;
	103	};
	104
	105	vpp@90020000 {
	106	compatible = "sirf,prima2-vpp";
	107	reg = <0x90020000 0x10000>;
	108	interrupts = <31>;
	109	};
	110	};
	111
	112	graphics-iobg {
	113	compatible = "simple-bus";
	114	#address-cells = <1>;
	115	#size-cells = <1>;
	116	ranges = <0x98000000 0x98000000 0x8000000>;
	117
	118	graphics@98000000 {
	119	compatible = "powervr,sgx531";
	120	reg = <0x98000000 0x8000000>;
	121	interrupts = <6>;
	122	};
	123	};
	124
	125	multimedia-iobg {
	126	compatible = "simple-bus";
	127	#address-cells = <1>;
	128	#size-cells = <1>;
	129	ranges = <0xa0000000 0xa0000000 0x8000000>;
	130
	131	multimedia@a0000000 {
	132	compatible = "sirf,prima2-video-codec";
	133	reg = <0xa0000000 0x8000000>;
	134	interrupts = <5>;
	135	};
	136	};
	137
	138	dsp-iobg {
	139	compatible = "simple-bus";
	140	#address-cells = <1>;
	141	#size-cells = <1>;
142	ranges = <0xa8000000 0xa8000000 0x2000000>;
143
144	dspif@a8000000 {
145	compatible = "sirf,prima2-dspif";
146	reg = <0xa8000000 0x10000>;
147	interrupts = <9>;
148	};
149
150	gps@a8010000 {
151	compatible = "sirf,prima2-gps";
152	reg = <0xa8010000 0x10000>;
153	interrupts = <7>;
154	};
155
156	dsp@a9000000 {
157	compatible = "sirf,prima2-dsp";
158	reg = <0xa9000000 0x1000000>;
159	interrupts = <8>;
160	};
161	};
162
163	peri-iobg {
164	compatible = "simple-bus";
165	#address-cells = <1>;
166	#size-cells = <1>;
167	ranges = <0xb0000000 0xb0000000 0x180000>;
168
169	timer@b0020000 {
170	compatible = "sirf,prima2-tick";
171	reg = <0xb0020000 0x1000>;
172	interrupts = <0>;
173	};
174
175	nand@b0030000 {
176	compatible = "sirf,prima2-nand";
177	reg = <0xb0030000 0x10000>;
178	interrupts = <41>;
179	};
180
181	audio@b0040000 {
182	compatible = "sirf,prima2-audio";
183	reg = <0xb0040000 0x10000>;
184	interrupts = <35>;
185	};
186
187	uart0: uart@b0050000 {
188	cell-index = <0>;
189	compatible = "sirf,prima2-uart";
190	reg = <0xb0050000 0x10000>;
191	interrupts = <17>;
192	};
193
194	uart1: uart@b0060000 {
195	cell-index = <1>;
196	compatible = "sirf,prima2-uart";
197	reg = <0xb0060000 0x10000>;
198	interrupts = <18>;
199	};
200
201	uart2: uart@b0070000 {
202	cell-index = <2>;
203	compatible = "sirf,prima2-uart";
204	reg = <0xb0070000 0x10000>;
205	interrupts = <19>;
206	};
207
208	usp0: usp@b0080000 {
209	cell-index = <0>;
210	compatible = "sirf,prima2-usp";
211	reg = <0xb0080000 0x10000>;
212	interrupts = <20>;
213	};
214
215	usp1: usp@b0090000 {
216	cell-index = <1>;
217	compatible = "sirf,prima2-usp";
218	reg = <0xb0090000 0x10000>;
219	interrupts = <21>;
220	};
221
222	usp2: usp@b00a0000 {
223	cell-index = <2>;
224	compatible = "sirf,prima2-usp";
225	reg = <0xb00a0000 0x10000>;
226	interrupts = <22>;
227	};
228
229	dmac0: dma-controller@b00b0000 {
230	cell-index = <0>;
231	compatible = "sirf,prima2-dmac";
232	reg = <0xb00b0000 0x10000>;
233	interrupts = <12>;
234	};
235
236	dmac1: dma-controller@b0160000 {
237	cell-index = <1>;
238	compatible = "sirf,prima2-dmac";
239	reg = <0xb0160000 0x10000>;
240	interrupts = <13>;
241	};
242
243	vip@b00C0000 {
244	compatible = "sirf,prima2-vip";
245	reg = <0xb00C0000 0x10000>;
246	};
247
248	spi0: spi@b00d0000 {
249	cell-index = <0>;
250	compatible = "sirf,prima2-spi";
251	reg = <0xb00d0000 0x10000>;
252	interrupts = <15>;
253	};
254
255	spi1: spi@b0170000 {
256	cell-index = <1>;
257	compatible = "sirf,prima2-spi";
258	reg = <0xb0170000 0x10000>;
259	interrupts = <16>;
260	};
261
262	i2c0: i2c@b00e0000 {
263	cell-index = <0>;
264	compatible = "sirf,prima2-i2c";
265	reg = <0xb00e0000 0x10000>;
266	interrupts = <24>;
267	};
268
269	i2c1: i2c@b00f0000 {
270	cell-index = <1>;
271	compatible = "sirf,prima2-i2c";
272	reg = <0xb00f0000 0x10000>;
273	interrupts = <25>;
274	};
275
276	tsc@b0110000 {
277	compatible = "sirf,prima2-tsc";
278	reg = <0xb0110000 0x10000>;
279	interrupts = <33>;
280	};
281
282	gpio: gpio-controller@b0120000 {
283	#gpio-cells = <2>;
284	#interrupt-cells = <2>;
c915bedf	285	compatible = "sirf,prima2-gpio-pinmux";
02c981c0 BD	286	reg = <0xb0120000 0x10000>;
	287	gpio-controller;
	288	interrupt-controller;
	289	};
	290
	291	pwm@b0130000 {
	292	compatible = "sirf,prima2-pwm";
	293	reg = <0xb0130000 0x10000>;
	294	};
	295
	296	efusesys@b0140000 {
	297	compatible = "sirf,prima2-efuse";
	298	reg = <0xb0140000 0x10000>;
	299	};
	300
	301	pulsec@b0150000 {
	302	compatible = "sirf,prima2-pulsec";
	303	reg = <0xb0150000 0x10000>;
	304	interrupts = <48>;
	305	};
	306
	307	pci-iobg {
	308	compatible = "sirf,prima2-pciiobg", "simple-bus";
	309	#address-cells = <1>;
	310	#size-cells = <1>;
	311	ranges = <0x56000000 0x56000000 0x1b00000>;
	312
	313	sd0: sdhci@56000000 {
	314	cell-index = <0>;
	315	compatible = "sirf,prima2-sdhc";
	316	reg = <0x56000000 0x100000>;
	317	interrupts = <38>;
	318	};
	319
	320	sd1: sdhci@56100000 {
	321	cell-index = <1>;
	322	compatible = "sirf,prima2-sdhc";
	323	reg = <0x56100000 0x100000>;
	324	interrupts = <38>;
	325	};
	326
	327	sd2: sdhci@56200000 {
	328	cell-index = <2>;
	329	compatible = "sirf,prima2-sdhc";
	330	reg = <0x56200000 0x100000>;
	331	interrupts = <23>;
	332	};
	333
	334	sd3: sdhci@56300000 {
	335	cell-index = <3>;
	336	compatible = "sirf,prima2-sdhc";
	337	reg = <0x56300000 0x100000>;
	338	interrupts = <23>;
	339	};
	340
	341	sd4: sdhci@56400000 {
	342	cell-index = <4>;
	343	compatible = "sirf,prima2-sdhc";
	344	reg = <0x56400000 0x100000>;
	345	interrupts = <39>;
	346	};
	347
	348	sd5: sdhci@56500000 {
	349	cell-index = <5>;
350	compatible = "sirf,prima2-sdhc";
351	reg = <0x56500000 0x100000>;
352	interrupts = <39>;
353	};
354
355	pci-copy@57900000 {
356	compatible = "sirf,prima2-pcicp";
357	reg = <0x57900000 0x100000>;
358	interrupts = <40>;
359	};
360
361	rom-interface@57a00000 {
362	compatible = "sirf,prima2-romif";
363	reg = <0x57a00000 0x100000>;
364	};
365	};
366	};
367
368	rtc-iobg {
684f7414	369	compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
02c981c0 BD	370	#address-cells = <1>;
	371	#size-cells = <1>;
	372	reg = <0x80030000 0x10000>;
	373
	374	gpsrtc@1000 {
	375	compatible = "sirf,prima2-gpsrtc";
	376	reg = <0x1000 0x1000>;
	377	interrupts = <55 56 57>;
	378	};
	379
	380	sysrtc@2000 {
	381	compatible = "sirf,prima2-sysrtc";
	382	reg = <0x2000 0x1000>;
	383	interrupts = <52 53 54>;
	384	};
	385
	386	pwrc@3000 {
	387	compatible = "sirf,prima2-pwrc";
	388	reg = <0x3000 0x1000>;
	389	interrupts = <32>;
	390	};
	391	};
	392
	393	uus-iobg {
	394	compatible = "simple-bus";
	395	#address-cells = <1>;
	396	#size-cells = <1>;
	397	ranges = <0xb8000000 0xb8000000 0x40000>;
	398
	399	usb0: usb@b00e0000 {
	400	compatible = "chipidea,ci13611a-prima2";
	401	reg = <0xb8000000 0x10000>;
	402	interrupts = <10>;
	403	};
	404
	405	usb1: usb@b00f0000 {
	406	compatible = "chipidea,ci13611a-prima2";
	407	reg = <0xb8010000 0x10000>;
	408	interrupts = <11>;
	409	};
	410
	411	sata@b00f0000 {
	412	compatible = "synopsys,dwc-ahsata";
	413	reg = <0xb8020000 0x10000>;
	414	interrupts = <37>;
	415	};
	416
	417	security@b00f0000 {
	418	compatible = "sirf,prima2-security";
	419	reg = <0xb8030000 0x10000>;
	420	interrupts = <42>;
	421	};
	422	};
	423	};
	424	};