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10d77ec2 HZ |
1 | /* |
2 | * Copyright (C) 2012 Marvell Technology Group Ltd. | |
3 | * Author: Haojian Zhuang <haojian.zhuang@marvell.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * publishhed by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | /include/ "skeleton.dtsi" | |
11 | ||
12 | / { | |
13 | aliases { | |
14 | serial0 = &uart1; | |
15 | serial1 = &uart2; | |
16 | serial2 = &uart3; | |
17 | i2c0 = &twsi1; | |
18 | i2c1 = &twsi2; | |
19 | }; | |
20 | ||
10d77ec2 HZ |
21 | soc { |
22 | #address-cells = <1>; | |
23 | #size-cells = <1>; | |
24 | compatible = "simple-bus"; | |
25 | interrupt-parent = <&intc>; | |
26 | ranges; | |
27 | ||
ff290fc3 HZ |
28 | axi@d4200000 { /* AXI */ |
29 | compatible = "mrvl,axi-bus", "simple-bus"; | |
30 | #address-cells = <1>; | |
31 | #size-cells = <1>; | |
32 | reg = <0xd4200000 0x00200000>; | |
33 | ranges; | |
34 | ||
35 | intc: interrupt-controller@d4282000 { | |
36 | compatible = "mrvl,mmp-intc"; | |
37 | interrupt-controller; | |
38 | #interrupt-cells = <1>; | |
39 | reg = <0xd4282000 0x1000>; | |
40 | mrvl,intc-nr-irqs = <64>; | |
41 | }; | |
42 | ||
43 | }; | |
44 | ||
10d77ec2 HZ |
45 | apb@d4000000 { /* APB */ |
46 | compatible = "mrvl,apb-bus", "simple-bus"; | |
47 | #address-cells = <1>; | |
48 | #size-cells = <1>; | |
49 | reg = <0xd4000000 0x00200000>; | |
50 | ranges; | |
51 | ||
ff290fc3 HZ |
52 | timer0: timer@d4014000 { |
53 | compatible = "mrvl,mmp-timer"; | |
54 | reg = <0xd4014000 0x100>; | |
55 | interrupts = <13>; | |
56 | }; | |
57 | ||
10d77ec2 | 58 | uart1: uart@d4017000 { |
ff290fc3 | 59 | compatible = "mrvl,mmp-uart"; |
10d77ec2 HZ |
60 | reg = <0xd4017000 0x1000>; |
61 | interrupts = <27>; | |
62 | status = "disabled"; | |
63 | }; | |
64 | ||
65 | uart2: uart@d4018000 { | |
ff290fc3 | 66 | compatible = "mrvl,mmp-uart"; |
10d77ec2 HZ |
67 | reg = <0xd4018000 0x1000>; |
68 | interrupts = <28>; | |
69 | status = "disabled"; | |
70 | }; | |
71 | ||
72 | uart3: uart@d4026000 { | |
ff290fc3 | 73 | compatible = "mrvl,mmp-uart"; |
10d77ec2 HZ |
74 | reg = <0xd4026000 0x1000>; |
75 | interrupts = <29>; | |
76 | status = "disabled"; | |
77 | }; | |
78 | ||
ff290fc3 | 79 | gpio@d4019000 { |
f8731174 | 80 | compatible = "marvell,mmp-gpio"; |
ff290fc3 HZ |
81 | #address-cells = <1>; |
82 | #size-cells = <1>; | |
10d77ec2 | 83 | reg = <0xd4019000 0x1000>; |
ff290fc3 HZ |
84 | gpio-controller; |
85 | #gpio-cells = <2>; | |
10d77ec2 HZ |
86 | interrupts = <49>; |
87 | interrupt-names = "gpio_mux"; | |
10d77ec2 HZ |
88 | interrupt-controller; |
89 | #interrupt-cells = <1>; | |
ff290fc3 HZ |
90 | ranges; |
91 | ||
92 | gcb0: gpio@d4019000 { | |
93 | reg = <0xd4019000 0x4>; | |
94 | }; | |
95 | ||
96 | gcb1: gpio@d4019004 { | |
97 | reg = <0xd4019004 0x4>; | |
98 | }; | |
99 | ||
100 | gcb2: gpio@d4019008 { | |
101 | reg = <0xd4019008 0x4>; | |
102 | }; | |
103 | ||
104 | gcb3: gpio@d4019100 { | |
105 | reg = <0xd4019100 0x4>; | |
106 | }; | |
10d77ec2 HZ |
107 | }; |
108 | ||
109 | twsi1: i2c@d4011000 { | |
ff290fc3 | 110 | compatible = "mrvl,mmp-twsi"; |
10d77ec2 HZ |
111 | reg = <0xd4011000 0x1000>; |
112 | interrupts = <7>; | |
113 | mrvl,i2c-fast-mode; | |
114 | status = "disabled"; | |
115 | }; | |
116 | ||
117 | twsi2: i2c@d4025000 { | |
ff290fc3 | 118 | compatible = "mrvl,mmp-twsi"; |
10d77ec2 HZ |
119 | reg = <0xd4025000 0x1000>; |
120 | interrupts = <58>; | |
121 | status = "disabled"; | |
122 | }; | |
123 | ||
124 | rtc: rtc@d4010000 { | |
125 | compatible = "mrvl,mmp-rtc"; | |
126 | reg = <0xd4010000 0x1000>; | |
127 | interrupts = <5 6>; | |
128 | interrupt-names = "rtc 1Hz", "rtc alarm"; | |
129 | status = "disabled"; | |
130 | }; | |
131 | }; | |
132 | }; | |
133 | }; |