projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| eccf0607 MD |
1 | /* |
| 2 | * Device Tree Source for the r8a73a4 SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
| 5 | * Copyright (C) 2013 Magnus Damm | |
| 6 | * | |
| 7 | * This file is licensed under the terms of the GNU General Public License | |
| 8 | * version 2. This program is licensed "as is" without any warranty of any | |
| 9 | * kind, whether express or implied. | |
| 10 | */ | |
| 11 | ||
| eccf0607 MD |
12 | / { |
| 13 | compatible = "renesas,r8a73a4"; | |
| 14 | interrupt-parent = <&gic>; | |
| 26a0d2d4 TY |
15 | #address-cells = <2>; |
| 16 | #size-cells = <2>; | |
| eccf0607 MD |
17 | |
| 18 | cpus { | |
| 19 | #address-cells = <1>; | |
| 20 | #size-cells = <0>; | |
| 21 | ||
| 22 | cpu0: cpu@0 { | |
| 23 | device_type = "cpu"; | |
| 24 | compatible = "arm,cortex-a15"; | |
| 25 | reg = <0>; | |
| 26 | clock-frequency = <1500000000>; | |
| 27 | }; | |
| 28 | }; | |
| 29 | ||
| 30 | gic: interrupt-controller@f1001000 { | |
| 31 | compatible = "arm,cortex-a15-gic"; | |
| 32 | #interrupt-cells = <3>; | |
| 33 | #address-cells = <0>; | |
| 34 | interrupt-controller; | |
| 26a0d2d4 TY |
35 | reg = <0 0xf1001000 0 0x1000>, |
| 36 | <0 0xf1002000 0 0x1000>, | |
| 37 | <0 0xf1004000 0 0x2000>, | |
| 38 | <0 0xf1006000 0 0x2000>; | |
| eccf0607 | 39 | interrupts = <1 9 0xf04>; |
| eccf0607 MD |
40 | }; |
| 41 | ||
| 42 | timer { | |
| 43 | compatible = "arm,armv7-timer"; | |
| 44 | interrupts = <1 13 0xf08>, | |
| 45 | <1 14 0xf08>, | |
| 46 | <1 11 0xf08>, | |
| 47 | <1 10 0xf08>; | |
| 48 | }; | |
| 984ca295 MD |
49 | |
| 50 | irqc0: interrupt-controller@e61c0000 { | |
| 51 | compatible = "renesas,irqc"; | |
| 52 | #interrupt-cells = <2>; | |
| 53 | interrupt-controller; | |
| 26a0d2d4 | 54 | reg = <0 0xe61c0000 0 0x200>; |
| 984ca295 MD |
55 | interrupt-parent = <&gic>; |
| 56 | interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>, | |
| 57 | <0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>, | |
| 58 | <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>, | |
| 59 | <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>, | |
| 60 | <0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>, | |
| 61 | <0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>, | |
| 62 | <0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>, | |
| 63 | <0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>; | |
| 64 | }; | |
| 65 | ||
| 66 | irqc1: interrupt-controller@e61c0200 { | |
| 67 | compatible = "renesas,irqc"; | |
| 68 | #interrupt-cells = <2>; | |
| 69 | interrupt-controller; | |
| 26a0d2d4 | 70 | reg = <0 0xe61c0200 0 0x200>; |
| 984ca295 MD |
71 | interrupt-parent = <&gic>; |
| 72 | interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>, | |
| 73 | <0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>, | |
| 74 | <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>, | |
| 75 | <0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>, | |
| 76 | <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>, | |
| 77 | <0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>, | |
| 78 | <0 56 4>, <0 57 4>; | |
| 79 | }; | |
| 80 | ||
| c91cf2fa KM |
81 | thermal@e61f0000 { |
| 82 | compatible = "renesas,rcar-thermal"; | |
| 26a0d2d4 TY |
83 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, |
| 84 | <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; | |
| c91cf2fa KM |
85 | interrupt-parent = <&gic>; |
| 86 | interrupts = <0 69 4>; | |
| 87 | }; | |
| f98c1069 GL |
88 | |
| 89 | i2c0: i2c@e6500000 { | |
| 90 | #address-cells = <1>; | |
| 91 | #size-cells = <0>; | |
| 92 | compatible = "renesas,rmobile-iic"; | |
| 93 | reg = <0 0xe6500000 0 0x428>; | |
| 94 | interrupt-parent = <&gic>; | |
| 95 | interrupts = <0 174 0x4>; | |
| 96 | }; | |
| 97 | ||
| 98 | i2c1: i2c@e6510000 { | |
| 99 | #address-cells = <1>; | |
| 100 | #size-cells = <0>; | |
| 101 | compatible = "renesas,rmobile-iic"; | |
| 102 | reg = <0 0xe6510000 0 0x428>; | |
| 103 | interrupt-parent = <&gic>; | |
| 104 | interrupts = <0 175 0x4>; | |
| 105 | }; | |
| 106 | ||
| 107 | i2c2: i2c@e6520000 { | |
| 108 | #address-cells = <1>; | |
| 109 | #size-cells = <0>; | |
| 110 | compatible = "renesas,rmobile-iic"; | |
| 111 | reg = <0 0xe6520000 0 0x428>; | |
| 112 | interrupt-parent = <&gic>; | |
| 113 | interrupts = <0 176 0x4>; | |
| 114 | }; | |
| 115 | ||
| 116 | i2c3: i2c@e6530000 { | |
| 117 | #address-cells = <1>; | |
| 118 | #size-cells = <0>; | |
| 119 | compatible = "renesas,rmobile-iic"; | |
| 120 | reg = <0 0xe6530000 0 0x428>; | |
| 121 | interrupt-parent = <&gic>; | |
| 122 | interrupts = <0 177 0x4>; | |
| 123 | }; | |
| 124 | ||
| 125 | i2c4: i2c@e6540000 { | |
| 126 | #address-cells = <1>; | |
| 127 | #size-cells = <0>; | |
| 128 | compatible = "renesas,rmobile-iic"; | |
| 129 | reg = <0 0xe6540000 0 0x428>; | |
| 130 | interrupt-parent = <&gic>; | |
| 131 | interrupts = <0 178 0x4>; | |
| 132 | }; | |
| 133 | ||
| 134 | i2c5: i2c@e60b0000 { | |
| 135 | #address-cells = <1>; | |
| 136 | #size-cells = <0>; | |
| 137 | compatible = "renesas,rmobile-iic"; | |
| 138 | reg = <0 0xe60b0000 0 0x428>; | |
| 139 | interrupt-parent = <&gic>; | |
| 140 | interrupts = <0 179 0x4>; | |
| 141 | }; | |
| 142 | ||
| 143 | i2c6: i2c@e6550000 { | |
| 144 | #address-cells = <1>; | |
| 145 | #size-cells = <0>; | |
| 146 | compatible = "renesas,rmobile-iic"; | |
| 147 | reg = <0 0xe6550000 0 0x428>; | |
| 148 | interrupt-parent = <&gic>; | |
| 149 | interrupts = <0 184 0x4>; | |
| 150 | }; | |
| 151 | ||
| 152 | i2c7: i2c@e6560000 { | |
| 153 | #address-cells = <1>; | |
| 154 | #size-cells = <0>; | |
| 155 | compatible = "renesas,rmobile-iic"; | |
| 156 | reg = <0 0xe6560000 0 0x428>; | |
| 157 | interrupt-parent = <&gic>; | |
| 158 | interrupts = <0 185 0x4>; | |
| 159 | }; | |
| 160 | ||
| 161 | i2c8: i2c@e6570000 { | |
| 162 | #address-cells = <1>; | |
| 163 | #size-cells = <0>; | |
| 164 | compatible = "renesas,rmobile-iic"; | |
| 165 | reg = <0 0xe6570000 0 0x428>; | |
| 166 | interrupt-parent = <&gic>; | |
| 167 | interrupts = <0 173 0x4>; | |
| 168 | }; | |
| 369ee2db GL |
169 | |
| 170 | mmcif0: mmcif@ee200000 { | |
| 171 | compatible = "renesas,sh-mmcif"; | |
| 172 | reg = <0 0xee200000 0 0x80>; | |
| 173 | interrupt-parent = <&gic>; | |
| 174 | interrupts = <0 169 0x4>; | |
| 175 | reg-io-width = <4>; | |
| 176 | status = "disabled"; | |
| 177 | }; | |
| 178 | ||
| 179 | mmcif1: mmcif@ee220000 { | |
| 180 | compatible = "renesas,sh-mmcif"; | |
| 181 | reg = <0 0xee220000 0 0x80>; | |
| 182 | interrupt-parent = <&gic>; | |
| 183 | interrupts = <0 170 0x4>; | |
| 184 | reg-io-width = <4>; | |
| 185 | status = "disabled"; | |
| 186 | }; | |
| 187 | ||
| 803d319c LP |
188 | pfc: pfc@e6050000 { |
| 189 | compatible = "renesas,pfc-r8a73a4"; | |
| 190 | reg = <0 0xe6050000 0 0x9000>; | |
| 191 | gpio-controller; | |
| 192 | #gpio-cells = <2>; | |
| 193 | }; | |
| 55689bfa | 194 | |
| 369ee2db | 195 | sdhi0: sdhi@ee100000 { |
| df1d0584 | 196 | compatible = "renesas,sdhi-r8a73a4"; |
| 369ee2db GL |
197 | reg = <0 0xee100000 0 0x100>; |
| 198 | interrupt-parent = <&gic>; | |
| 199 | interrupts = <0 165 4>; | |
| 200 | cap-sd-highspeed; | |
| 201 | status = "disabled"; | |
| 202 | }; | |
| 203 | ||
| 204 | sdhi1: sdhi@ee120000 { | |
| df1d0584 | 205 | compatible = "renesas,sdhi-r8a73a4"; |
| 369ee2db GL |
206 | reg = <0 0xee120000 0 0x100>; |
| 207 | interrupt-parent = <&gic>; | |
| 208 | interrupts = <0 166 4>; | |
| 209 | cap-sd-highspeed; | |
| 210 | status = "disabled"; | |
| 211 | }; | |
| 212 | ||
| 213 | sdhi2: sdhi@ee140000 { | |
| df1d0584 | 214 | compatible = "renesas,sdhi-r8a73a4"; |
| 369ee2db GL |
215 | reg = <0 0xee140000 0 0x100>; |
| 216 | interrupt-parent = <&gic>; | |
| 217 | interrupts = <0 167 4>; | |
| 218 | cap-sd-highspeed; | |
| 219 | status = "disabled"; | |
| 220 | }; | |
| eccf0607 | 221 | }; |