Commit | Line | Data |
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755d57b2 MD |
1 | /* |
2 | * Device Tree Source for the r8a7740 SoC | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /include/ "skeleton.dtsi" | |
12 | ||
13 | / { | |
14 | compatible = "renesas,r8a7740"; | |
15 | ||
16 | cpus { | |
b4032013 LP |
17 | #address-cells = <1>; |
18 | #size-cells = <0>; | |
755d57b2 MD |
19 | cpu@0 { |
20 | compatible = "arm,cortex-a9"; | |
b4032013 LP |
21 | device_type = "cpu"; |
22 | reg = <0x0>; | |
755d57b2 MD |
23 | }; |
24 | }; | |
744fdc8d BH |
25 | |
26 | gic: interrupt-controller@c2800000 { | |
27 | compatible = "arm,cortex-a9-gic"; | |
28 | #interrupt-cells = <3>; | |
29 | #address-cells = <1>; | |
30 | interrupt-controller; | |
31 | reg = <0xc2800000 0x1000>, | |
32 | <0xc2000000 0x1000>; | |
33 | }; | |
34 | ||
35 | /* irqpin0: IRQ0 - IRQ7 */ | |
36 | irqpin0: irqpin@e6900000 { | |
37 | compatible = "renesas,intc-irqpin"; | |
38 | #interrupt-cells = <2>; | |
39 | interrupt-controller; | |
40 | reg = <0xe6900000 4>, | |
41 | <0xe6900010 4>, | |
42 | <0xe6900020 1>, | |
43 | <0xe6900040 1>, | |
44 | <0xe6900060 1>; | |
45 | interrupt-parent = <&gic>; | |
46 | interrupts = <0 149 0x4 | |
47 | 0 149 0x4 | |
48 | 0 149 0x4 | |
49 | 0 149 0x4 | |
50 | 0 149 0x4 | |
51 | 0 149 0x4 | |
52 | 0 149 0x4 | |
53 | 0 149 0x4>; | |
54 | }; | |
55 | ||
56 | /* irqpin1: IRQ8 - IRQ15 */ | |
57 | irqpin1: irqpin@e6900004 { | |
58 | compatible = "renesas,intc-irqpin"; | |
59 | #interrupt-cells = <2>; | |
60 | interrupt-controller; | |
61 | reg = <0xe6900004 4>, | |
62 | <0xe6900014 4>, | |
63 | <0xe6900024 1>, | |
64 | <0xe6900044 1>, | |
65 | <0xe6900064 1>; | |
66 | interrupt-parent = <&gic>; | |
67 | interrupts = <0 149 0x4 | |
68 | 0 149 0x4 | |
69 | 0 149 0x4 | |
70 | 0 149 0x4 | |
71 | 0 149 0x4 | |
72 | 0 149 0x4 | |
73 | 0 149 0x4 | |
74 | 0 149 0x4>; | |
75 | }; | |
76 | ||
77 | /* irqpin2: IRQ16 - IRQ23 */ | |
78 | irqpin2: irqpin@e6900008 { | |
79 | compatible = "renesas,intc-irqpin"; | |
80 | #interrupt-cells = <2>; | |
81 | interrupt-controller; | |
82 | reg = <0xe6900008 4>, | |
83 | <0xe6900018 4>, | |
84 | <0xe6900028 1>, | |
85 | <0xe6900048 1>, | |
86 | <0xe6900068 1>; | |
87 | interrupt-parent = <&gic>; | |
88 | interrupts = <0 149 0x4 | |
89 | 0 149 0x4 | |
90 | 0 149 0x4 | |
91 | 0 149 0x4 | |
92 | 0 149 0x4 | |
93 | 0 149 0x4 | |
94 | 0 149 0x4 | |
95 | 0 149 0x4>; | |
96 | }; | |
97 | ||
98 | /* irqpin3: IRQ24 - IRQ31 */ | |
99 | irqpin3: irqpin@e690000c { | |
100 | compatible = "renesas,intc-irqpin"; | |
101 | #interrupt-cells = <2>; | |
102 | interrupt-controller; | |
103 | reg = <0xe690000c 4>, | |
104 | <0xe690001c 4>, | |
105 | <0xe690002c 1>, | |
106 | <0xe690004c 1>, | |
107 | <0xe690006c 1>; | |
108 | interrupt-parent = <&gic>; | |
109 | interrupts = <0 149 0x4 | |
110 | 0 149 0x4 | |
111 | 0 149 0x4 | |
112 | 0 149 0x4 | |
113 | 0 149 0x4 | |
114 | 0 149 0x4 | |
115 | 0 149 0x4 | |
116 | 0 149 0x4>; | |
117 | }; | |
118 | ||
119 | i2c0: i2c@fff20000 { | |
120 | #address-cells = <1>; | |
121 | #size-cells = <0>; | |
122 | compatible = "renesas,rmobile-iic"; | |
123 | reg = <0xfff20000 0x425>; | |
124 | interrupt-parent = <&gic>; | |
125 | interrupts = <0 201 0x4 | |
126 | 0 202 0x4 | |
127 | 0 203 0x4 | |
128 | 0 204 0x4>; | |
129 | }; | |
130 | ||
131 | i2c1: i2c@e6c20000 { | |
132 | #address-cells = <1>; | |
133 | #size-cells = <0>; | |
134 | compatible = "renesas,rmobile-iic"; | |
135 | reg = <0xe6c20000 0x425>; | |
136 | interrupt-parent = <&gic>; | |
137 | interrupts = <0 70 0x4 | |
138 | 0 71 0x4 | |
139 | 0 72 0x4 | |
140 | 0 73 0x4>; | |
141 | }; | |
755d57b2 | 142 | }; |