[deliverable/linux.git] / arch / arm / boot / dts / r8a7740.dtsi

/*
 * Device Tree Source for the r8a7740 SoC
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "renesas,r8a7740";
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x0>;
			clock-frequency = <800000000>;
		};
	};

	gic: interrupt-controller@c2800000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xc2800000 0x1000>,
		      <0xc2000000 0x1000>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
	};

	/* irqpin0: IRQ0 - IRQ7 */
	irqpin0: irqpin@e6900000 {
		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900000 4>,
			<0xe6900010 4>,
			<0xe6900020 1>,
			<0xe6900040 1>,
			<0xe6900060 1>;
		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH>;
	};

	/* irqpin1: IRQ8 - IRQ15 */
	irqpin1: irqpin@e6900004 {
		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900004 4>,
			<0xe6900014 4>,
			<0xe6900024 1>,
			<0xe6900044 1>,
			<0xe6900064 1>;
		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH>;
	};

	/* irqpin2: IRQ16 - IRQ23 */
	irqpin2: irqpin@e6900008 {
		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900008 4>,
			<0xe6900018 4>,
			<0xe6900028 1>,
			<0xe6900048 1>,
			<0xe6900068 1>;
		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH>;
	};

	/* irqpin3: IRQ24 - IRQ31 */
	irqpin3: irqpin@e690000c {
		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe690000c 4>,
			<0xe690001c 4>,
			<0xe690002c 1>,
			<0xe690004c 1>,
			<0xe690006c 1>;
		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH
			      0 149 IRQ_TYPE_LEVEL_HIGH>;
	};

	ether: ethernet@e9a00000 {
		compatible = "renesas,gether-r8a7740";
		reg = <0xe9a00000 0x800>,
		      <0xe9a01800 0x800>;
		interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
		/* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
		phy-mode = "mii";
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c0: i2c@fff20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
		reg = <0xfff20000 0x425>;
		interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
			      0 202 IRQ_TYPE_LEVEL_HIGH
			      0 203 IRQ_TYPE_LEVEL_HIGH
			      0 204 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c1: i2c@e6c20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
		reg = <0xe6c20000 0x425>;
		interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
			      0 71 IRQ_TYPE_LEVEL_HIGH
			      0 72 IRQ_TYPE_LEVEL_HIGH
			      0 73 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	pfc: pfc@e6050000 {
		compatible = "renesas,pfc-r8a7740";
		reg = <0xe6050000 0x8000>,
		      <0xe605800c 0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupts-extended =
			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
	};

	tpu: pwm@e6600000 {
		compatible = "renesas,tpu-r8a7740", "renesas,tpu";
		reg = <0xe6600000 0x100>;
		status = "disabled";
		#pwm-cells = <3>;
	};

	mmcif0: mmc@e6bd0000 {
		compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
		reg = <0xe6bd0000 0x100>;
		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
			      0 57 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	sdhi0: sd@e6850000 {
		compatible = "renesas,sdhi-r8a7740";
		reg = <0xe6850000 0x100>;
		interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
			      0 118 IRQ_TYPE_LEVEL_HIGH
			      0 119 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		cap-sdio-irq;
		status = "disabled";
	};

	sdhi1: sd@e6860000 {
		compatible = "renesas,sdhi-r8a7740";
		reg = <0xe6860000 0x100>;
		interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
			      0 122 IRQ_TYPE_LEVEL_HIGH
			      0 123 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		cap-sdio-irq;
		status = "disabled";
	};

	sdhi2: sd@e6870000 {
		compatible = "renesas,sdhi-r8a7740";
		reg = <0xe6870000 0x100>;
		interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
			      0 126 IRQ_TYPE_LEVEL_HIGH
			      0 127 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		cap-sdio-irq;
		status = "disabled";
	};

	sh_fsi2: sound@fe1f0000 {
		#sound-dai-cells = <1>;
		compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
		reg = <0xfe1f0000 0x400>;
		interrupts = <0 9 0x4>;
		status = "disabled";
	};
};
Commit	Line	Data
755d57b2 MD	1	/*
	2	* Device Tree Source for the r8a7740 SoC
	3	*
	4	* Copyright (C) 2012 Renesas Solutions Corp.
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
	11	/include/ "skeleton.dtsi"
	12
5f75e73c LP	13	#include <dt-bindings/interrupt-controller/irq.h>
5f75e73c LP	14
755d57b2 MD	15	/ {
755d57b2 MD	16	compatible = "renesas,r8a7740";
9ff254ad	17	interrupt-parent = <&gic>;
755d57b2 MD	18
755d57b2 MD	19	cpus {
b4032013 LP	20	#address-cells = <1>;
b4032013 LP	21	#size-cells = <0>;
755d57b2 MD	22	cpu@0 {
755d57b2 MD	23	compatible = "arm,cortex-a9";
b4032013 LP	24	device_type = "cpu";
b4032013 LP	25	reg = <0x0>;
63575d8c	26	clock-frequency = <800000000>;
755d57b2 MD	27	};
755d57b2 MD	28	};
744fdc8d BH	29
	30	gic: interrupt-controller@c2800000 {
	31	compatible = "arm,cortex-a9-gic";
	32	#interrupt-cells = <3>;
744fdc8d BH	33	interrupt-controller;
	34	reg = <0xc2800000 0x1000>,
	35	<0xc2000000 0x1000>;
	36	};
	37
b21ed4eb MD	38	pmu {
b21ed4eb MD	39	compatible = "arm,cortex-a9-pmu";
5f75e73c	40	interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
b21ed4eb MD	41	};
b21ed4eb MD	42
744fdc8d BH	43	/* irqpin0: IRQ0 - IRQ7 */
744fdc8d BH	44	irqpin0: irqpin@e6900000 {
96327999	45	compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
744fdc8d BH	46	#interrupt-cells = <2>;
	47	interrupt-controller;
	48	reg = <0xe6900000 4>,
	49	<0xe6900010 4>,
	50	<0xe6900020 1>,
	51	<0xe6900040 1>,
	52	<0xe6900060 1>;
5f75e73c LP	53	interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
	54	0 149 IRQ_TYPE_LEVEL_HIGH
	55	0 149 IRQ_TYPE_LEVEL_HIGH
	56	0 149 IRQ_TYPE_LEVEL_HIGH
	57	0 149 IRQ_TYPE_LEVEL_HIGH
	58	0 149 IRQ_TYPE_LEVEL_HIGH
	59	0 149 IRQ_TYPE_LEVEL_HIGH
	60	0 149 IRQ_TYPE_LEVEL_HIGH>;
744fdc8d BH	61	};
	62
	63	/* irqpin1: IRQ8 - IRQ15 */
	64	irqpin1: irqpin@e6900004 {
96327999	65	compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
744fdc8d BH	66	#interrupt-cells = <2>;
	67	interrupt-controller;
	68	reg = <0xe6900004 4>,
	69	<0xe6900014 4>,
	70	<0xe6900024 1>,
	71	<0xe6900044 1>,
	72	<0xe6900064 1>;
5f75e73c LP	73	interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
	74	0 149 IRQ_TYPE_LEVEL_HIGH
	75	0 149 IRQ_TYPE_LEVEL_HIGH
	76	0 149 IRQ_TYPE_LEVEL_HIGH
	77	0 149 IRQ_TYPE_LEVEL_HIGH
	78	0 149 IRQ_TYPE_LEVEL_HIGH
	79	0 149 IRQ_TYPE_LEVEL_HIGH
	80	0 149 IRQ_TYPE_LEVEL_HIGH>;
744fdc8d BH	81	};
	82
	83	/* irqpin2: IRQ16 - IRQ23 */
	84	irqpin2: irqpin@e6900008 {
96327999	85	compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
744fdc8d BH	86	#interrupt-cells = <2>;
	87	interrupt-controller;
	88	reg = <0xe6900008 4>,
	89	<0xe6900018 4>,
	90	<0xe6900028 1>,
	91	<0xe6900048 1>,
	92	<0xe6900068 1>;
5f75e73c LP	93	interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
	94	0 149 IRQ_TYPE_LEVEL_HIGH
	95	0 149 IRQ_TYPE_LEVEL_HIGH
	96	0 149 IRQ_TYPE_LEVEL_HIGH
	97	0 149 IRQ_TYPE_LEVEL_HIGH
	98	0 149 IRQ_TYPE_LEVEL_HIGH
	99	0 149 IRQ_TYPE_LEVEL_HIGH
	100	0 149 IRQ_TYPE_LEVEL_HIGH>;
744fdc8d BH	101	};
	102
	103	/* irqpin3: IRQ24 - IRQ31 */
	104	irqpin3: irqpin@e690000c {
96327999	105	compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
744fdc8d BH	106	#interrupt-cells = <2>;
	107	interrupt-controller;
	108	reg = <0xe690000c 4>,
	109	<0xe690001c 4>,
	110	<0xe690002c 1>,
	111	<0xe690004c 1>,
	112	<0xe690006c 1>;
5f75e73c LP	113	interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
	114	0 149 IRQ_TYPE_LEVEL_HIGH
	115	0 149 IRQ_TYPE_LEVEL_HIGH
	116	0 149 IRQ_TYPE_LEVEL_HIGH
	117	0 149 IRQ_TYPE_LEVEL_HIGH
	118	0 149 IRQ_TYPE_LEVEL_HIGH
	119	0 149 IRQ_TYPE_LEVEL_HIGH
	120	0 149 IRQ_TYPE_LEVEL_HIGH>;
744fdc8d BH	121	};
744fdc8d BH	122
08ec67b5 GU	123	ether: ethernet@e9a00000 {
	124	compatible = "renesas,gether-r8a7740";
	125	reg = <0xe9a00000 0x800>,
	126	<0xe9a01800 0x800>;
08ec67b5 GU	127	interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
	128	/* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
	129	phy-mode = "mii";
	130	#address-cells = <1>;
	131	#size-cells = <0>;
	132	status = "disabled";
	133	};
	134
744fdc8d BH	135	i2c0: i2c@fff20000 {
	136	#address-cells = <1>;
	137	#size-cells = <0>;
5c53f50c	138	compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
744fdc8d	139	reg = <0xfff20000 0x425>;
5f75e73c LP	140	interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
	141	0 202 IRQ_TYPE_LEVEL_HIGH
	142	0 203 IRQ_TYPE_LEVEL_HIGH
	143	0 204 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	144	status = "disabled";
744fdc8d BH	145	};
	146
	147	i2c1: i2c@e6c20000 {
	148	#address-cells = <1>;
	149	#size-cells = <0>;
5c53f50c	150	compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
744fdc8d	151	reg = <0xe6c20000 0x425>;
5f75e73c LP	152	interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
	153	0 71 IRQ_TYPE_LEVEL_HIGH
	154	0 72 IRQ_TYPE_LEVEL_HIGH
	155	0 73 IRQ_TYPE_LEVEL_HIGH>;
eda3a4fa	156	status = "disabled";
744fdc8d	157	};
f36218d2 LP	158
	159	pfc: pfc@e6050000 {
	160	compatible = "renesas,pfc-r8a7740";
	161	reg = <0xe6050000 0x8000>,
	162	<0xe605800c 0x20>;
	163	gpio-controller;
	164	#gpio-cells = <2>;
778de006 LP	165	interrupts-extended =
	166	<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
	167	<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
	168	<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
	169	<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
	170	<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
	171	<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
	172	<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
	173	<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
f36218d2	174	};
fa91515c	175
8b3e32c1 LP	176	tpu: pwm@e6600000 {
	177	compatible = "renesas,tpu-r8a7740", "renesas,tpu";
	178	reg = <0xe6600000 0x100>;
	179	status = "disabled";
	180	#pwm-cells = <3>;
	181	};
e99d7963	182
7d907894	183	mmcif0: mmc@e6bd0000 {
5c53f50c	184	compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
e99d7963	185	reg = <0xe6bd0000 0x100>;
5f75e73c LP	186	interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
5f75e73c LP	187	0 57 IRQ_TYPE_LEVEL_HIGH>;
e99d7963 GL	188	status = "disabled";
	189	};
	190
7d907894	191	sdhi0: sd@e6850000 {
e99d7963 GL	192	compatible = "renesas,sdhi-r8a7740";
e99d7963 GL	193	reg = <0xe6850000 0x100>;
5f75e73c LP	194	interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
	195	0 118 IRQ_TYPE_LEVEL_HIGH
	196	0 119 IRQ_TYPE_LEVEL_HIGH>;
e99d7963 GL	197	cap-sd-highspeed;
	198	cap-sdio-irq;
	199	status = "disabled";
	200	};
	201
7d907894	202	sdhi1: sd@e6860000 {
e99d7963 GL	203	compatible = "renesas,sdhi-r8a7740";
e99d7963 GL	204	reg = <0xe6860000 0x100>;
5f75e73c LP	205	interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
	206	0 122 IRQ_TYPE_LEVEL_HIGH
	207	0 123 IRQ_TYPE_LEVEL_HIGH>;
e99d7963 GL	208	cap-sd-highspeed;
	209	cap-sdio-irq;
	210	status = "disabled";
	211	};
7d907894 KM	212
	213	sdhi2: sd@e6870000 {
	214	compatible = "renesas,sdhi-r8a7740";
	215	reg = <0xe6870000 0x100>;
5f75e73c LP	216	interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
	217	0 126 IRQ_TYPE_LEVEL_HIGH
	218	0 127 IRQ_TYPE_LEVEL_HIGH>;
7d907894 KM	219	cap-sd-highspeed;
	220	cap-sdio-irq;
	221	status = "disabled";
	222	};
efcd869b KM	223
	224	sh_fsi2: sound@fe1f0000 {
	225	#sound-dai-cells = <1>;
5c53f50c	226	compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
efcd869b	227	reg = <0xfe1f0000 0x400>;
efcd869b KM	228	interrupts = <0 9 0x4>;
	229	status = "disabled";
	230	};
755d57b2	231	};