ARM: shmobile: r8a7790: switch console back to scif0
[deliverable/linux.git] / arch / arm / boot / dts / r8a7778-bockw.dts
CommitLineData
53e42c29
KM
1/*
2 * Reference Device Tree Source for the Bock-W board
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on r8a7779
8 *
9 * Copyright (C) 2013 Renesas Solutions Corp.
10 * Copyright (C) 2013 Simon Horman
11 *
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
15 */
16
17/dts-v1/;
31c46cbf 18#include "r8a7778.dtsi"
8c4892a6
UH
19#include <dt-bindings/interrupt-controller/irq.h>
20#include <dt-bindings/gpio/gpio.h>
53e42c29
KM
21
22/ {
23 model = "bockw";
24 compatible = "renesas,bockw", "renesas,r8a7778";
25
8c4892a6
UH
26 aliases {
27 serial0 = &scif0;
28 };
29
53e42c29 30 chosen {
d2f463a6 31 bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
8c4892a6 32 stdout-path = &scif0;
53e42c29
KM
33 };
34
35 memory {
36 device_type = "memory";
37 reg = <0x60000000 0x10000000>;
38 };
8c4892a6
UH
39
40 fixedregulator3v3: fixedregulator@0 {
41 compatible = "regulator-fixed";
42 regulator-name = "fixed-3.3V";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 regulator-boot-on;
46 regulator-always-on;
47 };
ba324495
UH
48
49 sound {
50 compatible = "simple-audio-card";
51
52 simple-audio-card,format = "left_j";
53 simple-audio-card,bitclock-master = <&sndcodec>;
54 simple-audio-card,frame-master = <&sndcodec>;
55
56 sndcpu: simple-audio-card,cpu {
57 sound-dai = <&rcar_sound>;
58 };
59
60 sndcodec: simple-audio-card,codec {
61 sound-dai = <&ak4643>;
62 system-clock-frequency = <11289600>;
63 };
64 };
7d316faa 65};
8c4892a6 66
7d316faa 67&bsc {
8c4892a6
UH
68 ethernet@18300000 {
69 compatible = "smsc,lan9220", "smsc,lan9115";
70 reg = <0x18300000 0x1000>;
71
72 phy-mode = "mii";
73 interrupt-parent = <&irqpin>;
74 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
75 reg-io-width = <4>;
76 vddvario-supply = <&fixedregulator3v3>;
77 vdd33a-supply = <&fixedregulator3v3>;
78 };
79};
80
a5dc23f6
UH
81&extal_clk {
82 clock-frequency = <33333333>;
83};
84
95e7381b
UH
85&i2c0 {
86 status = "okay";
87
61ffb5ca 88 ak4643: codec@12 {
95e7381b
UH
89 compatible = "asahi-kasei,ak4643";
90 #sound-dai-cells = <0>;
91 reg = <0x12>;
92 };
93
94 camera@41 {
95 compatible = "oki,ml86v7667";
96 reg = <0x41>;
97 };
98
99 camera@43 {
100 compatible = "oki,ml86v7667";
101 reg = <0x43>;
102 };
103
104 rx8581: rtc@51 {
105 compatible = "epson,rx8581";
106 reg = <0x51>;
107 };
108};
109
8c4892a6
UH
110&mmcif {
111 pinctrl-0 = <&mmc_pins>;
112 pinctrl-names = "default";
113
114 vmmc-supply = <&fixedregulator3v3>;
115 bus-width = <8>;
116 broken-cd;
117 status = "okay";
118};
119
120&irqpin {
121 status = "okay";
122};
123
124&tmu0 {
125 status = "okay";
126};
127
128&pfc {
129 scif0_pins: serial0 {
130 renesas,groups = "scif0_data_a", "scif0_ctrl";
131 renesas,function = "scif0";
132 };
133
134 mmc_pins: mmc {
135 renesas,groups = "mmc_data8", "mmc_ctrl";
136 renesas,function = "mmc";
137 };
138
139 sdhi0_pins: sd0 {
140 renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
141 "sdhi0_cd";
142 renesas,function = "sdhi0";
143 };
144
145 hspi0_pins: hspi0 {
146 renesas,groups = "hspi0_a";
147 renesas,function = "hspi0";
148 };
1898fe19
UH
149
150 usb0_pins: usb0 {
151 renesas,groups = "usb0";
152 renesas,function = "usb0";
153 };
154
155 usb1_pins: usb1 {
156 renesas,groups = "usb1";
157 renesas,function = "usb1";
158 };
159
160 vin0_pins: vin0 {
161 renesas,groups = "vin0_data8", "vin0_clk";
162 renesas,function = "vin0";
163 };
164
165 vin1_pins: vin1 {
166 renesas,groups = "vin1_data8", "vin1_clk";
167 renesas,function = "vin1";
168 };
8c4892a6
UH
169};
170
171&sdhi0 {
172 pinctrl-0 = <&sdhi0_pins>;
173 pinctrl-names = "default";
174
175 vmmc-supply = <&fixedregulator3v3>;
176 bus-width = <4>;
177 status = "okay";
178 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
179};
180
181&hspi0 {
182 pinctrl-0 = <&hspi0_pins>;
183 pinctrl-names = "default";
184 status = "okay";
185
186 flash: flash@0 {
187 #address-cells = <1>;
188 #size-cells = <1>;
9cc78570 189 compatible = "spansion,s25fl008k", "jedec,spi-nor";
8c4892a6
UH
190 reg = <0>;
191 spi-max-frequency = <104000000>;
192 m25p,fast-read;
193
194 partition@0 {
195 label = "data(spi)";
196 reg = <0x00000000 0x00100000>;
197 };
198 };
199};
200
201&scif0 {
202 pinctrl-0 = <&scif0_pins>;
203 pinctrl-names = "default";
204
205 status = "okay";
53e42c29 206};
This page took 0.149776 seconds and 5 git commands to generate.