Commit | Line | Data |
---|---|---|
3cc828fd MD |
1 | /* |
2 | * Device Tree Source for the Lager board | |
3 | * | |
da4ea951 SS |
4 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
5 | * Copyright (C) 2014 Cogent Embedded, Inc. | |
3cc828fd MD |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public License | |
8 | * version 2. This program is licensed "as is" without any warranty of any | |
9 | * kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
31c46cbf | 13 | #include "r8a7790.dtsi" |
39fa511b | 14 | #include <dt-bindings/gpio/gpio.h> |
f7dcd382 | 15 | #include <dt-bindings/input/input.h> |
3cc828fd MD |
16 | |
17 | / { | |
18 | model = "Lager"; | |
19 | compatible = "renesas,lager", "renesas,r8a7790"; | |
20 | ||
4e9c4877 LP |
21 | aliases { |
22 | serial6 = &scif0; | |
23 | serial7 = &scif1; | |
24 | }; | |
25 | ||
3cc828fd | 26 | chosen { |
dcbbbaf2 | 27 | bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
cf855816 | 28 | stdout-path = &scifa0; |
3cc828fd MD |
29 | }; |
30 | ||
31 | memory@40000000 { | |
32 | device_type = "memory"; | |
7b16c61a | 33 | reg = <0 0x40000000 0 0x40000000>; |
3cc828fd MD |
34 | }; |
35 | ||
126f998e | 36 | memory@140000000 { |
62bc32a2 | 37 | device_type = "memory"; |
7b16c61a | 38 | reg = <1 0x40000000 0 0xc0000000>; |
62bc32a2 MD |
39 | }; |
40 | ||
3cc828fd MD |
41 | lbsc { |
42 | #address-cells = <1>; | |
43 | #size-cells = <1>; | |
44 | }; | |
39fa511b | 45 | |
f7dcd382 MD |
46 | gpio_keys { |
47 | compatible = "gpio-keys"; | |
48 | ||
49 | button@1 { | |
50 | linux,code = <KEY_1>; | |
51 | label = "SW2-1"; | |
52 | gpio-key,wakeup; | |
53 | debounce-interval = <20>; | |
54 | gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; | |
55 | }; | |
56 | button@2 { | |
57 | linux,code = <KEY_2>; | |
58 | label = "SW2-2"; | |
59 | gpio-key,wakeup; | |
60 | debounce-interval = <20>; | |
61 | gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; | |
62 | }; | |
63 | button@3 { | |
64 | linux,code = <KEY_3>; | |
65 | label = "SW2-3"; | |
66 | gpio-key,wakeup; | |
67 | debounce-interval = <20>; | |
68 | gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; | |
69 | }; | |
70 | button@4 { | |
71 | linux,code = <KEY_4>; | |
72 | label = "SW2-4"; | |
73 | gpio-key,wakeup; | |
74 | debounce-interval = <20>; | |
75 | gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; | |
76 | }; | |
77 | }; | |
78 | ||
39fa511b LP |
79 | leds { |
80 | compatible = "gpio-leds"; | |
81 | led6 { | |
82 | gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; | |
83 | }; | |
84 | led7 { | |
85 | gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; | |
86 | }; | |
87 | led8 { | |
88 | gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; | |
89 | }; | |
90 | }; | |
91 | ||
92 | fixedregulator3v3: fixedregulator@0 { | |
93 | compatible = "regulator-fixed"; | |
94 | regulator-name = "fixed-3.3V"; | |
95 | regulator-min-microvolt = <3300000>; | |
96 | regulator-max-microvolt = <3300000>; | |
97 | regulator-boot-on; | |
98 | regulator-always-on; | |
99 | }; | |
c6119944 KM |
100 | |
101 | vcc_sdhi0: regulator@1 { | |
102 | compatible = "regulator-fixed"; | |
103 | ||
104 | regulator-name = "SDHI0 Vcc"; | |
105 | regulator-min-microvolt = <3300000>; | |
106 | regulator-max-microvolt = <3300000>; | |
107 | ||
108 | gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>; | |
109 | enable-active-high; | |
110 | }; | |
111 | ||
112 | vccq_sdhi0: regulator@2 { | |
113 | compatible = "regulator-gpio"; | |
114 | ||
115 | regulator-name = "SDHI0 VccQ"; | |
116 | regulator-min-microvolt = <1800000>; | |
117 | regulator-max-microvolt = <3300000>; | |
118 | ||
119 | gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; | |
120 | gpios-states = <1>; | |
121 | states = <3300000 1 | |
122 | 1800000 0>; | |
123 | }; | |
124 | ||
125 | vcc_sdhi2: regulator@3 { | |
126 | compatible = "regulator-fixed"; | |
127 | ||
128 | regulator-name = "SDHI2 Vcc"; | |
129 | regulator-min-microvolt = <3300000>; | |
130 | regulator-max-microvolt = <3300000>; | |
131 | ||
132 | gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>; | |
133 | enable-active-high; | |
134 | }; | |
135 | ||
136 | vccq_sdhi2: regulator@4 { | |
137 | compatible = "regulator-gpio"; | |
138 | ||
139 | regulator-name = "SDHI2 VccQ"; | |
140 | regulator-min-microvolt = <1800000>; | |
141 | regulator-max-microvolt = <3300000>; | |
142 | ||
143 | gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; | |
144 | gpios-states = <1>; | |
145 | states = <3300000 1 | |
146 | 1800000 0>; | |
147 | }; | |
39fa511b LP |
148 | }; |
149 | ||
62e43056 LP |
150 | &extal_clk { |
151 | clock-frequency = <20000000>; | |
152 | }; | |
153 | ||
39fa511b | 154 | &pfc { |
4e9c4877 | 155 | pinctrl-0 = <&du_pins>; |
39fa511b LP |
156 | pinctrl-names = "default"; |
157 | ||
3024f507 LP |
158 | du_pins: du { |
159 | renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0"; | |
160 | renesas,function = "du"; | |
161 | }; | |
162 | ||
39fa511b LP |
163 | scif0_pins: serial0 { |
164 | renesas,groups = "scif0_data"; | |
165 | renesas,function = "scif0"; | |
166 | }; | |
167 | ||
da4ea951 SS |
168 | ether_pins: ether { |
169 | renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; | |
170 | renesas,function = "eth"; | |
171 | }; | |
172 | ||
173 | phy1_pins: phy1 { | |
174 | renesas,groups = "intc_irq0"; | |
175 | renesas,function = "intc"; | |
176 | }; | |
177 | ||
39fa511b LP |
178 | scif1_pins: serial1 { |
179 | renesas,groups = "scif1_data"; | |
180 | renesas,function = "scif1"; | |
181 | }; | |
182 | ||
c6119944 | 183 | sdhi0_pins: sd0 { |
b08eed0c | 184 | renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; |
c6119944 KM |
185 | renesas,function = "sdhi0"; |
186 | }; | |
187 | ||
188 | sdhi2_pins: sd2 { | |
b08eed0c | 189 | renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; |
c6119944 KM |
190 | renesas,function = "sdhi2"; |
191 | }; | |
192 | ||
39fa511b LP |
193 | mmc1_pins: mmc1 { |
194 | renesas,groups = "mmc1_data8", "mmc1_ctrl"; | |
195 | renesas,function = "mmc1"; | |
196 | }; | |
9fe7c4f8 | 197 | |
fad6d45c | 198 | qspi_pins: spi0 { |
9fe7c4f8 GU |
199 | renesas,groups = "qspi_ctrl", "qspi_data4"; |
200 | renesas,function = "qspi"; | |
201 | }; | |
b0403b91 GU |
202 | |
203 | msiof1_pins: spi2 { | |
204 | renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx", | |
205 | "msiof1_tx"; | |
206 | renesas,function = "msiof1"; | |
207 | }; | |
05f72e03 | 208 | |
cb9a2b12 WS |
209 | iic1_pins: iic1 { |
210 | renesas,groups = "iic1"; | |
211 | renesas,function = "iic1"; | |
d90bf60c SH |
212 | }; |
213 | ||
cb9a2b12 WS |
214 | iic2_pins: iic2 { |
215 | renesas,groups = "iic2"; | |
216 | renesas,function = "iic2"; | |
d90bf60c SH |
217 | }; |
218 | ||
5179ffd0 KN |
219 | iic3_pins: iic3 { |
220 | renesas,groups = "iic3"; | |
221 | renesas,function = "iic3"; | |
05f72e03 | 222 | }; |
d8584660 BD |
223 | |
224 | usb0_pins: usb0 { | |
225 | renesas,groups = "usb0"; | |
226 | renesas,function = "usb0"; | |
227 | }; | |
228 | ||
229 | usb1_pins: usb1 { | |
230 | renesas,groups = "usb1"; | |
231 | renesas,function = "usb1"; | |
232 | }; | |
233 | ||
234 | usb2_pins: usb2 { | |
235 | renesas,groups = "usb2"; | |
236 | renesas,function = "usb2"; | |
237 | }; | |
d594c977 BD |
238 | |
239 | vin1_pins: vin { | |
240 | renesas,groups = "vin1_data8", "vin1_clk"; | |
241 | renesas,function = "vin1"; | |
242 | }; | |
39fa511b LP |
243 | }; |
244 | ||
da4ea951 SS |
245 | ðer { |
246 | pinctrl-0 = <ðer_pins &phy1_pins>; | |
247 | pinctrl-names = "default"; | |
248 | ||
249 | phy-handle = <&phy1>; | |
250 | renesas,ether-link-active-low; | |
251 | status = "ok"; | |
252 | ||
253 | phy1: ethernet-phy@1 { | |
254 | reg = <1>; | |
255 | interrupt-parent = <&irqc0>; | |
256 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; | |
1c47a6aa | 257 | micrel,led-mode = <1>; |
da4ea951 SS |
258 | }; |
259 | }; | |
260 | ||
247fd5ec LP |
261 | &cmt0 { |
262 | status = "ok"; | |
263 | }; | |
264 | ||
39fa511b LP |
265 | &mmcif1 { |
266 | pinctrl-0 = <&mmc1_pins>; | |
267 | pinctrl-names = "default"; | |
268 | ||
269 | vmmc-supply = <&fixedregulator3v3>; | |
270 | bus-width = <8>; | |
271 | non-removable; | |
272 | status = "okay"; | |
3cc828fd | 273 | }; |
c6181b9f VB |
274 | |
275 | &sata1 { | |
276 | status = "okay"; | |
277 | }; | |
9fe7c4f8 | 278 | |
fad6d45c | 279 | &qspi { |
9fe7c4f8 GU |
280 | pinctrl-0 = <&qspi_pins>; |
281 | pinctrl-names = "default"; | |
282 | ||
283 | status = "okay"; | |
284 | ||
285 | flash: flash@0 { | |
286 | #address-cells = <1>; | |
287 | #size-cells = <1>; | |
288 | compatible = "spansion,s25fl512s"; | |
289 | reg = <0>; | |
290 | spi-max-frequency = <30000000>; | |
9909d2cb GU |
291 | spi-tx-bus-width = <4>; |
292 | spi-rx-bus-width = <4>; | |
9fe7c4f8 GU |
293 | m25p,fast-read; |
294 | ||
295 | partition@0 { | |
296 | label = "loader"; | |
297 | reg = <0x00000000 0x00040000>; | |
298 | read-only; | |
299 | }; | |
300 | partition@40000 { | |
301 | label = "user"; | |
302 | reg = <0x00040000 0x00400000>; | |
303 | read-only; | |
304 | }; | |
305 | partition@440000 { | |
306 | label = "flash"; | |
307 | reg = <0x00440000 0x03bc0000>; | |
308 | }; | |
309 | }; | |
310 | }; | |
c6119944 | 311 | |
4e9c4877 LP |
312 | &scif0 { |
313 | pinctrl-0 = <&scif0_pins>; | |
314 | pinctrl-names = "default"; | |
315 | ||
316 | status = "okay"; | |
317 | }; | |
318 | ||
319 | &scif1 { | |
320 | pinctrl-0 = <&scif1_pins>; | |
321 | pinctrl-names = "default"; | |
322 | ||
323 | status = "okay"; | |
324 | }; | |
325 | ||
b0403b91 GU |
326 | &msiof1 { |
327 | pinctrl-0 = <&msiof1_pins>; | |
328 | pinctrl-names = "default"; | |
329 | ||
330 | status = "okay"; | |
331 | ||
332 | pmic: pmic@0 { | |
333 | compatible = "renesas,r2a11302ft"; | |
334 | reg = <0>; | |
335 | spi-max-frequency = <6000000>; | |
336 | spi-cpol; | |
337 | spi-cpha; | |
338 | }; | |
b0403b91 GU |
339 | }; |
340 | ||
c6119944 KM |
341 | &sdhi0 { |
342 | pinctrl-0 = <&sdhi0_pins>; | |
343 | pinctrl-names = "default"; | |
344 | ||
345 | vmmc-supply = <&vcc_sdhi0>; | |
346 | vqmmc-supply = <&vccq_sdhi0>; | |
347 | cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; | |
348 | status = "okay"; | |
349 | }; | |
350 | ||
351 | &sdhi2 { | |
352 | pinctrl-0 = <&sdhi2_pins>; | |
353 | pinctrl-names = "default"; | |
354 | ||
355 | vmmc-supply = <&vcc_sdhi2>; | |
356 | vqmmc-supply = <&vccq_sdhi2>; | |
357 | cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; | |
358 | status = "okay"; | |
359 | }; | |
05f72e03 | 360 | |
b989e138 BC |
361 | &cpu0 { |
362 | cpu0-supply = <&vdd_dvfs>; | |
363 | }; | |
e489c2a9 | 364 | |
cb9a2b12 | 365 | &iic0 { |
e489c2a9 BD |
366 | status = "ok"; |
367 | }; | |
368 | ||
cb9a2b12 | 369 | &iic1 { |
e489c2a9 | 370 | status = "ok"; |
cb9a2b12 | 371 | pinctrl-0 = <&iic1_pins>; |
e1a2c4eb | 372 | pinctrl-names = "default"; |
e489c2a9 BD |
373 | }; |
374 | ||
cb9a2b12 | 375 | &iic2 { |
e489c2a9 | 376 | status = "ok"; |
cb9a2b12 | 377 | pinctrl-0 = <&iic2_pins>; |
e1a2c4eb | 378 | pinctrl-names = "default"; |
d594c977 BD |
379 | |
380 | composite-in@20 { | |
381 | compatible = "adi,adv7180"; | |
382 | reg = <0x20>; | |
383 | remote = <&vin1>; | |
384 | ||
385 | port { | |
386 | adv7180: endpoint { | |
387 | bus-width = <8>; | |
388 | remote-endpoint = <&vin1ep0>; | |
389 | }; | |
390 | }; | |
391 | }; | |
e489c2a9 BD |
392 | }; |
393 | ||
5179ffd0 | 394 | &iic3 { |
aca4ec44 | 395 | pinctrl-names = "default"; |
5179ffd0 | 396 | pinctrl-0 = <&iic3_pins>; |
aca4ec44 SH |
397 | status = "okay"; |
398 | ||
399 | vdd_dvfs: regulator@68 { | |
bd597f47 | 400 | compatible = "dlg,da9210"; |
aca4ec44 SH |
401 | reg = <0x68>; |
402 | ||
403 | regulator-min-microvolt = <1000000>; | |
404 | regulator-max-microvolt = <1000000>; | |
405 | regulator-boot-on; | |
406 | regulator-always-on; | |
407 | }; | |
e489c2a9 | 408 | }; |
d8584660 BD |
409 | |
410 | &pci0 { | |
411 | status = "okay"; | |
412 | pinctrl-0 = <&usb0_pins>; | |
413 | pinctrl-names = "default"; | |
414 | }; | |
415 | ||
416 | &pci1 { | |
417 | status = "okay"; | |
418 | pinctrl-0 = <&usb1_pins>; | |
419 | pinctrl-names = "default"; | |
420 | }; | |
421 | ||
422 | &pci2 { | |
423 | status = "okay"; | |
424 | pinctrl-0 = <&usb2_pins>; | |
425 | pinctrl-names = "default"; | |
426 | }; | |
d594c977 BD |
427 | |
428 | /* composite video input */ | |
429 | &vin1 { | |
430 | pinctrl-0 = <&vin1_pins>; | |
431 | pinctrl-names = "default"; | |
432 | ||
433 | status = "ok"; | |
434 | ||
435 | port { | |
436 | #address-cells = <1>; | |
437 | #size-cells = <0>; | |
438 | ||
439 | vin1ep0: endpoint { | |
440 | remote-endpoint = <&adv7180>; | |
441 | bus-width = <8>; | |
442 | }; | |
443 | }; | |
444 | }; |