ARM: shmobile: Lager memory map update
[deliverable/linux.git] / arch / arm / boot / dts / r8a7790-lager.dts
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1/*
2 * Device Tree Source for the Lager board
3 *
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4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
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6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
31c46cbf 13#include "r8a7790.dtsi"
39fa511b 14#include <dt-bindings/gpio/gpio.h>
f7dcd382 15#include <dt-bindings/input/input.h>
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16
17/ {
18 model = "Lager";
19 compatible = "renesas,lager", "renesas,r8a7790";
20
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21 aliases {
22 serial6 = &scif0;
23 serial7 = &scif1;
24 };
25
3cc828fd 26 chosen {
dcbbbaf2 27 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
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28 };
29
30 memory@40000000 {
31 device_type = "memory";
7b16c61a 32 reg = <0 0x40000000 0 0x40000000>;
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33 };
34
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35 memory@180000000 {
36 device_type = "memory";
7b16c61a 37 reg = <1 0x40000000 0 0xc0000000>;
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38 };
39
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40 lbsc {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 };
39fa511b 44
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45 gpio_keys {
46 compatible = "gpio-keys";
47
48 button@1 {
49 linux,code = <KEY_1>;
50 label = "SW2-1";
51 gpio-key,wakeup;
52 debounce-interval = <20>;
53 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
54 };
55 button@2 {
56 linux,code = <KEY_2>;
57 label = "SW2-2";
58 gpio-key,wakeup;
59 debounce-interval = <20>;
60 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
61 };
62 button@3 {
63 linux,code = <KEY_3>;
64 label = "SW2-3";
65 gpio-key,wakeup;
66 debounce-interval = <20>;
67 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
68 };
69 button@4 {
70 linux,code = <KEY_4>;
71 label = "SW2-4";
72 gpio-key,wakeup;
73 debounce-interval = <20>;
74 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
75 };
76 };
77
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78 leds {
79 compatible = "gpio-leds";
80 led6 {
81 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
82 };
83 led7 {
84 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
85 };
86 led8 {
87 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
88 };
89 };
90
91 fixedregulator3v3: fixedregulator@0 {
92 compatible = "regulator-fixed";
93 regulator-name = "fixed-3.3V";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96 regulator-boot-on;
97 regulator-always-on;
98 };
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99
100 vcc_sdhi0: regulator@1 {
101 compatible = "regulator-fixed";
102
103 regulator-name = "SDHI0 Vcc";
104 regulator-min-microvolt = <3300000>;
105 regulator-max-microvolt = <3300000>;
106
107 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
108 enable-active-high;
109 };
110
111 vccq_sdhi0: regulator@2 {
112 compatible = "regulator-gpio";
113
114 regulator-name = "SDHI0 VccQ";
115 regulator-min-microvolt = <1800000>;
116 regulator-max-microvolt = <3300000>;
117
118 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
119 gpios-states = <1>;
120 states = <3300000 1
121 1800000 0>;
122 };
123
124 vcc_sdhi2: regulator@3 {
125 compatible = "regulator-fixed";
126
127 regulator-name = "SDHI2 Vcc";
128 regulator-min-microvolt = <3300000>;
129 regulator-max-microvolt = <3300000>;
130
131 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
132 enable-active-high;
133 };
134
135 vccq_sdhi2: regulator@4 {
136 compatible = "regulator-gpio";
137
138 regulator-name = "SDHI2 VccQ";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <3300000>;
141
142 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
143 gpios-states = <1>;
144 states = <3300000 1
145 1800000 0>;
146 };
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147};
148
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149&extal_clk {
150 clock-frequency = <20000000>;
151};
152
39fa511b 153&pfc {
4e9c4877 154 pinctrl-0 = <&du_pins>;
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155 pinctrl-names = "default";
156
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157 du_pins: du {
158 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
159 renesas,function = "du";
160 };
161
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162 scif0_pins: serial0 {
163 renesas,groups = "scif0_data";
164 renesas,function = "scif0";
165 };
166
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167 ether_pins: ether {
168 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
169 renesas,function = "eth";
170 };
171
172 phy1_pins: phy1 {
173 renesas,groups = "intc_irq0";
174 renesas,function = "intc";
175 };
176
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177 scif1_pins: serial1 {
178 renesas,groups = "scif1_data";
179 renesas,function = "scif1";
180 };
181
c6119944 182 sdhi0_pins: sd0 {
b08eed0c 183 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
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184 renesas,function = "sdhi0";
185 };
186
187 sdhi2_pins: sd2 {
b08eed0c 188 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
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189 renesas,function = "sdhi2";
190 };
191
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192 mmc1_pins: mmc1 {
193 renesas,groups = "mmc1_data8", "mmc1_ctrl";
194 renesas,function = "mmc1";
195 };
9fe7c4f8 196
fad6d45c 197 qspi_pins: spi0 {
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198 renesas,groups = "qspi_ctrl", "qspi_data4";
199 renesas,function = "qspi";
200 };
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201
202 msiof1_pins: spi2 {
203 renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
204 "msiof1_tx";
205 renesas,function = "msiof1";
206 };
05f72e03 207
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208 i2c1_pins: i2c1 {
209 renesas,groups = "i2c1";
210 renesas,function = "i2c1";
211 };
212
213 i2c2_pins: i2c2 {
214 renesas,groups = "i2c2";
215 renesas,function = "i2c2";
216 };
217
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218 i2c3_pins: i2c3 {
219 renesas,groups = "i2c3";
220 renesas,function = "i2c3";
221 };
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222};
223
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224&ether {
225 pinctrl-0 = <&ether_pins &phy1_pins>;
226 pinctrl-names = "default";
227
228 phy-handle = <&phy1>;
229 renesas,ether-link-active-low;
230 status = "ok";
231
232 phy1: ethernet-phy@1 {
233 reg = <1>;
234 interrupt-parent = <&irqc0>;
235 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1c47a6aa 236 micrel,led-mode = <1>;
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237 };
238};
239
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240&mmcif1 {
241 pinctrl-0 = <&mmc1_pins>;
242 pinctrl-names = "default";
243
244 vmmc-supply = <&fixedregulator3v3>;
245 bus-width = <8>;
246 non-removable;
247 status = "okay";
3cc828fd 248};
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249
250&sata1 {
251 status = "okay";
252};
9fe7c4f8 253
fad6d45c 254&qspi {
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255 pinctrl-0 = <&qspi_pins>;
256 pinctrl-names = "default";
257
258 status = "okay";
259
260 flash: flash@0 {
261 #address-cells = <1>;
262 #size-cells = <1>;
263 compatible = "spansion,s25fl512s";
264 reg = <0>;
265 spi-max-frequency = <30000000>;
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266 spi-tx-bus-width = <4>;
267 spi-rx-bus-width = <4>;
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268 m25p,fast-read;
269
270 partition@0 {
271 label = "loader";
272 reg = <0x00000000 0x00040000>;
273 read-only;
274 };
275 partition@40000 {
276 label = "user";
277 reg = <0x00040000 0x00400000>;
278 read-only;
279 };
280 partition@440000 {
281 label = "flash";
282 reg = <0x00440000 0x03bc0000>;
283 };
284 };
285};
c6119944 286
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287&scif0 {
288 pinctrl-0 = <&scif0_pins>;
289 pinctrl-names = "default";
290
291 status = "okay";
292};
293
294&scif1 {
295 pinctrl-0 = <&scif1_pins>;
296 pinctrl-names = "default";
297
298 status = "okay";
299};
300
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301&msiof1 {
302 pinctrl-0 = <&msiof1_pins>;
303 pinctrl-names = "default";
304
305 status = "okay";
306
307 pmic: pmic@0 {
308 compatible = "renesas,r2a11302ft";
309 reg = <0>;
310 spi-max-frequency = <6000000>;
311 spi-cpol;
312 spi-cpha;
313 };
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314};
315
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316&sdhi0 {
317 pinctrl-0 = <&sdhi0_pins>;
318 pinctrl-names = "default";
319
320 vmmc-supply = <&vcc_sdhi0>;
321 vqmmc-supply = <&vccq_sdhi0>;
322 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
323 status = "okay";
324};
325
326&sdhi2 {
327 pinctrl-0 = <&sdhi2_pins>;
328 pinctrl-names = "default";
329
330 vmmc-supply = <&vcc_sdhi2>;
331 vqmmc-supply = <&vccq_sdhi2>;
332 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
333 status = "okay";
334};
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335
336&i2c3 {
337 pinctrl-names = "default";
338 pinctrl-0 = <&i2c3_pins>;
339 status = "okay";
340
341 vdd_dvfs: regulator@68 {
342 compatible = "diasemi,da9210";
343 reg = <0x68>;
344
345 regulator-min-microvolt = <1000000>;
346 regulator-max-microvolt = <1000000>;
347 regulator-boot-on;
348 regulator-always-on;
349 };
350};
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351
352&cpu0 {
353 cpu0-supply = <&vdd_dvfs>;
354};
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355
356&i2c0 {
357 status = "ok";
358};
359
360&i2c1 {
361 status = "ok";
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362 pinctrl-0 = <&i2c1_pins>;
363 pinctrl-names = "default";
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364};
365
366&i2c2 {
367 status = "ok";
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368 pinctrl-0 = <&i2c2_pins>;
369 pinctrl-names = "default";
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370};
371
372&i2c3 {
373 status = "ok";
374};
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