Commit | Line | Data |
---|---|---|
3cc828fd MD |
1 | /* |
2 | * Device Tree Source for the Lager board | |
3 | * | |
da4ea951 SS |
4 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
5 | * Copyright (C) 2014 Cogent Embedded, Inc. | |
3cc828fd MD |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public License | |
8 | * version 2. This program is licensed "as is" without any warranty of any | |
9 | * kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
31c46cbf | 13 | #include "r8a7790.dtsi" |
39fa511b | 14 | #include <dt-bindings/gpio/gpio.h> |
3cc828fd MD |
15 | |
16 | / { | |
17 | model = "Lager"; | |
18 | compatible = "renesas,lager", "renesas,r8a7790"; | |
19 | ||
20 | chosen { | |
dcbbbaf2 | 21 | bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
3cc828fd MD |
22 | }; |
23 | ||
24 | memory@40000000 { | |
25 | device_type = "memory"; | |
26 | reg = <0 0x40000000 0 0x80000000>; | |
27 | }; | |
28 | ||
62bc32a2 MD |
29 | memory@180000000 { |
30 | device_type = "memory"; | |
31 | reg = <1 0x80000000 0 0x80000000>; | |
32 | }; | |
33 | ||
3cc828fd MD |
34 | lbsc { |
35 | #address-cells = <1>; | |
36 | #size-cells = <1>; | |
37 | }; | |
39fa511b LP |
38 | |
39 | leds { | |
40 | compatible = "gpio-leds"; | |
41 | led6 { | |
42 | gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; | |
43 | }; | |
44 | led7 { | |
45 | gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; | |
46 | }; | |
47 | led8 { | |
48 | gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; | |
49 | }; | |
50 | }; | |
51 | ||
52 | fixedregulator3v3: fixedregulator@0 { | |
53 | compatible = "regulator-fixed"; | |
54 | regulator-name = "fixed-3.3V"; | |
55 | regulator-min-microvolt = <3300000>; | |
56 | regulator-max-microvolt = <3300000>; | |
57 | regulator-boot-on; | |
58 | regulator-always-on; | |
59 | }; | |
c6119944 KM |
60 | |
61 | vcc_sdhi0: regulator@1 { | |
62 | compatible = "regulator-fixed"; | |
63 | ||
64 | regulator-name = "SDHI0 Vcc"; | |
65 | regulator-min-microvolt = <3300000>; | |
66 | regulator-max-microvolt = <3300000>; | |
67 | ||
68 | gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>; | |
69 | enable-active-high; | |
70 | }; | |
71 | ||
72 | vccq_sdhi0: regulator@2 { | |
73 | compatible = "regulator-gpio"; | |
74 | ||
75 | regulator-name = "SDHI0 VccQ"; | |
76 | regulator-min-microvolt = <1800000>; | |
77 | regulator-max-microvolt = <3300000>; | |
78 | ||
79 | gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; | |
80 | gpios-states = <1>; | |
81 | states = <3300000 1 | |
82 | 1800000 0>; | |
83 | }; | |
84 | ||
85 | vcc_sdhi2: regulator@3 { | |
86 | compatible = "regulator-fixed"; | |
87 | ||
88 | regulator-name = "SDHI2 Vcc"; | |
89 | regulator-min-microvolt = <3300000>; | |
90 | regulator-max-microvolt = <3300000>; | |
91 | ||
92 | gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>; | |
93 | enable-active-high; | |
94 | }; | |
95 | ||
96 | vccq_sdhi2: regulator@4 { | |
97 | compatible = "regulator-gpio"; | |
98 | ||
99 | regulator-name = "SDHI2 VccQ"; | |
100 | regulator-min-microvolt = <1800000>; | |
101 | regulator-max-microvolt = <3300000>; | |
102 | ||
103 | gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; | |
104 | gpios-states = <1>; | |
105 | states = <3300000 1 | |
106 | 1800000 0>; | |
107 | }; | |
39fa511b LP |
108 | }; |
109 | ||
62e43056 LP |
110 | &extal_clk { |
111 | clock-frequency = <20000000>; | |
112 | }; | |
113 | ||
39fa511b | 114 | &pfc { |
3024f507 | 115 | pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>; |
39fa511b LP |
116 | pinctrl-names = "default"; |
117 | ||
3024f507 LP |
118 | du_pins: du { |
119 | renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0"; | |
120 | renesas,function = "du"; | |
121 | }; | |
122 | ||
39fa511b LP |
123 | scif0_pins: serial0 { |
124 | renesas,groups = "scif0_data"; | |
125 | renesas,function = "scif0"; | |
126 | }; | |
127 | ||
da4ea951 SS |
128 | ether_pins: ether { |
129 | renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; | |
130 | renesas,function = "eth"; | |
131 | }; | |
132 | ||
133 | phy1_pins: phy1 { | |
134 | renesas,groups = "intc_irq0"; | |
135 | renesas,function = "intc"; | |
136 | }; | |
137 | ||
39fa511b LP |
138 | scif1_pins: serial1 { |
139 | renesas,groups = "scif1_data"; | |
140 | renesas,function = "scif1"; | |
141 | }; | |
142 | ||
c6119944 KM |
143 | sdhi0_pins: sd0 { |
144 | renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; | |
145 | renesas,function = "sdhi0"; | |
146 | }; | |
147 | ||
148 | sdhi2_pins: sd2 { | |
149 | renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; | |
150 | renesas,function = "sdhi2"; | |
151 | }; | |
152 | ||
39fa511b LP |
153 | mmc1_pins: mmc1 { |
154 | renesas,groups = "mmc1_data8", "mmc1_ctrl"; | |
155 | renesas,function = "mmc1"; | |
156 | }; | |
9fe7c4f8 GU |
157 | |
158 | qspi_pins: spi { | |
159 | renesas,groups = "qspi_ctrl", "qspi_data4"; | |
160 | renesas,function = "qspi"; | |
161 | }; | |
39fa511b LP |
162 | }; |
163 | ||
da4ea951 SS |
164 | ðer { |
165 | pinctrl-0 = <ðer_pins &phy1_pins>; | |
166 | pinctrl-names = "default"; | |
167 | ||
168 | phy-handle = <&phy1>; | |
169 | renesas,ether-link-active-low; | |
170 | status = "ok"; | |
171 | ||
172 | phy1: ethernet-phy@1 { | |
173 | reg = <1>; | |
174 | interrupt-parent = <&irqc0>; | |
175 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; | |
176 | }; | |
177 | }; | |
178 | ||
39fa511b LP |
179 | &mmcif1 { |
180 | pinctrl-0 = <&mmc1_pins>; | |
181 | pinctrl-names = "default"; | |
182 | ||
183 | vmmc-supply = <&fixedregulator3v3>; | |
184 | bus-width = <8>; | |
185 | non-removable; | |
186 | status = "okay"; | |
3cc828fd | 187 | }; |
c6181b9f VB |
188 | |
189 | &sata1 { | |
190 | status = "okay"; | |
191 | }; | |
9fe7c4f8 GU |
192 | |
193 | &spi { | |
194 | pinctrl-0 = <&qspi_pins>; | |
195 | pinctrl-names = "default"; | |
196 | ||
197 | status = "okay"; | |
198 | ||
199 | flash: flash@0 { | |
200 | #address-cells = <1>; | |
201 | #size-cells = <1>; | |
202 | compatible = "spansion,s25fl512s"; | |
203 | reg = <0>; | |
204 | spi-max-frequency = <30000000>; | |
205 | m25p,fast-read; | |
206 | ||
207 | partition@0 { | |
208 | label = "loader"; | |
209 | reg = <0x00000000 0x00040000>; | |
210 | read-only; | |
211 | }; | |
212 | partition@40000 { | |
213 | label = "user"; | |
214 | reg = <0x00040000 0x00400000>; | |
215 | read-only; | |
216 | }; | |
217 | partition@440000 { | |
218 | label = "flash"; | |
219 | reg = <0x00440000 0x03bc0000>; | |
220 | }; | |
221 | }; | |
222 | }; | |
c6119944 KM |
223 | |
224 | &sdhi0 { | |
225 | pinctrl-0 = <&sdhi0_pins>; | |
226 | pinctrl-names = "default"; | |
227 | ||
228 | vmmc-supply = <&vcc_sdhi0>; | |
229 | vqmmc-supply = <&vccq_sdhi0>; | |
230 | cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; | |
231 | status = "okay"; | |
232 | }; | |
233 | ||
234 | &sdhi2 { | |
235 | pinctrl-0 = <&sdhi2_pins>; | |
236 | pinctrl-names = "default"; | |
237 | ||
238 | vmmc-supply = <&vcc_sdhi2>; | |
239 | vqmmc-supply = <&vccq_sdhi2>; | |
240 | cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; | |
241 | status = "okay"; | |
242 | }; |