projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0468b2d6 MD |
1 | /* |
| 2 | * Device Tree Source for the r8a7790 SoC | |
| 3 | * | |
| b621f6d4 | 4 | * Copyright (C) 2015 Renesas Electronics Corporation |
| d8913c67 SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
| 6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
| 0468b2d6 MD |
7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public License | |
| 9 | * version 2. This program is licensed "as is" without any warranty of any | |
| 10 | * kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| 22a1f595 | 13 | #include <dt-bindings/clock/r8a7790-clock.h> |
| 5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 15 | #include <dt-bindings/interrupt-controller/irq.h> | |
| 16 | ||
| 0468b2d6 MD |
17 | / { |
| 18 | compatible = "renesas,r8a7790"; | |
| 19 | interrupt-parent = <&gic>; | |
| 8585deb1 TY |
20 | #address-cells = <2>; |
| 21 | #size-cells = <2>; | |
| 0468b2d6 | 22 | |
| 6b1d7c68 WS |
23 | aliases { |
| 24 | i2c0 = &i2c0; | |
| 25 | i2c1 = &i2c1; | |
| 26 | i2c2 = &i2c2; | |
| 27 | i2c3 = &i2c3; | |
| 05f39916 WS |
28 | i2c4 = &iic0; |
| 29 | i2c5 = &iic1; | |
| 30 | i2c6 = &iic2; | |
| 31 | i2c7 = &iic3; | |
| fad6d45c | 32 | spi0 = &qspi; |
| ae8a6146 GU |
33 | spi1 = &msiof0; |
| 34 | spi2 = &msiof1; | |
| 35 | spi3 = &msiof2; | |
| 36 | spi4 = &msiof3; | |
| 9f685bfc BD |
37 | vin0 = &vin0; |
| 38 | vin1 = &vin1; | |
| 39 | vin2 = &vin2; | |
| 40 | vin3 = &vin3; | |
| 6b1d7c68 WS |
41 | }; |
| 42 | ||
| 0468b2d6 MD |
43 | cpus { |
| 44 | #address-cells = <1>; | |
| 45 | #size-cells = <0>; | |
| 46 | ||
| 47 | cpu0: cpu@0 { | |
| 48 | device_type = "cpu"; | |
| 49 | compatible = "arm,cortex-a15"; | |
| 50 | reg = <0>; | |
| 51 | clock-frequency = <1300000000>; | |
| b989e138 BC |
52 | voltage-tolerance = <1>; /* 1% */ |
| 53 | clocks = <&cpg_clocks R8A7790_CLK_Z>; | |
| 54 | clock-latency = <300000>; /* 300 us */ | |
| 55 | ||
| 56 | /* kHz - uV - OPPs unknown yet */ | |
| 57 | operating-points = <1400000 1000000>, | |
| 58 | <1225000 1000000>, | |
| 59 | <1050000 1000000>, | |
| 60 | < 875000 1000000>, | |
| 61 | < 700000 1000000>, | |
| 62 | < 350000 1000000>; | |
| 0468b2d6 | 63 | }; |
| c1f95979 MD |
64 | |
| 65 | cpu1: cpu@1 { | |
| 66 | device_type = "cpu"; | |
| 67 | compatible = "arm,cortex-a15"; | |
| 68 | reg = <1>; | |
| 69 | clock-frequency = <1300000000>; | |
| 70 | }; | |
| 71 | ||
| 72 | cpu2: cpu@2 { | |
| 73 | device_type = "cpu"; | |
| 74 | compatible = "arm,cortex-a15"; | |
| 75 | reg = <2>; | |
| 76 | clock-frequency = <1300000000>; | |
| 77 | }; | |
| 78 | ||
| 79 | cpu3: cpu@3 { | |
| 80 | device_type = "cpu"; | |
| 81 | compatible = "arm,cortex-a15"; | |
| 82 | reg = <3>; | |
| 83 | clock-frequency = <1300000000>; | |
| 84 | }; | |
| 2007e74c MD |
85 | |
| 86 | cpu4: cpu@4 { | |
| 87 | device_type = "cpu"; | |
| 88 | compatible = "arm,cortex-a7"; | |
| 89 | reg = <0x100>; | |
| 90 | clock-frequency = <780000000>; | |
| 91 | }; | |
| 92 | ||
| 93 | cpu5: cpu@5 { | |
| 94 | device_type = "cpu"; | |
| 95 | compatible = "arm,cortex-a7"; | |
| 96 | reg = <0x101>; | |
| 97 | clock-frequency = <780000000>; | |
| 98 | }; | |
| 99 | ||
| 100 | cpu6: cpu@6 { | |
| 101 | device_type = "cpu"; | |
| 102 | compatible = "arm,cortex-a7"; | |
| 103 | reg = <0x102>; | |
| 104 | clock-frequency = <780000000>; | |
| 105 | }; | |
| 106 | ||
| 107 | cpu7: cpu@7 { | |
| 108 | device_type = "cpu"; | |
| 109 | compatible = "arm,cortex-a7"; | |
| 110 | reg = <0x103>; | |
| 111 | clock-frequency = <780000000>; | |
| 112 | }; | |
| 0468b2d6 MD |
113 | }; |
| 114 | ||
| 115 | gic: interrupt-controller@f1001000 { | |
| 116 | compatible = "arm,cortex-a15-gic"; | |
| 117 | #interrupt-cells = <3>; | |
| 118 | #address-cells = <0>; | |
| 119 | interrupt-controller; | |
| 8585deb1 TY |
120 | reg = <0 0xf1001000 0 0x1000>, |
| 121 | <0 0xf1002000 0 0x1000>, | |
| 122 | <0 0xf1004000 0 0x2000>, | |
| 123 | <0 0xf1006000 0 0x2000>; | |
| 5f75e73c | 124 | interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| 0468b2d6 MD |
125 | }; |
| 126 | ||
| 23de2278 | 127 | gpio0: gpio@e6050000 { |
| f98e10c8 | 128 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 129 | reg = <0 0xe6050000 0 0x50>; |
| 5f75e73c | 130 | interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
131 | #gpio-cells = <2>; |
| 132 | gpio-controller; | |
| 133 | gpio-ranges = <&pfc 0 0 32>; | |
| 134 | #interrupt-cells = <2>; | |
| 135 | interrupt-controller; | |
| 81f6883f | 136 | clocks = <&mstp9_clks R8A7790_CLK_GPIO0>; |
| f98e10c8 LP |
137 | }; |
| 138 | ||
| 23de2278 | 139 | gpio1: gpio@e6051000 { |
| f98e10c8 | 140 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 141 | reg = <0 0xe6051000 0 0x50>; |
| 5f75e73c | 142 | interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
143 | #gpio-cells = <2>; |
| 144 | gpio-controller; | |
| 145 | gpio-ranges = <&pfc 0 32 32>; | |
| 146 | #interrupt-cells = <2>; | |
| 147 | interrupt-controller; | |
| 81f6883f | 148 | clocks = <&mstp9_clks R8A7790_CLK_GPIO1>; |
| f98e10c8 LP |
149 | }; |
| 150 | ||
| 23de2278 | 151 | gpio2: gpio@e6052000 { |
| f98e10c8 | 152 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 153 | reg = <0 0xe6052000 0 0x50>; |
| 5f75e73c | 154 | interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
155 | #gpio-cells = <2>; |
| 156 | gpio-controller; | |
| 157 | gpio-ranges = <&pfc 0 64 32>; | |
| 158 | #interrupt-cells = <2>; | |
| 159 | interrupt-controller; | |
| 81f6883f | 160 | clocks = <&mstp9_clks R8A7790_CLK_GPIO2>; |
| f98e10c8 LP |
161 | }; |
| 162 | ||
| 23de2278 | 163 | gpio3: gpio@e6053000 { |
| f98e10c8 | 164 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 165 | reg = <0 0xe6053000 0 0x50>; |
| 5f75e73c | 166 | interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
167 | #gpio-cells = <2>; |
| 168 | gpio-controller; | |
| 169 | gpio-ranges = <&pfc 0 96 32>; | |
| 170 | #interrupt-cells = <2>; | |
| 171 | interrupt-controller; | |
| 81f6883f | 172 | clocks = <&mstp9_clks R8A7790_CLK_GPIO3>; |
| f98e10c8 LP |
173 | }; |
| 174 | ||
| 23de2278 | 175 | gpio4: gpio@e6054000 { |
| f98e10c8 | 176 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 177 | reg = <0 0xe6054000 0 0x50>; |
| 5f75e73c | 178 | interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
179 | #gpio-cells = <2>; |
| 180 | gpio-controller; | |
| 181 | gpio-ranges = <&pfc 0 128 32>; | |
| 182 | #interrupt-cells = <2>; | |
| 183 | interrupt-controller; | |
| 81f6883f | 184 | clocks = <&mstp9_clks R8A7790_CLK_GPIO4>; |
| f98e10c8 LP |
185 | }; |
| 186 | ||
| 23de2278 | 187 | gpio5: gpio@e6055000 { |
| f98e10c8 | 188 | compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; |
| 23de2278 | 189 | reg = <0 0xe6055000 0 0x50>; |
| 5f75e73c | 190 | interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; |
| f98e10c8 LP |
191 | #gpio-cells = <2>; |
| 192 | gpio-controller; | |
| 193 | gpio-ranges = <&pfc 0 160 32>; | |
| 194 | #interrupt-cells = <2>; | |
| 195 | interrupt-controller; | |
| 81f6883f | 196 | clocks = <&mstp9_clks R8A7790_CLK_GPIO5>; |
| f98e10c8 LP |
197 | }; |
| 198 | ||
| 03e2f56b MD |
199 | thermal@e61f0000 { |
| 200 | compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal"; | |
| 201 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; | |
| 03e2f56b | 202 | interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; |
| d3a439db | 203 | clocks = <&mstp5_clks R8A7790_CLK_THERMAL>; |
| 03e2f56b MD |
204 | }; |
| 205 | ||
| 0468b2d6 MD |
206 | timer { |
| 207 | compatible = "arm,armv7-timer"; | |
| 5f75e73c LP |
208 | interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| 209 | <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
| 210 | <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
| 211 | <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
| 0468b2d6 | 212 | }; |
| 8f5ec0a5 | 213 | |
| 39cf6d73 | 214 | cmt0: timer@ffca0000 { |
| 37757030 | 215 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
| 39cf6d73 LP |
216 | reg = <0 0xffca0000 0 0x1004>; |
| 217 | interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, | |
| 218 | <0 143 IRQ_TYPE_LEVEL_HIGH>; | |
| 219 | clocks = <&mstp1_clks R8A7790_CLK_CMT0>; | |
| 220 | clock-names = "fck"; | |
| 221 | ||
| 222 | renesas,channels-mask = <0x60>; | |
| 223 | ||
| 224 | status = "disabled"; | |
| 225 | }; | |
| 226 | ||
| 227 | cmt1: timer@e6130000 { | |
| 37757030 | 228 | compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; |
| 39cf6d73 LP |
229 | reg = <0 0xe6130000 0 0x1004>; |
| 230 | interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, | |
| 231 | <0 121 IRQ_TYPE_LEVEL_HIGH>, | |
| 232 | <0 122 IRQ_TYPE_LEVEL_HIGH>, | |
| 233 | <0 123 IRQ_TYPE_LEVEL_HIGH>, | |
| 234 | <0 124 IRQ_TYPE_LEVEL_HIGH>, | |
| 235 | <0 125 IRQ_TYPE_LEVEL_HIGH>, | |
| 236 | <0 126 IRQ_TYPE_LEVEL_HIGH>, | |
| 237 | <0 127 IRQ_TYPE_LEVEL_HIGH>; | |
| 238 | clocks = <&mstp3_clks R8A7790_CLK_CMT1>; | |
| 239 | clock-names = "fck"; | |
| 240 | ||
| 241 | renesas,channels-mask = <0xff>; | |
| 242 | ||
| 243 | status = "disabled"; | |
| 244 | }; | |
| 245 | ||
| 8f5ec0a5 | 246 | irqc0: interrupt-controller@e61c0000 { |
| 220fc352 | 247 | compatible = "renesas,irqc-r8a7790", "renesas,irqc"; |
| 8f5ec0a5 MD |
248 | #interrupt-cells = <2>; |
| 249 | interrupt-controller; | |
| 8585deb1 | 250 | reg = <0 0xe61c0000 0 0x200>; |
| 5f75e73c LP |
251 | interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, |
| 252 | <0 1 IRQ_TYPE_LEVEL_HIGH>, | |
| 253 | <0 2 IRQ_TYPE_LEVEL_HIGH>, | |
| 254 | <0 3 IRQ_TYPE_LEVEL_HIGH>; | |
| 61624caf | 255 | clocks = <&mstp4_clks R8A7790_CLK_IRQC>; |
| 8f5ec0a5 | 256 | }; |
| 8c9b1aa4 | 257 | |
| b9fea49c LP |
258 | dmac0: dma-controller@e6700000 { |
| 259 | compatible = "renesas,rcar-dmac"; | |
| 260 | reg = <0 0xe6700000 0 0x20000>; | |
| 261 | interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH | |
| 262 | 0 200 IRQ_TYPE_LEVEL_HIGH | |
| 263 | 0 201 IRQ_TYPE_LEVEL_HIGH | |
| 264 | 0 202 IRQ_TYPE_LEVEL_HIGH | |
| 265 | 0 203 IRQ_TYPE_LEVEL_HIGH | |
| 266 | 0 204 IRQ_TYPE_LEVEL_HIGH | |
| 267 | 0 205 IRQ_TYPE_LEVEL_HIGH | |
| 268 | 0 206 IRQ_TYPE_LEVEL_HIGH | |
| 269 | 0 207 IRQ_TYPE_LEVEL_HIGH | |
| 270 | 0 208 IRQ_TYPE_LEVEL_HIGH | |
| 271 | 0 209 IRQ_TYPE_LEVEL_HIGH | |
| 272 | 0 210 IRQ_TYPE_LEVEL_HIGH | |
| 273 | 0 211 IRQ_TYPE_LEVEL_HIGH | |
| 274 | 0 212 IRQ_TYPE_LEVEL_HIGH | |
| 275 | 0 213 IRQ_TYPE_LEVEL_HIGH | |
| 276 | 0 214 IRQ_TYPE_LEVEL_HIGH>; | |
| 277 | interrupt-names = "error", | |
| 278 | "ch0", "ch1", "ch2", "ch3", | |
| 279 | "ch4", "ch5", "ch6", "ch7", | |
| 280 | "ch8", "ch9", "ch10", "ch11", | |
| 281 | "ch12", "ch13", "ch14"; | |
| 282 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>; | |
| 283 | clock-names = "fck"; | |
| 284 | #dma-cells = <1>; | |
| 285 | dma-channels = <15>; | |
| 286 | }; | |
| 287 | ||
| 288 | dmac1: dma-controller@e6720000 { | |
| 289 | compatible = "renesas,rcar-dmac"; | |
| 290 | reg = <0 0xe6720000 0 0x20000>; | |
| 291 | interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH | |
| 292 | 0 216 IRQ_TYPE_LEVEL_HIGH | |
| 293 | 0 217 IRQ_TYPE_LEVEL_HIGH | |
| 294 | 0 218 IRQ_TYPE_LEVEL_HIGH | |
| 295 | 0 219 IRQ_TYPE_LEVEL_HIGH | |
| 296 | 0 308 IRQ_TYPE_LEVEL_HIGH | |
| 297 | 0 309 IRQ_TYPE_LEVEL_HIGH | |
| 298 | 0 310 IRQ_TYPE_LEVEL_HIGH | |
| 299 | 0 311 IRQ_TYPE_LEVEL_HIGH | |
| 300 | 0 312 IRQ_TYPE_LEVEL_HIGH | |
| 301 | 0 313 IRQ_TYPE_LEVEL_HIGH | |
| 302 | 0 314 IRQ_TYPE_LEVEL_HIGH | |
| 303 | 0 315 IRQ_TYPE_LEVEL_HIGH | |
| 304 | 0 316 IRQ_TYPE_LEVEL_HIGH | |
| 305 | 0 317 IRQ_TYPE_LEVEL_HIGH | |
| 306 | 0 318 IRQ_TYPE_LEVEL_HIGH>; | |
| 307 | interrupt-names = "error", | |
| 308 | "ch0", "ch1", "ch2", "ch3", | |
| 309 | "ch4", "ch5", "ch6", "ch7", | |
| 310 | "ch8", "ch9", "ch10", "ch11", | |
| 311 | "ch12", "ch13", "ch14"; | |
| 312 | clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>; | |
| 313 | clock-names = "fck"; | |
| 314 | #dma-cells = <1>; | |
| 315 | dma-channels = <15>; | |
| 316 | }; | |
| ba3240be KM |
317 | |
| 318 | audma0: dma-controller@ec700000 { | |
| 319 | compatible = "renesas,rcar-dmac"; | |
| 320 | reg = <0 0xec700000 0 0x10000>; | |
| 321 | interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH | |
| 322 | 0 320 IRQ_TYPE_LEVEL_HIGH | |
| 323 | 0 321 IRQ_TYPE_LEVEL_HIGH | |
| 324 | 0 322 IRQ_TYPE_LEVEL_HIGH | |
| 325 | 0 323 IRQ_TYPE_LEVEL_HIGH | |
| 326 | 0 324 IRQ_TYPE_LEVEL_HIGH | |
| 327 | 0 325 IRQ_TYPE_LEVEL_HIGH | |
| 328 | 0 326 IRQ_TYPE_LEVEL_HIGH | |
| 329 | 0 327 IRQ_TYPE_LEVEL_HIGH | |
| 330 | 0 328 IRQ_TYPE_LEVEL_HIGH | |
| 331 | 0 329 IRQ_TYPE_LEVEL_HIGH | |
| 332 | 0 330 IRQ_TYPE_LEVEL_HIGH | |
| 333 | 0 331 IRQ_TYPE_LEVEL_HIGH | |
| 334 | 0 332 IRQ_TYPE_LEVEL_HIGH>; | |
| 335 | interrupt-names = "error", | |
| 336 | "ch0", "ch1", "ch2", "ch3", | |
| 337 | "ch4", "ch5", "ch6", "ch7", | |
| 338 | "ch8", "ch9", "ch10", "ch11", | |
| 339 | "ch12"; | |
| 340 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>; | |
| 341 | clock-names = "fck"; | |
| 342 | #dma-cells = <1>; | |
| 343 | dma-channels = <13>; | |
| 344 | }; | |
| 345 | ||
| 346 | audma1: dma-controller@ec720000 { | |
| 347 | compatible = "renesas,rcar-dmac"; | |
| 348 | reg = <0 0xec720000 0 0x10000>; | |
| 349 | interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH | |
| 350 | 0 333 IRQ_TYPE_LEVEL_HIGH | |
| 351 | 0 334 IRQ_TYPE_LEVEL_HIGH | |
| 352 | 0 335 IRQ_TYPE_LEVEL_HIGH | |
| 353 | 0 336 IRQ_TYPE_LEVEL_HIGH | |
| 354 | 0 337 IRQ_TYPE_LEVEL_HIGH | |
| 355 | 0 338 IRQ_TYPE_LEVEL_HIGH | |
| 356 | 0 339 IRQ_TYPE_LEVEL_HIGH | |
| 357 | 0 340 IRQ_TYPE_LEVEL_HIGH | |
| 358 | 0 341 IRQ_TYPE_LEVEL_HIGH | |
| 359 | 0 342 IRQ_TYPE_LEVEL_HIGH | |
| 360 | 0 343 IRQ_TYPE_LEVEL_HIGH | |
| 361 | 0 344 IRQ_TYPE_LEVEL_HIGH | |
| 362 | 0 345 IRQ_TYPE_LEVEL_HIGH>; | |
| 363 | interrupt-names = "error", | |
| 364 | "ch0", "ch1", "ch2", "ch3", | |
| 365 | "ch4", "ch5", "ch6", "ch7", | |
| 366 | "ch8", "ch9", "ch10", "ch11", | |
| 367 | "ch12"; | |
| 368 | clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>; | |
| 369 | clock-names = "fck"; | |
| 370 | #dma-cells = <1>; | |
| 371 | dma-channels = <13>; | |
| 372 | }; | |
| 373 | ||
| a3ff2090 YS |
374 | usb_dmac0: dma-controller@e65a0000 { |
| 375 | compatible = "renesas,usb-dmac"; | |
| 376 | reg = <0 0xe65a0000 0 0x100>; | |
| 377 | interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH | |
| 378 | 0 109 IRQ_TYPE_LEVEL_HIGH>; | |
| 379 | interrupt-names = "ch0", "ch1"; | |
| 380 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>; | |
| 381 | #dma-cells = <1>; | |
| 382 | dma-channels = <2>; | |
| 383 | }; | |
| 384 | ||
| 385 | usb_dmac1: dma-controller@e65b0000 { | |
| 386 | compatible = "renesas,usb-dmac"; | |
| 387 | reg = <0 0xe65b0000 0 0x100>; | |
| 388 | interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH | |
| 389 | 0 110 IRQ_TYPE_LEVEL_HIGH>; | |
| 390 | interrupt-names = "ch0", "ch1"; | |
| 391 | clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>; | |
| 392 | #dma-cells = <1>; | |
| 393 | dma-channels = <2>; | |
| 394 | }; | |
| 395 | ||
| edd2b9f4 GL |
396 | i2c0: i2c@e6508000 { |
| 397 | #address-cells = <1>; | |
| 398 | #size-cells = <0>; | |
| 399 | compatible = "renesas,i2c-r8a7790"; | |
| 400 | reg = <0 0xe6508000 0 0x40>; | |
| 5f75e73c | 401 | interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 402 | clocks = <&mstp9_clks R8A7790_CLK_I2C0>; |
| edd2b9f4 GL |
403 | status = "disabled"; |
| 404 | }; | |
| 405 | ||
| 406 | i2c1: i2c@e6518000 { | |
| 407 | #address-cells = <1>; | |
| 408 | #size-cells = <0>; | |
| 409 | compatible = "renesas,i2c-r8a7790"; | |
| 410 | reg = <0 0xe6518000 0 0x40>; | |
| 5f75e73c | 411 | interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 412 | clocks = <&mstp9_clks R8A7790_CLK_I2C1>; |
| edd2b9f4 GL |
413 | status = "disabled"; |
| 414 | }; | |
| 415 | ||
| 416 | i2c2: i2c@e6530000 { | |
| 417 | #address-cells = <1>; | |
| 418 | #size-cells = <0>; | |
| 419 | compatible = "renesas,i2c-r8a7790"; | |
| 420 | reg = <0 0xe6530000 0 0x40>; | |
| 5f75e73c | 421 | interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 422 | clocks = <&mstp9_clks R8A7790_CLK_I2C2>; |
| edd2b9f4 GL |
423 | status = "disabled"; |
| 424 | }; | |
| 425 | ||
| 426 | i2c3: i2c@e6540000 { | |
| 427 | #address-cells = <1>; | |
| 428 | #size-cells = <0>; | |
| 429 | compatible = "renesas,i2c-r8a7790"; | |
| 430 | reg = <0 0xe6540000 0 0x40>; | |
| 5f75e73c | 431 | interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; |
| 2450badf | 432 | clocks = <&mstp9_clks R8A7790_CLK_I2C3>; |
| edd2b9f4 GL |
433 | status = "disabled"; |
| 434 | }; | |
| 435 | ||
| 05f39916 WS |
436 | iic0: i2c@e6500000 { |
| 437 | #address-cells = <1>; | |
| 438 | #size-cells = <0>; | |
| 439 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 440 | reg = <0 0xe6500000 0 0x425>; | |
| 441 | interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; | |
| 442 | clocks = <&mstp3_clks R8A7790_CLK_IIC0>; | |
| 0d73ca41 WS |
443 | dmas = <&dmac0 0x61>, <&dmac0 0x62>; |
| 444 | dma-names = "tx", "rx"; | |
| 05f39916 WS |
445 | status = "disabled"; |
| 446 | }; | |
| 447 | ||
| 448 | iic1: i2c@e6510000 { | |
| 449 | #address-cells = <1>; | |
| 450 | #size-cells = <0>; | |
| 451 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 452 | reg = <0 0xe6510000 0 0x425>; | |
| 453 | interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; | |
| 454 | clocks = <&mstp3_clks R8A7790_CLK_IIC1>; | |
| 0d73ca41 WS |
455 | dmas = <&dmac0 0x65>, <&dmac0 0x66>; |
| 456 | dma-names = "tx", "rx"; | |
| 05f39916 WS |
457 | status = "disabled"; |
| 458 | }; | |
| 459 | ||
| 460 | iic2: i2c@e6520000 { | |
| 461 | #address-cells = <1>; | |
| 462 | #size-cells = <0>; | |
| 463 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 464 | reg = <0 0xe6520000 0 0x425>; | |
| 465 | interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; | |
| 466 | clocks = <&mstp3_clks R8A7790_CLK_IIC2>; | |
| 0d73ca41 WS |
467 | dmas = <&dmac0 0x69>, <&dmac0 0x6a>; |
| 468 | dma-names = "tx", "rx"; | |
| 05f39916 WS |
469 | status = "disabled"; |
| 470 | }; | |
| 471 | ||
| 472 | iic3: i2c@e60b0000 { | |
| 473 | #address-cells = <1>; | |
| 474 | #size-cells = <0>; | |
| 475 | compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; | |
| 476 | reg = <0 0xe60b0000 0 0x425>; | |
| 477 | interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; | |
| 478 | clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; | |
| 0d73ca41 WS |
479 | dmas = <&dmac0 0x77>, <&dmac0 0x78>; |
| 480 | dma-names = "tx", "rx"; | |
| 05f39916 WS |
481 | status = "disabled"; |
| 482 | }; | |
| 483 | ||
| 22c2b78d | 484 | mmcif0: mmc@ee200000 { |
| 063e8560 | 485 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
| 8c9b1aa4 | 486 | reg = <0 0xee200000 0 0x80>; |
| 5f75e73c | 487 | interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 488 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; |
| 108216c1 LP |
489 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; |
| 490 | dma-names = "tx", "rx"; | |
| 8c9b1aa4 GL |
491 | reg-io-width = <4>; |
| 492 | status = "disabled"; | |
| 96370057 | 493 | max-frequency = <97500000>; |
| 8c9b1aa4 GL |
494 | }; |
| 495 | ||
| b718aa44 | 496 | mmcif1: mmc@ee220000 { |
| 063e8560 | 497 | compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; |
| 8c9b1aa4 | 498 | reg = <0 0xee220000 0 0x80>; |
| 5f75e73c | 499 | interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 500 | clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; |
| 108216c1 LP |
501 | dmas = <&dmac0 0xe1>, <&dmac0 0xe2>; |
| 502 | dma-names = "tx", "rx"; | |
| 8c9b1aa4 GL |
503 | reg-io-width = <4>; |
| 504 | status = "disabled"; | |
| 96370057 | 505 | max-frequency = <97500000>; |
| 8c9b1aa4 GL |
506 | }; |
| 507 | ||
| 9694c778 LP |
508 | pfc: pfc@e6060000 { |
| 509 | compatible = "renesas,pfc-r8a7790"; | |
| 510 | reg = <0 0xe6060000 0 0x250>; | |
| 511 | }; | |
| 55689bfa | 512 | |
| b718aa44 | 513 | sdhi0: sd@ee100000 { |
| df1d0584 | 514 | compatible = "renesas,sdhi-r8a7790"; |
| 66f47ed0 | 515 | reg = <0 0xee100000 0 0x328>; |
| 5f75e73c | 516 | interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 517 | clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; |
| 941fe36b LP |
518 | dmas = <&dmac1 0xcd>, <&dmac1 0xce>; |
| 519 | dma-names = "tx", "rx"; | |
| 8c9b1aa4 GL |
520 | status = "disabled"; |
| 521 | }; | |
| 522 | ||
| b718aa44 | 523 | sdhi1: sd@ee120000 { |
| df1d0584 | 524 | compatible = "renesas,sdhi-r8a7790"; |
| 66f47ed0 | 525 | reg = <0 0xee120000 0 0x328>; |
| 5f75e73c | 526 | interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 527 | clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; |
| 941fe36b LP |
528 | dmas = <&dmac1 0xc9>, <&dmac1 0xca>; |
| 529 | dma-names = "tx", "rx"; | |
| 8c9b1aa4 GL |
530 | status = "disabled"; |
| 531 | }; | |
| 532 | ||
| b718aa44 | 533 | sdhi2: sd@ee140000 { |
| df1d0584 | 534 | compatible = "renesas,sdhi-r8a7790"; |
| 8c9b1aa4 | 535 | reg = <0 0xee140000 0 0x100>; |
| 5f75e73c | 536 | interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 537 | clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; |
| 941fe36b LP |
538 | dmas = <&dmac1 0xc1>, <&dmac1 0xc2>; |
| 539 | dma-names = "tx", "rx"; | |
| 8c9b1aa4 GL |
540 | status = "disabled"; |
| 541 | }; | |
| 542 | ||
| b718aa44 | 543 | sdhi3: sd@ee160000 { |
| df1d0584 | 544 | compatible = "renesas,sdhi-r8a7790"; |
| 8c9b1aa4 | 545 | reg = <0 0xee160000 0 0x100>; |
| 5f75e73c | 546 | interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; |
| 72197ca7 | 547 | clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; |
| 941fe36b LP |
548 | dmas = <&dmac1 0xd3>, <&dmac1 0xd4>; |
| 549 | dma-names = "tx", "rx"; | |
| 8c9b1aa4 GL |
550 | status = "disabled"; |
| 551 | }; | |
| 22a1f595 | 552 | |
| 597af20f | 553 | scifa0: serial@e6c40000 { |
| 59d2b517 | 554 | compatible = "renesas,scifa-r8a7790", "renesas,scifa"; |
| 597af20f | 555 | reg = <0 0xe6c40000 0 64>; |
| 1f4c745b | 556 | interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
557 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; |
| 558 | clock-names = "sci_ick"; | |
| acea43fc GU |
559 | dmas = <&dmac0 0x21>, <&dmac0 0x22>; |
| 560 | dma-names = "tx", "rx"; | |
| 597af20f LP |
561 | status = "disabled"; |
| 562 | }; | |
| 563 | ||
| 564 | scifa1: serial@e6c50000 { | |
| 59d2b517 | 565 | compatible = "renesas,scifa-r8a7790", "renesas,scifa"; |
| 597af20f | 566 | reg = <0 0xe6c50000 0 64>; |
| 1f4c745b | 567 | interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
568 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; |
| 569 | clock-names = "sci_ick"; | |
| acea43fc GU |
570 | dmas = <&dmac0 0x25>, <&dmac0 0x26>; |
| 571 | dma-names = "tx", "rx"; | |
| 597af20f LP |
572 | status = "disabled"; |
| 573 | }; | |
| 574 | ||
| 575 | scifa2: serial@e6c60000 { | |
| 59d2b517 | 576 | compatible = "renesas,scifa-r8a7790", "renesas,scifa"; |
| 597af20f | 577 | reg = <0 0xe6c60000 0 64>; |
| 1f4c745b | 578 | interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
579 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; |
| 580 | clock-names = "sci_ick"; | |
| acea43fc GU |
581 | dmas = <&dmac0 0x27>, <&dmac0 0x28>; |
| 582 | dma-names = "tx", "rx"; | |
| 597af20f LP |
583 | status = "disabled"; |
| 584 | }; | |
| 585 | ||
| 586 | scifb0: serial@e6c20000 { | |
| 59d2b517 | 587 | compatible = "renesas,scifb-r8a7790", "renesas,scifb"; |
| 597af20f | 588 | reg = <0 0xe6c20000 0 64>; |
| 1f4c745b | 589 | interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
590 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; |
| 591 | clock-names = "sci_ick"; | |
| acea43fc GU |
592 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; |
| 593 | dma-names = "tx", "rx"; | |
| 597af20f LP |
594 | status = "disabled"; |
| 595 | }; | |
| 596 | ||
| 597 | scifb1: serial@e6c30000 { | |
| 59d2b517 | 598 | compatible = "renesas,scifb-r8a7790", "renesas,scifb"; |
| 597af20f | 599 | reg = <0 0xe6c30000 0 64>; |
| 1f4c745b | 600 | interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
601 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; |
| 602 | clock-names = "sci_ick"; | |
| acea43fc GU |
603 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>; |
| 604 | dma-names = "tx", "rx"; | |
| 597af20f LP |
605 | status = "disabled"; |
| 606 | }; | |
| 607 | ||
| 608 | scifb2: serial@e6ce0000 { | |
| 59d2b517 | 609 | compatible = "renesas,scifb-r8a7790", "renesas,scifb"; |
| 597af20f | 610 | reg = <0 0xe6ce0000 0 64>; |
| 1f4c745b | 611 | interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
612 | clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; |
| 613 | clock-names = "sci_ick"; | |
| acea43fc GU |
614 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; |
| 615 | dma-names = "tx", "rx"; | |
| 597af20f LP |
616 | status = "disabled"; |
| 617 | }; | |
| 618 | ||
| 619 | scif0: serial@e6e60000 { | |
| 59d2b517 | 620 | compatible = "renesas,scif-r8a7790", "renesas,scif"; |
| 597af20f | 621 | reg = <0 0xe6e60000 0 64>; |
| 1f4c745b | 622 | interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
623 | clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; |
| 624 | clock-names = "sci_ick"; | |
| acea43fc GU |
625 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>; |
| 626 | dma-names = "tx", "rx"; | |
| 597af20f LP |
627 | status = "disabled"; |
| 628 | }; | |
| 629 | ||
| 630 | scif1: serial@e6e68000 { | |
| 59d2b517 | 631 | compatible = "renesas,scif-r8a7790", "renesas,scif"; |
| 597af20f | 632 | reg = <0 0xe6e68000 0 64>; |
| 1f4c745b | 633 | interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
634 | clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; |
| 635 | clock-names = "sci_ick"; | |
| acea43fc GU |
636 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; |
| 637 | dma-names = "tx", "rx"; | |
| 597af20f LP |
638 | status = "disabled"; |
| 639 | }; | |
| 640 | ||
| 641 | hscif0: serial@e62c0000 { | |
| 59d2b517 | 642 | compatible = "renesas,hscif-r8a7790", "renesas,hscif"; |
| 597af20f | 643 | reg = <0 0xe62c0000 0 96>; |
| 1f4c745b | 644 | interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
645 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; |
| 646 | clock-names = "sci_ick"; | |
| acea43fc GU |
647 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>; |
| 648 | dma-names = "tx", "rx"; | |
| 597af20f LP |
649 | status = "disabled"; |
| 650 | }; | |
| 651 | ||
| 652 | hscif1: serial@e62c8000 { | |
| 59d2b517 | 653 | compatible = "renesas,hscif-r8a7790", "renesas,hscif"; |
| 597af20f | 654 | reg = <0 0xe62c8000 0 96>; |
| 1f4c745b | 655 | interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; |
| 597af20f LP |
656 | clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; |
| 657 | clock-names = "sci_ick"; | |
| acea43fc GU |
658 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; |
| 659 | dma-names = "tx", "rx"; | |
| 597af20f LP |
660 | status = "disabled"; |
| 661 | }; | |
| 662 | ||
| d8913c67 SS |
663 | ether: ethernet@ee700000 { |
| 664 | compatible = "renesas,ether-r8a7790"; | |
| 665 | reg = <0 0xee700000 0 0x400>; | |
| 666 | interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; | |
| 667 | clocks = <&mstp8_clks R8A7790_CLK_ETHER>; | |
| 668 | phy-mode = "rmii"; | |
| 669 | #address-cells = <1>; | |
| 670 | #size-cells = <0>; | |
| 671 | status = "disabled"; | |
| 672 | }; | |
| 673 | ||
| cde630f7 VB |
674 | sata0: sata@ee300000 { |
| 675 | compatible = "renesas,sata-r8a7790"; | |
| 676 | reg = <0 0xee300000 0 0x2000>; | |
| cde630f7 VB |
677 | interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; |
| 678 | clocks = <&mstp8_clks R8A7790_CLK_SATA0>; | |
| 679 | status = "disabled"; | |
| 680 | }; | |
| 681 | ||
| 682 | sata1: sata@ee500000 { | |
| 683 | compatible = "renesas,sata-r8a7790"; | |
| 684 | reg = <0 0xee500000 0 0x2000>; | |
| cde630f7 VB |
685 | interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; |
| 686 | clocks = <&mstp8_clks R8A7790_CLK_SATA1>; | |
| 687 | status = "disabled"; | |
| 688 | }; | |
| 689 | ||
| ae0a555b YS |
690 | hsusb: usb@e6590000 { |
| 691 | compatible = "renesas,usbhs-r8a7790"; | |
| 692 | reg = <0 0xe6590000 0 0x100>; | |
| 693 | interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; | |
| 694 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; | |
| 695 | renesas,buswait = <4>; | |
| 696 | phys = <&usb0 1>; | |
| 697 | phy-names = "usb"; | |
| e8295dc3 YS |
698 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
| 699 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
| 700 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
| ae0a555b YS |
701 | status = "disabled"; |
| 702 | }; | |
| 703 | ||
| e089f657 SS |
704 | usbphy: usb-phy@e6590100 { |
| 705 | compatible = "renesas,usb-phy-r8a7790"; | |
| 706 | reg = <0 0xe6590100 0 0x100>; | |
| 707 | #address-cells = <1>; | |
| 708 | #size-cells = <0>; | |
| 709 | clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; | |
| 710 | clock-names = "usbhs"; | |
| 711 | status = "disabled"; | |
| 712 | ||
| 713 | usb0: usb-channel@0 { | |
| 714 | reg = <0>; | |
| 715 | #phy-cells = <1>; | |
| 716 | }; | |
| 717 | usb2: usb-channel@2 { | |
| 718 | reg = <2>; | |
| 719 | #phy-cells = <1>; | |
| 720 | }; | |
| 721 | }; | |
| 722 | ||
| 9f685bfc BD |
723 | vin0: video@e6ef0000 { |
| 724 | compatible = "renesas,vin-r8a7790"; | |
| 725 | clocks = <&mstp8_clks R8A7790_CLK_VIN0>; | |
| 726 | reg = <0 0xe6ef0000 0 0x1000>; | |
| 727 | interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; | |
| 728 | status = "disabled"; | |
| 729 | }; | |
| 730 | ||
| 731 | vin1: video@e6ef1000 { | |
| 732 | compatible = "renesas,vin-r8a7790"; | |
| 733 | clocks = <&mstp8_clks R8A7790_CLK_VIN1>; | |
| 734 | reg = <0 0xe6ef1000 0 0x1000>; | |
| 735 | interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>; | |
| 736 | status = "disabled"; | |
| 737 | }; | |
| 738 | ||
| 739 | vin2: video@e6ef2000 { | |
| 740 | compatible = "renesas,vin-r8a7790"; | |
| 741 | clocks = <&mstp8_clks R8A7790_CLK_VIN2>; | |
| 742 | reg = <0 0xe6ef2000 0 0x1000>; | |
| 743 | interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>; | |
| 744 | status = "disabled"; | |
| 745 | }; | |
| 746 | ||
| 747 | vin3: video@e6ef3000 { | |
| 748 | compatible = "renesas,vin-r8a7790"; | |
| 749 | clocks = <&mstp8_clks R8A7790_CLK_VIN3>; | |
| 750 | reg = <0 0xe6ef3000 0 0x1000>; | |
| 751 | interrupts = <0 191 IRQ_TYPE_LEVEL_HIGH>; | |
| 752 | status = "disabled"; | |
| 753 | }; | |
| 754 | ||
| 3ac6a83c LP |
755 | vsp1@fe920000 { |
| 756 | compatible = "renesas,vsp1"; | |
| 757 | reg = <0 0xfe920000 0 0x8000>; | |
| 758 | interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>; | |
| 759 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; | |
| 760 | ||
| 761 | renesas,has-sru; | |
| 762 | renesas,#rpf = <5>; | |
| 763 | renesas,#uds = <1>; | |
| 764 | renesas,#wpf = <4>; | |
| 765 | }; | |
| 766 | ||
| 767 | vsp1@fe928000 { | |
| 768 | compatible = "renesas,vsp1"; | |
| 769 | reg = <0 0xfe928000 0 0x8000>; | |
| 770 | interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>; | |
| 771 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; | |
| 772 | ||
| 773 | renesas,has-lut; | |
| 774 | renesas,has-sru; | |
| 775 | renesas,#rpf = <5>; | |
| 776 | renesas,#uds = <3>; | |
| 777 | renesas,#wpf = <4>; | |
| 778 | }; | |
| 779 | ||
| 780 | vsp1@fe930000 { | |
| 781 | compatible = "renesas,vsp1"; | |
| 782 | reg = <0 0xfe930000 0 0x8000>; | |
| 783 | interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>; | |
| 784 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; | |
| 785 | ||
| 786 | renesas,has-lif; | |
| 787 | renesas,has-lut; | |
| 788 | renesas,#rpf = <4>; | |
| 789 | renesas,#uds = <1>; | |
| 790 | renesas,#wpf = <4>; | |
| 791 | }; | |
| 792 | ||
| 793 | vsp1@fe938000 { | |
| 794 | compatible = "renesas,vsp1"; | |
| 795 | reg = <0 0xfe938000 0 0x8000>; | |
| 796 | interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>; | |
| 797 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; | |
| 798 | ||
| 799 | renesas,has-lif; | |
| 800 | renesas,has-lut; | |
| 801 | renesas,#rpf = <4>; | |
| 802 | renesas,#uds = <1>; | |
| 803 | renesas,#wpf = <4>; | |
| 804 | }; | |
| 805 | ||
| 806 | du: display@feb00000 { | |
| 807 | compatible = "renesas,du-r8a7790"; | |
| 808 | reg = <0 0xfeb00000 0 0x70000>, | |
| 809 | <0 0xfeb90000 0 0x1c>, | |
| 810 | <0 0xfeb94000 0 0x1c>; | |
| 811 | reg-names = "du", "lvds.0", "lvds.1"; | |
| 812 | interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, | |
| 813 | <0 268 IRQ_TYPE_LEVEL_HIGH>, | |
| 814 | <0 269 IRQ_TYPE_LEVEL_HIGH>; | |
| 815 | clocks = <&mstp7_clks R8A7790_CLK_DU0>, | |
| 816 | <&mstp7_clks R8A7790_CLK_DU1>, | |
| 817 | <&mstp7_clks R8A7790_CLK_DU2>, | |
| 818 | <&mstp7_clks R8A7790_CLK_LVDS0>, | |
| 819 | <&mstp7_clks R8A7790_CLK_LVDS1>; | |
| 820 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; | |
| 821 | status = "disabled"; | |
| 822 | ||
| 823 | ports { | |
| 824 | #address-cells = <1>; | |
| 825 | #size-cells = <0>; | |
| 826 | ||
| 827 | port@0 { | |
| 828 | reg = <0>; | |
| 829 | du_out_rgb: endpoint { | |
| 830 | }; | |
| 831 | }; | |
| 832 | port@1 { | |
| 833 | reg = <1>; | |
| 834 | du_out_lvds0: endpoint { | |
| 835 | }; | |
| 836 | }; | |
| 837 | port@2 { | |
| 838 | reg = <2>; | |
| 839 | du_out_lvds1: endpoint { | |
| 840 | }; | |
| 841 | }; | |
| 842 | }; | |
| 843 | }; | |
| 844 | ||
| 6a7742b4 SS |
845 | can0: can@e6e80000 { |
| 846 | compatible = "renesas,can-r8a7790"; | |
| 847 | reg = <0 0xe6e80000 0 0x1000>; | |
| 848 | interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; | |
| 849 | clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, | |
| 850 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
| 851 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 852 | status = "disabled"; | |
| 853 | }; | |
| 854 | ||
| 855 | can1: can@e6e88000 { | |
| 856 | compatible = "renesas,can-r8a7790"; | |
| 857 | reg = <0 0xe6e88000 0 0x1000>; | |
| 858 | interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH>; | |
| 859 | clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, | |
| 860 | <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; | |
| 861 | clock-names = "clkp1", "clkp2", "can_clk"; | |
| 862 | status = "disabled"; | |
| 863 | }; | |
| 864 | ||
| 22a1f595 LP |
865 | clocks { |
| 866 | #address-cells = <2>; | |
| 867 | #size-cells = <2>; | |
| 868 | ranges; | |
| 869 | ||
| 870 | /* External root clock */ | |
| 871 | extal_clk: extal_clk { | |
| 872 | compatible = "fixed-clock"; | |
| 873 | #clock-cells = <0>; | |
| 874 | /* This value must be overriden by the board. */ | |
| 875 | clock-frequency = <0>; | |
| 876 | clock-output-names = "extal"; | |
| 877 | }; | |
| 878 | ||
| 51d17918 PE |
879 | /* External PCIe clock - can be overridden by the board */ |
| 880 | pcie_bus_clk: pcie_bus_clk { | |
| 881 | compatible = "fixed-clock"; | |
| 882 | #clock-cells = <0>; | |
| 883 | clock-frequency = <100000000>; | |
| 884 | clock-output-names = "pcie_bus"; | |
| 885 | status = "disabled"; | |
| 886 | }; | |
| 887 | ||
| c7c2ec3a KM |
888 | /* |
| 889 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by | |
| 890 | * default. Boards that provide audio clocks should override them. | |
| 891 | */ | |
| 892 | audio_clk_a: audio_clk_a { | |
| 893 | compatible = "fixed-clock"; | |
| 894 | #clock-cells = <0>; | |
| 895 | clock-frequency = <0>; | |
| 896 | clock-output-names = "audio_clk_a"; | |
| 897 | }; | |
| 898 | audio_clk_b: audio_clk_b { | |
| 899 | compatible = "fixed-clock"; | |
| 900 | #clock-cells = <0>; | |
| 901 | clock-frequency = <0>; | |
| 902 | clock-output-names = "audio_clk_b"; | |
| 903 | }; | |
| 904 | audio_clk_c: audio_clk_c { | |
| 905 | compatible = "fixed-clock"; | |
| 906 | #clock-cells = <0>; | |
| 907 | clock-frequency = <0>; | |
| 908 | clock-output-names = "audio_clk_c"; | |
| 909 | }; | |
| 910 | ||
| 41650f40 SS |
911 | /* External USB clock - can be overridden by the board */ |
| 912 | usb_extal_clk: usb_extal_clk { | |
| 913 | compatible = "fixed-clock"; | |
| 914 | #clock-cells = <0>; | |
| 915 | clock-frequency = <48000000>; | |
| 916 | clock-output-names = "usb_extal"; | |
| 917 | }; | |
| 918 | ||
| 919 | /* External CAN clock */ | |
| 920 | can_clk: can_clk { | |
| 921 | compatible = "fixed-clock"; | |
| 922 | #clock-cells = <0>; | |
| 923 | /* This value must be overridden by the board. */ | |
| 924 | clock-frequency = <0>; | |
| 925 | clock-output-names = "can_clk"; | |
| 926 | status = "disabled"; | |
| 927 | }; | |
| 928 | ||
| 22a1f595 LP |
929 | /* Special CPG clocks */ |
| 930 | cpg_clocks: cpg_clocks@e6150000 { | |
| 931 | compatible = "renesas,r8a7790-cpg-clocks", | |
| 932 | "renesas,rcar-gen2-cpg-clocks"; | |
| 933 | reg = <0 0xe6150000 0 0x1000>; | |
| 41650f40 | 934 | clocks = <&extal_clk &usb_extal_clk>; |
| 22a1f595 LP |
935 | #clock-cells = <1>; |
| 936 | clock-output-names = "main", "pll0", "pll1", "pll3", | |
| 937 | "lb", "qspi", "sdh", "sd0", "sd1", | |
| 3453ca9e | 938 | "z", "rcan", "adsp"; |
| 22a1f595 LP |
939 | }; |
| 940 | ||
| 941 | /* Variable factor clocks */ | |
| 942 | sd2_clk: sd2_clk@e6150078 { | |
| 943 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; | |
| 944 | reg = <0 0xe6150078 0 4>; | |
| 945 | clocks = <&pll1_div2_clk>; | |
| 946 | #clock-cells = <0>; | |
| 947 | clock-output-names = "sd2"; | |
| 948 | }; | |
| edd7b938 | 949 | sd3_clk: sd3_clk@e615026c { |
| 22a1f595 | 950 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; |
| edd7b938 | 951 | reg = <0 0xe615026c 0 4>; |
| 22a1f595 LP |
952 | clocks = <&pll1_div2_clk>; |
| 953 | #clock-cells = <0>; | |
| 954 | clock-output-names = "sd3"; | |
| 955 | }; | |
| 956 | mmc0_clk: mmc0_clk@e6150240 { | |
| 957 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; | |
| 958 | reg = <0 0xe6150240 0 4>; | |
| 959 | clocks = <&pll1_div2_clk>; | |
| 960 | #clock-cells = <0>; | |
| 961 | clock-output-names = "mmc0"; | |
| 962 | }; | |
| 963 | mmc1_clk: mmc1_clk@e6150244 { | |
| 964 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; | |
| 965 | reg = <0 0xe6150244 0 4>; | |
| 966 | clocks = <&pll1_div2_clk>; | |
| 967 | #clock-cells = <0>; | |
| 968 | clock-output-names = "mmc1"; | |
| 969 | }; | |
| 970 | ssp_clk: ssp_clk@e6150248 { | |
| 971 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; | |
| 972 | reg = <0 0xe6150248 0 4>; | |
| 973 | clocks = <&pll1_div2_clk>; | |
| 974 | #clock-cells = <0>; | |
| 975 | clock-output-names = "ssp"; | |
| 976 | }; | |
| 977 | ssprs_clk: ssprs_clk@e615024c { | |
| 978 | compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; | |
| 979 | reg = <0 0xe615024c 0 4>; | |
| 980 | clocks = <&pll1_div2_clk>; | |
| 981 | #clock-cells = <0>; | |
| 982 | clock-output-names = "ssprs"; | |
| 983 | }; | |
| 984 | ||
| 985 | /* Fixed factor clocks */ | |
| 986 | pll1_div2_clk: pll1_div2_clk { | |
| 987 | compatible = "fixed-factor-clock"; | |
| 988 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 989 | #clock-cells = <0>; | |
| 990 | clock-div = <2>; | |
| 991 | clock-mult = <1>; | |
| 992 | clock-output-names = "pll1_div2"; | |
| 993 | }; | |
| 994 | z2_clk: z2_clk { | |
| 995 | compatible = "fixed-factor-clock"; | |
| 996 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 997 | #clock-cells = <0>; | |
| 998 | clock-div = <2>; | |
| 999 | clock-mult = <1>; | |
| 1000 | clock-output-names = "z2"; | |
| 1001 | }; | |
| 1002 | zg_clk: zg_clk { | |
| 1003 | compatible = "fixed-factor-clock"; | |
| 1004 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1005 | #clock-cells = <0>; | |
| 1006 | clock-div = <3>; | |
| 1007 | clock-mult = <1>; | |
| 1008 | clock-output-names = "zg"; | |
| 1009 | }; | |
| 1010 | zx_clk: zx_clk { | |
| 1011 | compatible = "fixed-factor-clock"; | |
| 1012 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1013 | #clock-cells = <0>; | |
| 1014 | clock-div = <3>; | |
| 1015 | clock-mult = <1>; | |
| 1016 | clock-output-names = "zx"; | |
| 1017 | }; | |
| 1018 | zs_clk: zs_clk { | |
| 1019 | compatible = "fixed-factor-clock"; | |
| 1020 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1021 | #clock-cells = <0>; | |
| 1022 | clock-div = <6>; | |
| 1023 | clock-mult = <1>; | |
| 1024 | clock-output-names = "zs"; | |
| 1025 | }; | |
| 1026 | hp_clk: hp_clk { | |
| 1027 | compatible = "fixed-factor-clock"; | |
| 1028 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1029 | #clock-cells = <0>; | |
| 1030 | clock-div = <12>; | |
| 1031 | clock-mult = <1>; | |
| 1032 | clock-output-names = "hp"; | |
| 1033 | }; | |
| 1034 | i_clk: i_clk { | |
| 1035 | compatible = "fixed-factor-clock"; | |
| 1036 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1037 | #clock-cells = <0>; | |
| 1038 | clock-div = <2>; | |
| 1039 | clock-mult = <1>; | |
| 1040 | clock-output-names = "i"; | |
| 1041 | }; | |
| 1042 | b_clk: b_clk { | |
| 1043 | compatible = "fixed-factor-clock"; | |
| 1044 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1045 | #clock-cells = <0>; | |
| 1046 | clock-div = <12>; | |
| 1047 | clock-mult = <1>; | |
| 1048 | clock-output-names = "b"; | |
| 1049 | }; | |
| 1050 | p_clk: p_clk { | |
| 1051 | compatible = "fixed-factor-clock"; | |
| 1052 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1053 | #clock-cells = <0>; | |
| 1054 | clock-div = <24>; | |
| 1055 | clock-mult = <1>; | |
| 1056 | clock-output-names = "p"; | |
| 1057 | }; | |
| 1058 | cl_clk: cl_clk { | |
| 1059 | compatible = "fixed-factor-clock"; | |
| 1060 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1061 | #clock-cells = <0>; | |
| 1062 | clock-div = <48>; | |
| 1063 | clock-mult = <1>; | |
| 1064 | clock-output-names = "cl"; | |
| 1065 | }; | |
| 1066 | m2_clk: m2_clk { | |
| 1067 | compatible = "fixed-factor-clock"; | |
| 1068 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1069 | #clock-cells = <0>; | |
| 1070 | clock-div = <8>; | |
| 1071 | clock-mult = <1>; | |
| 1072 | clock-output-names = "m2"; | |
| 1073 | }; | |
| 1074 | imp_clk: imp_clk { | |
| 1075 | compatible = "fixed-factor-clock"; | |
| 1076 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1077 | #clock-cells = <0>; | |
| 1078 | clock-div = <4>; | |
| 1079 | clock-mult = <1>; | |
| 1080 | clock-output-names = "imp"; | |
| 1081 | }; | |
| 1082 | rclk_clk: rclk_clk { | |
| 1083 | compatible = "fixed-factor-clock"; | |
| 1084 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1085 | #clock-cells = <0>; | |
| 1086 | clock-div = <(48 * 1024)>; | |
| 1087 | clock-mult = <1>; | |
| 1088 | clock-output-names = "rclk"; | |
| 1089 | }; | |
| 1090 | oscclk_clk: oscclk_clk { | |
| 1091 | compatible = "fixed-factor-clock"; | |
| 1092 | clocks = <&cpg_clocks R8A7790_CLK_PLL1>; | |
| 1093 | #clock-cells = <0>; | |
| 1094 | clock-div = <(12 * 1024)>; | |
| 1095 | clock-mult = <1>; | |
| 1096 | clock-output-names = "oscclk"; | |
| 1097 | }; | |
| 1098 | zb3_clk: zb3_clk { | |
| 1099 | compatible = "fixed-factor-clock"; | |
| 1100 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
| 1101 | #clock-cells = <0>; | |
| 1102 | clock-div = <4>; | |
| 1103 | clock-mult = <1>; | |
| 1104 | clock-output-names = "zb3"; | |
| 1105 | }; | |
| 1106 | zb3d2_clk: zb3d2_clk { | |
| 1107 | compatible = "fixed-factor-clock"; | |
| 1108 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
| 1109 | #clock-cells = <0>; | |
| 1110 | clock-div = <8>; | |
| 1111 | clock-mult = <1>; | |
| 1112 | clock-output-names = "zb3d2"; | |
| 1113 | }; | |
| 1114 | ddr_clk: ddr_clk { | |
| 1115 | compatible = "fixed-factor-clock"; | |
| 1116 | clocks = <&cpg_clocks R8A7790_CLK_PLL3>; | |
| 1117 | #clock-cells = <0>; | |
| 1118 | clock-div = <8>; | |
| 1119 | clock-mult = <1>; | |
| 1120 | clock-output-names = "ddr"; | |
| 1121 | }; | |
| 1122 | mp_clk: mp_clk { | |
| 1123 | compatible = "fixed-factor-clock"; | |
| 1124 | clocks = <&pll1_div2_clk>; | |
| 1125 | #clock-cells = <0>; | |
| 1126 | clock-div = <15>; | |
| 1127 | clock-mult = <1>; | |
| 1128 | clock-output-names = "mp"; | |
| 1129 | }; | |
| 1130 | cp_clk: cp_clk { | |
| 1131 | compatible = "fixed-factor-clock"; | |
| 1132 | clocks = <&extal_clk>; | |
| 1133 | #clock-cells = <0>; | |
| 1134 | clock-div = <2>; | |
| 1135 | clock-mult = <1>; | |
| 1136 | clock-output-names = "cp"; | |
| 1137 | }; | |
| 1138 | ||
| 1139 | /* Gate clocks */ | |
| 9d90951a LP |
1140 | mstp0_clks: mstp0_clks@e6150130 { |
| 1141 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1142 | reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; | |
| 1143 | clocks = <&mp_clk>; | |
| 1144 | #clock-cells = <1>; | |
| b54010af | 1145 | clock-indices = <R8A7790_CLK_MSIOF0>; |
| 9d90951a LP |
1146 | clock-output-names = "msiof0"; |
| 1147 | }; | |
| 22a1f595 LP |
1148 | mstp1_clks: mstp1_clks@e6150134 { |
| 1149 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1150 | reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; | |
| 4ba8f246 YH |
1151 | clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>, |
| 1152 | <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>, | |
| 1153 | <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, | |
| 1154 | <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; | |
| 22a1f595 | 1155 | #clock-cells = <1>; |
| b54010af | 1156 | clock-indices = < |
| 4ba8f246 YH |
1157 | R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1 |
| 1158 | R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1 | |
| 1159 | R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC | |
| 1160 | R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0 | |
| 1161 | R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0 | |
| 1162 | R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0 | |
| 1163 | R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S | |
| 22a1f595 LP |
1164 | >; |
| 1165 | clock-output-names = | |
| 4ba8f246 YH |
1166 | "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1", |
| 1167 | "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1", | |
| 1168 | "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0", | |
| 2284ff5f | 1169 | "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy"; |
| 22a1f595 LP |
1170 | }; |
| 1171 | mstp2_clks: mstp2_clks@e6150138 { | |
| 1172 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1173 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; | |
| 1174 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, | |
| c819acda LP |
1175 | <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>, |
| 1176 | <&zs_clk>; | |
| 22a1f595 | 1177 | #clock-cells = <1>; |
| b54010af | 1178 | clock-indices = < |
| 22a1f595 | 1179 | R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0 |
| 9d90951a LP |
1180 | R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 |
| 1181 | R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2 | |
| c819acda | 1182 | R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0 |
| 22a1f595 LP |
1183 | >; |
| 1184 | clock-output-names = | |
| 9d90951a | 1185 | "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", |
| c819acda LP |
1186 | "scifb1", "msiof1", "msiof3", "scifb2", |
| 1187 | "sys-dmac1", "sys-dmac0"; | |
| 22a1f595 LP |
1188 | }; |
| 1189 | mstp3_clks: mstp3_clks@e615013c { | |
| 1190 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1191 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; | |
| 17465149 WS |
1192 | clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, |
| 1193 | <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, | |
| b02ce79f YS |
1194 | <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
| 1195 | <&hp_clk>, <&hp_clk>; | |
| 22a1f595 | 1196 | #clock-cells = <1>; |
| b54010af | 1197 | clock-indices = < |
| 17465149 WS |
1198 | R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 |
| 1199 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 | |
| ecafea8c | 1200 | R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 |
| b02ce79f | 1201 | R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 |
| 22a1f595 LP |
1202 | >; |
| 1203 | clock-output-names = | |
| 17465149 WS |
1204 | "iic2", "tpu0", "mmcif1", "sdhi3", |
| 1205 | "sdhi2", "sdhi1", "sdhi0", "mmcif0", | |
| b02ce79f YS |
1206 | "iic0", "pciec", "iic1", "ssusb", "cmt1", |
| 1207 | "usbdmac0", "usbdmac1"; | |
| 22a1f595 | 1208 | }; |
| 61624caf GU |
1209 | mstp4_clks: mstp4_clks@e6150140 { |
| 1210 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1211 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; | |
| 1212 | clocks = <&cp_clk>; | |
| 1213 | #clock-cells = <1>; | |
| 1214 | clock-indices = <R8A7790_CLK_IRQC>; | |
| 1215 | clock-output-names = "irqc"; | |
| 1216 | }; | |
| 22a1f595 LP |
1217 | mstp5_clks: mstp5_clks@e6150144 { |
| 1218 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1219 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; | |
| 3453ca9e SS |
1220 | clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>, |
| 1221 | <&extal_clk>, <&p_clk>; | |
| 22a1f595 | 1222 | #clock-cells = <1>; |
| b54010af BD |
1223 | clock-indices = < |
| 1224 | R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 | |
| 3453ca9e SS |
1225 | R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL |
| 1226 | R8A7790_CLK_PWM | |
| b54010af | 1227 | >; |
| 3453ca9e SS |
1228 | clock-output-names = "audmac0", "audmac1", "adsp_mod", |
| 1229 | "thermal", "pwm"; | |
| 22a1f595 LP |
1230 | }; |
| 1231 | mstp7_clks: mstp7_clks@e615014c { | |
| 1232 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1233 | reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; | |
| b621f6d4 | 1234 | clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, |
| 22a1f595 LP |
1235 | <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, |
| 1236 | <&zx_clk>; | |
| 1237 | #clock-cells = <1>; | |
| b54010af | 1238 | clock-indices = < |
| 22a1f595 LP |
1239 | R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1 |
| 1240 | R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0 | |
| 1241 | R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0 | |
| 1242 | R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0 | |
| 1243 | >; | |
| 1244 | clock-output-names = | |
| 1245 | "ehci", "hsusb", "hscif1", "hscif0", "scif1", | |
| 1246 | "scif0", "du2", "du1", "du0", "lvds1", "lvds0"; | |
| 1247 | }; | |
| 1248 | mstp8_clks: mstp8_clks@e6150990 { | |
| 1249 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1250 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | |
| f6b5dd40 AG |
1251 | clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, |
| 1252 | <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; | |
| 22a1f595 | 1253 | #clock-cells = <1>; |
| b54010af | 1254 | clock-indices = < |
| f6b5dd40 AG |
1255 | R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 |
| 1256 | R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER | |
| 1257 | R8A7790_CLK_SATA1 R8A7790_CLK_SATA0 | |
| 3f2beaa9 | 1258 | >; |
| bccccc3d | 1259 | clock-output-names = |
| f6b5dd40 AG |
1260 | "mlb", "vin3", "vin2", "vin1", "vin0", "ether", |
| 1261 | "sata1", "sata0"; | |
| 22a1f595 LP |
1262 | }; |
| 1263 | mstp9_clks: mstp9_clks@e6150994 { | |
| 1264 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1265 | reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; | |
| 81f6883f GU |
1266 | clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, |
| 1267 | <&cp_clk>, <&cp_clk>, <&cp_clk>, | |
| 1268 | <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>, | |
| 3672b059 | 1269 | <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; |
| 22a1f595 | 1270 | #clock-cells = <1>; |
| b54010af | 1271 | clock-indices = < |
| 81f6883f GU |
1272 | R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3 |
| 1273 | R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0 | |
| 17465149 WS |
1274 | R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS |
| 1275 | R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0 | |
| 22a1f595 | 1276 | >; |
| 91b56ca1 | 1277 | clock-output-names = |
| 81f6883f | 1278 | "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", |
| 17465149 WS |
1279 | "rcan1", "rcan0", "qspi_mod", "iic3", |
| 1280 | "i2c3", "i2c2", "i2c1", "i2c0"; | |
| 22a1f595 | 1281 | }; |
| bcde3722 KM |
1282 | mstp10_clks: mstp10_clks@e6150998 { |
| 1283 | compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
| 1284 | reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; | |
| 1285 | clocks = <&p_clk>, | |
| 1286 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, | |
| 1287 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, | |
| 1288 | <&p_clk>, | |
| 1289 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1290 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1291 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1292 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1293 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, | |
| 1294 | <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>; | |
| 1295 | ||
| 1296 | #clock-cells = <1>; | |
| 1297 | clock-indices = < | |
| 1298 | R8A7790_CLK_SSI_ALL | |
| 1299 | R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 | |
| 1300 | R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 | |
| 1301 | R8A7790_CLK_SCU_ALL | |
| 1302 | R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0 | |
| 1303 | R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5 | |
| 1304 | R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0 | |
| 1305 | >; | |
| 1306 | clock-output-names = | |
| 1307 | "ssi-all", | |
| 1308 | "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", | |
| 1309 | "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", | |
| 1310 | "scu-all", | |
| 1311 | "scu-dvc1", "scu-dvc0", | |
| 1312 | "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", | |
| 1313 | "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; | |
| 1314 | }; | |
| 22a1f595 | 1315 | }; |
| 7053e134 | 1316 | |
| fad6d45c | 1317 | qspi: spi@e6b10000 { |
| 7053e134 GU |
1318 | compatible = "renesas,qspi-r8a7790", "renesas,qspi"; |
| 1319 | reg = <0 0xe6b10000 0 0x2c>; | |
| 7053e134 GU |
1320 | interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; |
| 1321 | clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>; | |
| 37cf3d61 GU |
1322 | dmas = <&dmac0 0x17>, <&dmac0 0x18>; |
| 1323 | dma-names = "tx", "rx"; | |
| 7053e134 GU |
1324 | num-cs = <1>; |
| 1325 | #address-cells = <1>; | |
| 1326 | #size-cells = <0>; | |
| 1327 | status = "disabled"; | |
| 1328 | }; | |
| ae8a6146 GU |
1329 | |
| 1330 | msiof0: spi@e6e20000 { | |
| 1331 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1332 | reg = <0 0xe6e20000 0 0x0064>; |
| ae8a6146 GU |
1333 | interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; |
| 1334 | clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; | |
| fbff6688 GU |
1335 | dmas = <&dmac0 0x51>, <&dmac0 0x52>; |
| 1336 | dma-names = "tx", "rx"; | |
| ae8a6146 GU |
1337 | #address-cells = <1>; |
| 1338 | #size-cells = <0>; | |
| 1339 | status = "disabled"; | |
| 1340 | }; | |
| 1341 | ||
| 1342 | msiof1: spi@e6e10000 { | |
| 1343 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1344 | reg = <0 0xe6e10000 0 0x0064>; |
| ae8a6146 GU |
1345 | interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; |
| 1346 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; | |
| fbff6688 GU |
1347 | dmas = <&dmac0 0x55>, <&dmac0 0x56>; |
| 1348 | dma-names = "tx", "rx"; | |
| ae8a6146 GU |
1349 | #address-cells = <1>; |
| 1350 | #size-cells = <0>; | |
| 1351 | status = "disabled"; | |
| 1352 | }; | |
| 1353 | ||
| 1354 | msiof2: spi@e6e00000 { | |
| 1355 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1356 | reg = <0 0xe6e00000 0 0x0064>; |
| ae8a6146 GU |
1357 | interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; |
| 1358 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; | |
| fbff6688 GU |
1359 | dmas = <&dmac0 0x41>, <&dmac0 0x42>; |
| 1360 | dma-names = "tx", "rx"; | |
| ae8a6146 GU |
1361 | #address-cells = <1>; |
| 1362 | #size-cells = <0>; | |
| 1363 | status = "disabled"; | |
| 1364 | }; | |
| 1365 | ||
| 1366 | msiof3: spi@e6c90000 { | |
| 1367 | compatible = "renesas,msiof-r8a7790"; | |
| c7d1f08a | 1368 | reg = <0 0xe6c90000 0 0x0064>; |
| ae8a6146 GU |
1369 | interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>; |
| 1370 | clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; | |
| fbff6688 GU |
1371 | dmas = <&dmac0 0x45>, <&dmac0 0x46>; |
| 1372 | dma-names = "tx", "rx"; | |
| ae8a6146 GU |
1373 | #address-cells = <1>; |
| 1374 | #size-cells = <0>; | |
| 1375 | status = "disabled"; | |
| 1376 | }; | |
| 7df2fd57 | 1377 | |
| 157fcd8a YS |
1378 | xhci: usb@ee000000 { |
| 1379 | compatible = "renesas,xhci-r8a7790"; | |
| 1380 | reg = <0 0xee000000 0 0xc00>; | |
| 1381 | interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; | |
| 1382 | clocks = <&mstp3_clks R8A7790_CLK_SSUSB>; | |
| 1383 | phys = <&usb2 1>; | |
| 1384 | phy-names = "usb"; | |
| 1385 | status = "disabled"; | |
| 1386 | }; | |
| 1387 | ||
| ff4f3eb8 BD |
1388 | pci0: pci@ee090000 { |
| 1389 | compatible = "renesas,pci-r8a7790"; | |
| 1390 | device_type = "pci"; | |
| 1391 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; | |
| 1392 | reg = <0 0xee090000 0 0xc00>, | |
| 1393 | <0 0xee080000 0 0x1100>; | |
| 1394 | interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 1395 | status = "disabled"; | |
| 1396 | ||
| 1397 | bus-range = <0 0>; | |
| 1398 | #address-cells = <3>; | |
| 1399 | #size-cells = <2>; | |
| 1400 | #interrupt-cells = <1>; | |
| 1401 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
| 1402 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
| 1403 | interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH | |
| 517ec80a GU |
1404 | 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH |
| 1405 | 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 538c40e5 SS |
1406 | |
| 1407 | usb@0,1 { | |
| 1408 | reg = <0x800 0 0 0 0>; | |
| 1409 | device_type = "pci"; | |
| 1410 | phys = <&usb0 0>; | |
| 1411 | phy-names = "usb"; | |
| 1412 | }; | |
| 1413 | ||
| 1414 | usb@0,2 { | |
| 1415 | reg = <0x1000 0 0 0 0>; | |
| 1416 | device_type = "pci"; | |
| 1417 | phys = <&usb0 0>; | |
| 1418 | phy-names = "usb"; | |
| 1419 | }; | |
| ff4f3eb8 BD |
1420 | }; |
| 1421 | ||
| 1422 | pci1: pci@ee0b0000 { | |
| 1423 | compatible = "renesas,pci-r8a7790"; | |
| 1424 | device_type = "pci"; | |
| 1425 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; | |
| 1426 | reg = <0 0xee0b0000 0 0xc00>, | |
| 1427 | <0 0xee0a0000 0 0x1100>; | |
| 1428 | interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>; | |
| 1429 | status = "disabled"; | |
| 1430 | ||
| 1431 | bus-range = <1 1>; | |
| 1432 | #address-cells = <3>; | |
| 1433 | #size-cells = <2>; | |
| 1434 | #interrupt-cells = <1>; | |
| 1435 | ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; | |
| 1436 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
| 1437 | interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH | |
| 517ec80a GU |
1438 | 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH |
| 1439 | 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>; | |
| ff4f3eb8 BD |
1440 | }; |
| 1441 | ||
| 1442 | pci2: pci@ee0d0000 { | |
| 1443 | compatible = "renesas,pci-r8a7790"; | |
| 1444 | device_type = "pci"; | |
| 1445 | clocks = <&mstp7_clks R8A7790_CLK_EHCI>; | |
| 1446 | reg = <0 0xee0d0000 0 0xc00>, | |
| 1447 | <0 0xee0c0000 0 0x1100>; | |
| 1448 | interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; | |
| 1449 | status = "disabled"; | |
| 1450 | ||
| 1451 | bus-range = <2 2>; | |
| 1452 | #address-cells = <3>; | |
| 1453 | #size-cells = <2>; | |
| 1454 | #interrupt-cells = <1>; | |
| 1455 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
| 1456 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
| 1457 | interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH | |
| 517ec80a GU |
1458 | 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH |
| 1459 | 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; | |
| 538c40e5 SS |
1460 | |
| 1461 | usb@0,1 { | |
| 1462 | reg = <0x800 0 0 0 0>; | |
| 1463 | device_type = "pci"; | |
| 1464 | phys = <&usb2 0>; | |
| 1465 | phy-names = "usb"; | |
| 1466 | }; | |
| 1467 | ||
| 1468 | usb@0,2 { | |
| 1469 | reg = <0x1000 0 0 0 0>; | |
| 1470 | device_type = "pci"; | |
| 1471 | phys = <&usb2 0>; | |
| 1472 | phy-names = "usb"; | |
| 1473 | }; | |
| ff4f3eb8 BD |
1474 | }; |
| 1475 | ||
| 745329d2 PE |
1476 | pciec: pcie@fe000000 { |
| 1477 | compatible = "renesas,pcie-r8a7790"; | |
| 1478 | reg = <0 0xfe000000 0 0x80000>; | |
| 1479 | #address-cells = <3>; | |
| 1480 | #size-cells = <2>; | |
| 1481 | bus-range = <0x00 0xff>; | |
| 1482 | device_type = "pci"; | |
| 1483 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
| 1484 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
| 1485 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
| 1486 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
| 1487 | /* Map all possible DDR as inbound ranges */ | |
| 1488 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
| 1489 | 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; | |
| 1490 | interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>, | |
| 1491 | <0 117 IRQ_TYPE_LEVEL_HIGH>, | |
| 1492 | <0 118 IRQ_TYPE_LEVEL_HIGH>; | |
| 1493 | #interrupt-cells = <1>; | |
| 1494 | interrupt-map-mask = <0 0 0 0>; | |
| 1495 | interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>; | |
| 1496 | clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>; | |
| 1497 | clock-names = "pcie", "pcie_bus"; | |
| 1498 | status = "disabled"; | |
| 1499 | }; | |
| 1500 | ||
| b694e380 | 1501 | rcar_sound: sound@ec500000 { |
| ad63241c KM |
1502 | /* |
| 1503 | * #sound-dai-cells is required | |
| 1504 | * | |
| 1505 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
| 1506 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
| 1507 | */ | |
| 31078ecd | 1508 | compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; |
| 7df2fd57 KM |
1509 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
| 1510 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
| 1511 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
| 0c602677 KM |
1512 | <0 0xec541000 0 0x1280>, /* SSI */ |
| 1513 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
| 1514 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
| 46a158f2 | 1515 | |
| 7df2fd57 KM |
1516 | clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>, |
| 1517 | <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>, | |
| 1518 | <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>, | |
| 1519 | <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>, | |
| 1520 | <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>, | |
| 1521 | <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>, | |
| 1522 | <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>, | |
| 1523 | <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>, | |
| 1524 | <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>, | |
| 1525 | <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>, | |
| 1526 | <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>, | |
| 334d69a2 | 1527 | <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>, |
| 7df2fd57 KM |
1528 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; |
| 1529 | clock-names = "ssi-all", | |
| 1530 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
| 1531 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | |
| 1532 | "src.9", "src.8", "src.7", "src.6", "src.5", | |
| 1533 | "src.4", "src.3", "src.2", "src.1", "src.0", | |
| 334d69a2 | 1534 | "dvc.0", "dvc.1", |
| 7df2fd57 KM |
1535 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 1536 | ||
| 1537 | status = "disabled"; | |
| 1538 | ||
| 334d69a2 | 1539 | rcar_sound,dvc { |
| 118a5093 KM |
1540 | dvc0: dvc@0 { |
| 1541 | dmas = <&audma0 0xbc>; | |
| 1542 | dma-names = "tx"; | |
| 1543 | }; | |
| 1544 | dvc1: dvc@1 { | |
| 1545 | dmas = <&audma0 0xbe>; | |
| 1546 | dma-names = "tx"; | |
| 1547 | }; | |
| 334d69a2 KM |
1548 | }; |
| 1549 | ||
| 7df2fd57 | 1550 | rcar_sound,src { |
| 118a5093 KM |
1551 | src0: src@0 { |
| 1552 | interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; | |
| 1553 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
| 1554 | dma-names = "rx", "tx"; | |
| 1555 | }; | |
| 1556 | src1: src@1 { | |
| 1557 | interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; | |
| 1558 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
| 1559 | dma-names = "rx", "tx"; | |
| 1560 | }; | |
| 1561 | src2: src@2 { | |
| 1562 | interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; | |
| 1563 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
| 1564 | dma-names = "rx", "tx"; | |
| 1565 | }; | |
| 1566 | src3: src@3 { | |
| 1567 | interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; | |
| 1568 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
| 1569 | dma-names = "rx", "tx"; | |
| 1570 | }; | |
| 1571 | src4: src@4 { | |
| 1572 | interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; | |
| 1573 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
| 1574 | dma-names = "rx", "tx"; | |
| 1575 | }; | |
| 1576 | src5: src@5 { | |
| 1577 | interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; | |
| 1578 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
| 1579 | dma-names = "rx", "tx"; | |
| 1580 | }; | |
| 1581 | src6: src@6 { | |
| 1582 | interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; | |
| 1583 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
| 1584 | dma-names = "rx", "tx"; | |
| 1585 | }; | |
| 1586 | src7: src@7 { | |
| 1587 | interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; | |
| 1588 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
| 1589 | dma-names = "rx", "tx"; | |
| 1590 | }; | |
| 1591 | src8: src@8 { | |
| 1592 | interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; | |
| 1593 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
| 1594 | dma-names = "rx", "tx"; | |
| 1595 | }; | |
| 1596 | src9: src@9 { | |
| 1597 | interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; | |
| 1598 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
| 1599 | dma-names = "rx", "tx"; | |
| 1600 | }; | |
| 7df2fd57 KM |
1601 | }; |
| 1602 | ||
| 1603 | rcar_sound,ssi { | |
| 118a5093 KM |
1604 | ssi0: ssi@0 { |
| 1605 | interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; | |
| 1606 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; | |
| 1607 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1608 | }; | |
| 1609 | ssi1: ssi@1 { | |
| 1610 | interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; | |
| 1611 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; | |
| 1612 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1613 | }; | |
| 1614 | ssi2: ssi@2 { | |
| 1615 | interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; | |
| 1616 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; | |
| 1617 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1618 | }; | |
| 1619 | ssi3: ssi@3 { | |
| 1620 | interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; | |
| 1621 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; | |
| 1622 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1623 | }; | |
| 1624 | ssi4: ssi@4 { | |
| 1625 | interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; | |
| 1626 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; | |
| 1627 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1628 | }; | |
| 1629 | ssi5: ssi@5 { | |
| 1630 | interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; | |
| 1631 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; | |
| 1632 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1633 | }; | |
| 1634 | ssi6: ssi@6 { | |
| 1635 | interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; | |
| 1636 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; | |
| 1637 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1638 | }; | |
| 1639 | ssi7: ssi@7 { | |
| 1640 | interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; | |
| 1641 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; | |
| 1642 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1643 | }; | |
| 1644 | ssi8: ssi@8 { | |
| 1645 | interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; | |
| 1646 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; | |
| 1647 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1648 | }; | |
| 1649 | ssi9: ssi@9 { | |
| 1650 | interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; | |
| 1651 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; | |
| 1652 | dma-names = "rx", "tx", "rxu", "txu"; | |
| 1653 | }; | |
| 7df2fd57 KM |
1654 | }; |
| 1655 | }; | |
| 70496727 LP |
1656 | |
| 1657 | ipmmu_sy0: mmu@e6280000 { | |
| 1658 | compatible = "renesas,ipmmu-vmsa"; | |
| 1659 | reg = <0 0xe6280000 0 0x1000>; | |
| 1660 | interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, | |
| 1661 | <0 224 IRQ_TYPE_LEVEL_HIGH>; | |
| 1662 | #iommu-cells = <1>; | |
| 1663 | status = "disabled"; | |
| 1664 | }; | |
| 1665 | ||
| 1666 | ipmmu_sy1: mmu@e6290000 { | |
| 1667 | compatible = "renesas,ipmmu-vmsa"; | |
| 1668 | reg = <0 0xe6290000 0 0x1000>; | |
| 1669 | interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; | |
| 1670 | #iommu-cells = <1>; | |
| 1671 | status = "disabled"; | |
| 1672 | }; | |
| 1673 | ||
| 1674 | ipmmu_ds: mmu@e6740000 { | |
| 1675 | compatible = "renesas,ipmmu-vmsa"; | |
| 1676 | reg = <0 0xe6740000 0 0x1000>; | |
| 1677 | interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, | |
| 1678 | <0 199 IRQ_TYPE_LEVEL_HIGH>; | |
| 1679 | #iommu-cells = <1>; | |
| 1680 | status = "disabled"; | |
| 1681 | }; | |
| 1682 | ||
| 1683 | ipmmu_mp: mmu@ec680000 { | |
| 1684 | compatible = "renesas,ipmmu-vmsa"; | |
| 1685 | reg = <0 0xec680000 0 0x1000>; | |
| 1686 | interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; | |
| 1687 | #iommu-cells = <1>; | |
| 1688 | status = "disabled"; | |
| 1689 | }; | |
| 1690 | ||
| 1691 | ipmmu_mx: mmu@fe951000 { | |
| 1692 | compatible = "renesas,ipmmu-vmsa"; | |
| 1693 | reg = <0 0xfe951000 0 0x1000>; | |
| 1694 | interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, | |
| 1695 | <0 221 IRQ_TYPE_LEVEL_HIGH>; | |
| 1696 | #iommu-cells = <1>; | |
| 1697 | status = "disabled"; | |
| 1698 | }; | |
| 1699 | ||
| 1700 | ipmmu_rt: mmu@ffc80000 { | |
| 1701 | compatible = "renesas,ipmmu-vmsa"; | |
| 1702 | reg = <0 0xffc80000 0 0x1000>; | |
| 1703 | interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; | |
| 1704 | #iommu-cells = <1>; | |
| 1705 | status = "disabled"; | |
| 1706 | }; | |
| 0468b2d6 | 1707 | }; |