Commit | Line | Data |
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0d0771ab HN |
1 | /* |
2 | * Device Tree Source for the r8a7791 SoC | |
3 | * | |
118e4e6a | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
2e5d55ce SS |
5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
6 | * Copyright (C) 2014 Cogent Embedded Inc. | |
0d0771ab HN |
7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | |
9 | * version 2. This program is licensed "as is" without any warranty of any | |
10 | * kind, whether express or implied. | |
11 | */ | |
12 | ||
59e79895 | 13 | #include <dt-bindings/clock/r8a7791-clock.h> |
5f75e73c LP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
8574de86 | 16 | #include <dt-bindings/power/r8a7791-sysc.h> |
5f75e73c | 17 | |
0d0771ab HN |
18 | / { |
19 | compatible = "renesas,r8a7791"; | |
20 | interrupt-parent = <&gic>; | |
21 | #address-cells = <2>; | |
22 | #size-cells = <2>; | |
23 | ||
5bd3de7b WS |
24 | aliases { |
25 | i2c0 = &i2c0; | |
26 | i2c1 = &i2c1; | |
27 | i2c2 = &i2c2; | |
28 | i2c3 = &i2c3; | |
29 | i2c4 = &i2c4; | |
30 | i2c5 = &i2c5; | |
36408d9d WS |
31 | i2c6 = &i2c6; |
32 | i2c7 = &i2c7; | |
33 | i2c8 = &i2c8; | |
6f3e4ee3 | 34 | spi0 = &qspi; |
7713d3ab GU |
35 | spi1 = &msiof0; |
36 | spi2 = &msiof1; | |
37 | spi3 = &msiof2; | |
0b8d1d57 SS |
38 | vin0 = &vin0; |
39 | vin1 = &vin1; | |
40 | vin2 = &vin2; | |
5bd3de7b WS |
41 | }; |
42 | ||
0d0771ab HN |
43 | cpus { |
44 | #address-cells = <1>; | |
45 | #size-cells = <0>; | |
477cbcbd | 46 | enable-method = "renesas,apmu"; |
0d0771ab HN |
47 | |
48 | cpu0: cpu@0 { | |
49 | device_type = "cpu"; | |
50 | compatible = "arm,cortex-a15"; | |
51 | reg = <0>; | |
896b79df | 52 | clock-frequency = <1500000000>; |
a57004ec GI |
53 | voltage-tolerance = <1>; /* 1% */ |
54 | clocks = <&cpg_clocks R8A7791_CLK_Z>; | |
55 | clock-latency = <300000>; /* 300 us */ | |
8574de86 | 56 | power-domains = <&sysc R8A7791_PD_CA15_CPU0>; |
8ffe93a5 | 57 | next-level-cache = <&L2_CA15>; |
a57004ec GI |
58 | |
59 | /* kHz - uV - OPPs unknown yet */ | |
60 | operating-points = <1500000 1000000>, | |
61 | <1312500 1000000>, | |
62 | <1125000 1000000>, | |
63 | < 937500 1000000>, | |
64 | < 750000 1000000>, | |
65 | < 375000 1000000>; | |
0d0771ab | 66 | }; |
15ab426c MD |
67 | |
68 | cpu1: cpu@1 { | |
69 | device_type = "cpu"; | |
70 | compatible = "arm,cortex-a15"; | |
71 | reg = <1>; | |
896b79df | 72 | clock-frequency = <1500000000>; |
8574de86 | 73 | power-domains = <&sysc R8A7791_PD_CA15_CPU1>; |
8ffe93a5 | 74 | next-level-cache = <&L2_CA15>; |
15ab426c | 75 | }; |
6f9314ce GU |
76 | |
77 | L2_CA15: cache-controller@0 { | |
78 | compatible = "cache"; | |
79 | reg = <0>; | |
80 | power-domains = <&sysc R8A7791_PD_CA15_SCU>; | |
81 | cache-unified; | |
82 | cache-level = <2>; | |
83 | }; | |
0d0771ab HN |
84 | }; |
85 | ||
cac68a56 KM |
86 | thermal-zones { |
87 | cpu_thermal: cpu-thermal { | |
88 | polling-delay-passive = <0>; | |
89 | polling-delay = <0>; | |
90 | ||
91 | thermal-sensors = <&thermal>; | |
92 | ||
93 | trips { | |
94 | cpu-crit { | |
95 | temperature = <115000>; | |
96 | hysteresis = <0>; | |
97 | type = "critical"; | |
98 | }; | |
99 | }; | |
100 | cooling-maps { | |
101 | }; | |
102 | }; | |
103 | }; | |
104 | ||
477cbcbd MD |
105 | apmu@e6152000 { |
106 | compatible = "renesas,r8a7791-apmu", "renesas,apmu"; | |
107 | reg = <0 0xe6152000 0 0x188>; | |
108 | cpus = <&cpu0 &cpu1>; | |
109 | }; | |
110 | ||
0d0771ab | 111 | gic: interrupt-controller@f1001000 { |
d238b5e6 | 112 | compatible = "arm,gic-400"; |
0d0771ab HN |
113 | #interrupt-cells = <3>; |
114 | #address-cells = <0>; | |
115 | interrupt-controller; | |
116 | reg = <0 0xf1001000 0 0x1000>, | |
117 | <0 0xf1002000 0 0x1000>, | |
118 | <0 0xf1004000 0 0x2000>, | |
119 | <0 0xf1006000 0 0x2000>; | |
386a9291 | 120 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; |
0d0771ab | 121 | }; |
d77db73e | 122 | |
89fbba12 | 123 | gpio0: gpio@e6050000 { |
ab87e3fc | 124 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 125 | reg = <0 0xe6050000 0 0x50>; |
386a9291 | 126 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
127 | #gpio-cells = <2>; |
128 | gpio-controller; | |
129 | gpio-ranges = <&pfc 0 0 32>; | |
130 | #interrupt-cells = <2>; | |
131 | interrupt-controller; | |
4faf9c5e | 132 | clocks = <&mstp9_clks R8A7791_CLK_GPIO0>; |
5aa80650 | 133 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
134 | }; |
135 | ||
89fbba12 | 136 | gpio1: gpio@e6051000 { |
ab87e3fc | 137 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 138 | reg = <0 0xe6051000 0 0x50>; |
386a9291 | 139 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
140 | #gpio-cells = <2>; |
141 | gpio-controller; | |
1329f6d0 | 142 | gpio-ranges = <&pfc 0 32 26>; |
ab87e3fc MD |
143 | #interrupt-cells = <2>; |
144 | interrupt-controller; | |
4faf9c5e | 145 | clocks = <&mstp9_clks R8A7791_CLK_GPIO1>; |
5aa80650 | 146 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
147 | }; |
148 | ||
89fbba12 | 149 | gpio2: gpio@e6052000 { |
ab87e3fc | 150 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 151 | reg = <0 0xe6052000 0 0x50>; |
386a9291 | 152 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
153 | #gpio-cells = <2>; |
154 | gpio-controller; | |
155 | gpio-ranges = <&pfc 0 64 32>; | |
156 | #interrupt-cells = <2>; | |
157 | interrupt-controller; | |
4faf9c5e | 158 | clocks = <&mstp9_clks R8A7791_CLK_GPIO2>; |
5aa80650 | 159 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
160 | }; |
161 | ||
89fbba12 | 162 | gpio3: gpio@e6053000 { |
ab87e3fc | 163 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 164 | reg = <0 0xe6053000 0 0x50>; |
386a9291 | 165 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
166 | #gpio-cells = <2>; |
167 | gpio-controller; | |
168 | gpio-ranges = <&pfc 0 96 32>; | |
169 | #interrupt-cells = <2>; | |
170 | interrupt-controller; | |
4faf9c5e | 171 | clocks = <&mstp9_clks R8A7791_CLK_GPIO3>; |
5aa80650 | 172 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
173 | }; |
174 | ||
89fbba12 | 175 | gpio4: gpio@e6054000 { |
ab87e3fc | 176 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 177 | reg = <0 0xe6054000 0 0x50>; |
386a9291 | 178 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
179 | #gpio-cells = <2>; |
180 | gpio-controller; | |
181 | gpio-ranges = <&pfc 0 128 32>; | |
182 | #interrupt-cells = <2>; | |
183 | interrupt-controller; | |
4faf9c5e | 184 | clocks = <&mstp9_clks R8A7791_CLK_GPIO4>; |
5aa80650 | 185 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
186 | }; |
187 | ||
89fbba12 | 188 | gpio5: gpio@e6055000 { |
ab87e3fc | 189 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 190 | reg = <0 0xe6055000 0 0x50>; |
386a9291 | 191 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
192 | #gpio-cells = <2>; |
193 | gpio-controller; | |
194 | gpio-ranges = <&pfc 0 160 32>; | |
195 | #interrupt-cells = <2>; | |
196 | interrupt-controller; | |
4faf9c5e | 197 | clocks = <&mstp9_clks R8A7791_CLK_GPIO5>; |
5aa80650 | 198 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
199 | }; |
200 | ||
89fbba12 | 201 | gpio6: gpio@e6055400 { |
ab87e3fc | 202 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 203 | reg = <0 0xe6055400 0 0x50>; |
386a9291 | 204 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
205 | #gpio-cells = <2>; |
206 | gpio-controller; | |
207 | gpio-ranges = <&pfc 0 192 32>; | |
208 | #interrupt-cells = <2>; | |
209 | interrupt-controller; | |
4faf9c5e | 210 | clocks = <&mstp9_clks R8A7791_CLK_GPIO6>; |
5aa80650 | 211 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
212 | }; |
213 | ||
89fbba12 | 214 | gpio7: gpio@e6055800 { |
ab87e3fc | 215 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
89fbba12 | 216 | reg = <0 0xe6055800 0 0x50>; |
386a9291 | 217 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; |
ab87e3fc MD |
218 | #gpio-cells = <2>; |
219 | gpio-controller; | |
220 | gpio-ranges = <&pfc 0 224 26>; | |
221 | #interrupt-cells = <2>; | |
222 | interrupt-controller; | |
4faf9c5e | 223 | clocks = <&mstp9_clks R8A7791_CLK_GPIO7>; |
5aa80650 | 224 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ab87e3fc MD |
225 | }; |
226 | ||
cac68a56 KM |
227 | thermal: thermal@e61f0000 { |
228 | compatible = "renesas,thermal-r8a7791", | |
229 | "renesas,rcar-gen2-thermal", | |
230 | "renesas,rcar-thermal"; | |
d103f4d3 | 231 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; |
386a9291 | 232 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
563bc8eb | 233 | clocks = <&mstp5_clks R8A7791_CLK_THERMAL>; |
5aa80650 | 234 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
cac68a56 | 235 | #thermal-sensor-cells = <0>; |
d103f4d3 MD |
236 | }; |
237 | ||
03586acf MD |
238 | timer { |
239 | compatible = "arm,armv7-timer"; | |
386a9291 SH |
240 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
241 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
242 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
243 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
03586acf MD |
244 | }; |
245 | ||
ceaa1894 | 246 | cmt0: timer@ffca0000 { |
4217f323 | 247 | compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2"; |
ceaa1894 | 248 | reg = <0 0xffca0000 0 0x1004>; |
386a9291 SH |
249 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
250 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; | |
ceaa1894 LP |
251 | clocks = <&mstp1_clks R8A7791_CLK_CMT0>; |
252 | clock-names = "fck"; | |
5aa80650 | 253 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ceaa1894 LP |
254 | |
255 | renesas,channels-mask = <0x60>; | |
256 | ||
257 | status = "disabled"; | |
258 | }; | |
259 | ||
260 | cmt1: timer@e6130000 { | |
4217f323 | 261 | compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2"; |
ceaa1894 | 262 | reg = <0 0xe6130000 0 0x1004>; |
386a9291 SH |
263 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
264 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
265 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
266 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
267 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, | |
268 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
269 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, | |
270 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
ceaa1894 LP |
271 | clocks = <&mstp3_clks R8A7791_CLK_CMT1>; |
272 | clock-names = "fck"; | |
5aa80650 | 273 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
ceaa1894 LP |
274 | |
275 | renesas,channels-mask = <0xff>; | |
276 | ||
277 | status = "disabled"; | |
278 | }; | |
279 | ||
d77db73e | 280 | irqc0: interrupt-controller@e61c0000 { |
26041b06 | 281 | compatible = "renesas,irqc-r8a7791", "renesas,irqc"; |
d77db73e MD |
282 | #interrupt-cells = <2>; |
283 | interrupt-controller; | |
284 | reg = <0 0xe61c0000 0 0x200>; | |
386a9291 SH |
285 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
286 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | |
287 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | |
288 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, | |
289 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, | |
290 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, | |
291 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, | |
292 | <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, | |
293 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, | |
294 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
62d386c0 | 295 | clocks = <&mstp4_clks R8A7791_CLK_IRQC>; |
5aa80650 | 296 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
d77db73e | 297 | }; |
55146927 | 298 | |
fde8feef | 299 | dmac0: dma-controller@e6700000 { |
e6d12b49 | 300 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
fde8feef | 301 | reg = <0 0xe6700000 0 0x20000>; |
386a9291 SH |
302 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
303 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
304 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
305 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
306 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
307 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
308 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
309 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
310 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
311 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
312 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
313 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
314 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
315 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
316 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
317 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; | |
fde8feef LP |
318 | interrupt-names = "error", |
319 | "ch0", "ch1", "ch2", "ch3", | |
320 | "ch4", "ch5", "ch6", "ch7", | |
321 | "ch8", "ch9", "ch10", "ch11", | |
322 | "ch12", "ch13", "ch14"; | |
323 | clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>; | |
324 | clock-names = "fck"; | |
5aa80650 | 325 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
fde8feef LP |
326 | #dma-cells = <1>; |
327 | dma-channels = <15>; | |
328 | }; | |
329 | ||
330 | dmac1: dma-controller@e6720000 { | |
e6d12b49 | 331 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
fde8feef | 332 | reg = <0 0xe6720000 0 0x20000>; |
386a9291 SH |
333 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
334 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
335 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
336 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
337 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
338 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
339 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
340 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
341 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
342 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
343 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
344 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
345 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
346 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
347 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
348 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; | |
fde8feef LP |
349 | interrupt-names = "error", |
350 | "ch0", "ch1", "ch2", "ch3", | |
351 | "ch4", "ch5", "ch6", "ch7", | |
352 | "ch8", "ch9", "ch10", "ch11", | |
353 | "ch12", "ch13", "ch14"; | |
354 | clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>; | |
355 | clock-names = "fck"; | |
5aa80650 | 356 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
fde8feef LP |
357 | #dma-cells = <1>; |
358 | dma-channels = <15>; | |
359 | }; | |
360 | ||
8994fff6 | 361 | audma0: dma-controller@ec700000 { |
e6d12b49 | 362 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
8994fff6 | 363 | reg = <0 0xec700000 0 0x10000>; |
386a9291 SH |
364 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
365 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
366 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
367 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
368 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
369 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
370 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
371 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
372 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
373 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
374 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
375 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
376 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
377 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; | |
8994fff6 KM |
378 | interrupt-names = "error", |
379 | "ch0", "ch1", "ch2", "ch3", | |
380 | "ch4", "ch5", "ch6", "ch7", | |
381 | "ch8", "ch9", "ch10", "ch11", | |
382 | "ch12"; | |
383 | clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>; | |
384 | clock-names = "fck"; | |
5aa80650 | 385 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
8994fff6 KM |
386 | #dma-cells = <1>; |
387 | dma-channels = <13>; | |
388 | }; | |
389 | ||
390 | audma1: dma-controller@ec720000 { | |
e6d12b49 | 391 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
8994fff6 | 392 | reg = <0 0xec720000 0 0x10000>; |
386a9291 SH |
393 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
394 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
395 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
396 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH | |
397 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
398 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
399 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
400 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
401 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
402 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
403 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
404 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
405 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
406 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; | |
8994fff6 KM |
407 | interrupt-names = "error", |
408 | "ch0", "ch1", "ch2", "ch3", | |
409 | "ch4", "ch5", "ch6", "ch7", | |
410 | "ch8", "ch9", "ch10", "ch11", | |
411 | "ch12"; | |
412 | clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>; | |
413 | clock-names = "fck"; | |
5aa80650 | 414 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
8994fff6 KM |
415 | #dma-cells = <1>; |
416 | dma-channels = <13>; | |
417 | }; | |
418 | ||
e3e25edc | 419 | usb_dmac0: dma-controller@e65a0000 { |
d01c8bec | 420 | compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; |
e3e25edc | 421 | reg = <0 0xe65a0000 0 0x100>; |
386a9291 SH |
422 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
423 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
e3e25edc YS |
424 | interrupt-names = "ch0", "ch1"; |
425 | clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>; | |
5aa80650 | 426 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
e3e25edc YS |
427 | #dma-cells = <1>; |
428 | dma-channels = <2>; | |
429 | }; | |
430 | ||
431 | usb_dmac1: dma-controller@e65b0000 { | |
d01c8bec | 432 | compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; |
e3e25edc | 433 | reg = <0 0xe65b0000 0 0x100>; |
386a9291 SH |
434 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
435 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
e3e25edc YS |
436 | interrupt-names = "ch0", "ch1"; |
437 | clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>; | |
5aa80650 | 438 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
e3e25edc YS |
439 | #dma-cells = <1>; |
440 | dma-channels = <2>; | |
441 | }; | |
442 | ||
36408d9d | 443 | /* The memory map in the User's Manual maps the cores to bus numbers */ |
5bd3de7b WS |
444 | i2c0: i2c@e6508000 { |
445 | #address-cells = <1>; | |
446 | #size-cells = <0>; | |
447 | compatible = "renesas,i2c-r8a7791"; | |
448 | reg = <0 0xe6508000 0 0x40>; | |
386a9291 | 449 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
5bd3de7b | 450 | clocks = <&mstp9_clks R8A7791_CLK_I2C0>; |
5aa80650 | 451 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
49160dc1 | 452 | i2c-scl-internal-delay-ns = <6>; |
5bd3de7b WS |
453 | status = "disabled"; |
454 | }; | |
455 | ||
456 | i2c1: i2c@e6518000 { | |
457 | #address-cells = <1>; | |
458 | #size-cells = <0>; | |
459 | compatible = "renesas,i2c-r8a7791"; | |
460 | reg = <0 0xe6518000 0 0x40>; | |
386a9291 | 461 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
5bd3de7b | 462 | clocks = <&mstp9_clks R8A7791_CLK_I2C1>; |
5aa80650 | 463 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
49160dc1 | 464 | i2c-scl-internal-delay-ns = <6>; |
5bd3de7b WS |
465 | status = "disabled"; |
466 | }; | |
467 | ||
468 | i2c2: i2c@e6530000 { | |
469 | #address-cells = <1>; | |
470 | #size-cells = <0>; | |
471 | compatible = "renesas,i2c-r8a7791"; | |
472 | reg = <0 0xe6530000 0 0x40>; | |
386a9291 | 473 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
5bd3de7b | 474 | clocks = <&mstp9_clks R8A7791_CLK_I2C2>; |
5aa80650 | 475 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
49160dc1 | 476 | i2c-scl-internal-delay-ns = <6>; |
5bd3de7b WS |
477 | status = "disabled"; |
478 | }; | |
479 | ||
480 | i2c3: i2c@e6540000 { | |
481 | #address-cells = <1>; | |
482 | #size-cells = <0>; | |
483 | compatible = "renesas,i2c-r8a7791"; | |
484 | reg = <0 0xe6540000 0 0x40>; | |
386a9291 | 485 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
5bd3de7b | 486 | clocks = <&mstp9_clks R8A7791_CLK_I2C3>; |
5aa80650 | 487 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
49160dc1 | 488 | i2c-scl-internal-delay-ns = <6>; |
5bd3de7b WS |
489 | status = "disabled"; |
490 | }; | |
491 | ||
492 | i2c4: i2c@e6520000 { | |
493 | #address-cells = <1>; | |
494 | #size-cells = <0>; | |
495 | compatible = "renesas,i2c-r8a7791"; | |
496 | reg = <0 0xe6520000 0 0x40>; | |
386a9291 | 497 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
5bd3de7b | 498 | clocks = <&mstp9_clks R8A7791_CLK_I2C4>; |
5aa80650 | 499 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
49160dc1 | 500 | i2c-scl-internal-delay-ns = <6>; |
5bd3de7b WS |
501 | status = "disabled"; |
502 | }; | |
503 | ||
504 | i2c5: i2c@e6528000 { | |
36408d9d | 505 | /* doesn't need pinmux */ |
5bd3de7b WS |
506 | #address-cells = <1>; |
507 | #size-cells = <0>; | |
508 | compatible = "renesas,i2c-r8a7791"; | |
509 | reg = <0 0xe6528000 0 0x40>; | |
386a9291 | 510 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
5bd3de7b | 511 | clocks = <&mstp9_clks R8A7791_CLK_I2C5>; |
5aa80650 | 512 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
49160dc1 | 513 | i2c-scl-internal-delay-ns = <110>; |
5bd3de7b WS |
514 | status = "disabled"; |
515 | }; | |
516 | ||
36408d9d WS |
517 | i2c6: i2c@e60b0000 { |
518 | /* doesn't need pinmux */ | |
519 | #address-cells = <1>; | |
520 | #size-cells = <0>; | |
521 | compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; | |
522 | reg = <0 0xe60b0000 0 0x425>; | |
386a9291 | 523 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
36408d9d | 524 | clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; |
4aed4c9f NS |
525 | dmas = <&dmac0 0x77>, <&dmac0 0x78>, |
526 | <&dmac1 0x77>, <&dmac1 0x78>; | |
527 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 528 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
36408d9d WS |
529 | status = "disabled"; |
530 | }; | |
531 | ||
532 | i2c7: i2c@e6500000 { | |
533 | #address-cells = <1>; | |
534 | #size-cells = <0>; | |
535 | compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; | |
536 | reg = <0 0xe6500000 0 0x425>; | |
386a9291 | 537 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
36408d9d | 538 | clocks = <&mstp3_clks R8A7791_CLK_IIC0>; |
4aed4c9f NS |
539 | dmas = <&dmac0 0x61>, <&dmac0 0x62>, |
540 | <&dmac1 0x61>, <&dmac1 0x62>; | |
541 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 542 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
36408d9d WS |
543 | status = "disabled"; |
544 | }; | |
545 | ||
546 | i2c8: i2c@e6510000 { | |
547 | #address-cells = <1>; | |
548 | #size-cells = <0>; | |
549 | compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; | |
550 | reg = <0 0xe6510000 0 0x425>; | |
386a9291 | 551 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
36408d9d | 552 | clocks = <&mstp3_clks R8A7791_CLK_IIC1>; |
4aed4c9f NS |
553 | dmas = <&dmac0 0x65>, <&dmac0 0x66>, |
554 | <&dmac1 0x65>, <&dmac1 0x66>; | |
555 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 556 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
36408d9d WS |
557 | status = "disabled"; |
558 | }; | |
559 | ||
55146927 MD |
560 | pfc: pfc@e6060000 { |
561 | compatible = "renesas,pfc-r8a7791"; | |
562 | reg = <0 0xe6060000 0 0x250>; | |
55146927 | 563 | }; |
59e79895 | 564 | |
8edae499 LP |
565 | mmcif0: mmc@ee200000 { |
566 | compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif"; | |
567 | reg = <0 0xee200000 0 0x80>; | |
386a9291 | 568 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
8edae499 | 569 | clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>; |
4aed4c9f NS |
570 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, |
571 | <&dmac1 0xd1>, <&dmac1 0xd2>; | |
572 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 573 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
8edae499 LP |
574 | reg-io-width = <4>; |
575 | status = "disabled"; | |
d957ab8d | 576 | max-frequency = <97500000>; |
8edae499 LP |
577 | }; |
578 | ||
b7ed8a0d MD |
579 | sdhi0: sd@ee100000 { |
580 | compatible = "renesas,sdhi-r8a7791"; | |
e849b065 | 581 | reg = <0 0xee100000 0 0x328>; |
386a9291 | 582 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
b7ed8a0d | 583 | clocks = <&mstp3_clks R8A7791_CLK_SDHI0>; |
4aed4c9f NS |
584 | dmas = <&dmac0 0xcd>, <&dmac0 0xce>, |
585 | <&dmac1 0xcd>, <&dmac1 0xce>; | |
586 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 587 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
b7ed8a0d MD |
588 | status = "disabled"; |
589 | }; | |
590 | ||
591 | sdhi1: sd@ee140000 { | |
592 | compatible = "renesas,sdhi-r8a7791"; | |
593 | reg = <0 0xee140000 0 0x100>; | |
386a9291 | 594 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
b7ed8a0d | 595 | clocks = <&mstp3_clks R8A7791_CLK_SDHI1>; |
4aed4c9f NS |
596 | dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, |
597 | <&dmac1 0xc1>, <&dmac1 0xc2>; | |
598 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 599 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
b7ed8a0d MD |
600 | status = "disabled"; |
601 | }; | |
602 | ||
603 | sdhi2: sd@ee160000 { | |
604 | compatible = "renesas,sdhi-r8a7791"; | |
605 | reg = <0 0xee160000 0 0x100>; | |
386a9291 | 606 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
b7ed8a0d | 607 | clocks = <&mstp3_clks R8A7791_CLK_SDHI2>; |
4aed4c9f NS |
608 | dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, |
609 | <&dmac1 0xd3>, <&dmac1 0xd4>; | |
610 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 611 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
b7ed8a0d MD |
612 | status = "disabled"; |
613 | }; | |
614 | ||
9640cf25 | 615 | scifa0: serial@e6c40000 { |
b5b52dd7 GU |
616 | compatible = "renesas,scifa-r8a7791", |
617 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
9640cf25 | 618 | reg = <0 0xe6c40000 0 64>; |
386a9291 | 619 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 620 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; |
bb7ca195 | 621 | clock-names = "fck"; |
4aed4c9f NS |
622 | dmas = <&dmac0 0x21>, <&dmac0 0x22>, |
623 | <&dmac1 0x21>, <&dmac1 0x22>; | |
624 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 625 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
626 | status = "disabled"; |
627 | }; | |
628 | ||
629 | scifa1: serial@e6c50000 { | |
b5b52dd7 GU |
630 | compatible = "renesas,scifa-r8a7791", |
631 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
9640cf25 | 632 | reg = <0 0xe6c50000 0 64>; |
386a9291 | 633 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 634 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; |
bb7ca195 | 635 | clock-names = "fck"; |
4aed4c9f NS |
636 | dmas = <&dmac0 0x25>, <&dmac0 0x26>, |
637 | <&dmac1 0x25>, <&dmac1 0x26>; | |
638 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 639 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
640 | status = "disabled"; |
641 | }; | |
642 | ||
643 | scifa2: serial@e6c60000 { | |
b5b52dd7 GU |
644 | compatible = "renesas,scifa-r8a7791", |
645 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
9640cf25 | 646 | reg = <0 0xe6c60000 0 64>; |
386a9291 | 647 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 648 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; |
bb7ca195 | 649 | clock-names = "fck"; |
4aed4c9f NS |
650 | dmas = <&dmac0 0x27>, <&dmac0 0x28>, |
651 | <&dmac1 0x27>, <&dmac1 0x28>; | |
652 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 653 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
654 | status = "disabled"; |
655 | }; | |
656 | ||
657 | scifa3: serial@e6c70000 { | |
b5b52dd7 GU |
658 | compatible = "renesas,scifa-r8a7791", |
659 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
9640cf25 | 660 | reg = <0 0xe6c70000 0 64>; |
386a9291 | 661 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 662 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; |
bb7ca195 | 663 | clock-names = "fck"; |
4aed4c9f NS |
664 | dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, |
665 | <&dmac1 0x1b>, <&dmac1 0x1c>; | |
666 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 667 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
668 | status = "disabled"; |
669 | }; | |
670 | ||
671 | scifa4: serial@e6c78000 { | |
b5b52dd7 GU |
672 | compatible = "renesas,scifa-r8a7791", |
673 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
9640cf25 | 674 | reg = <0 0xe6c78000 0 64>; |
386a9291 | 675 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 676 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; |
bb7ca195 | 677 | clock-names = "fck"; |
4aed4c9f NS |
678 | dmas = <&dmac0 0x1f>, <&dmac0 0x20>, |
679 | <&dmac1 0x1f>, <&dmac1 0x20>; | |
680 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 681 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
682 | status = "disabled"; |
683 | }; | |
684 | ||
685 | scifa5: serial@e6c80000 { | |
b5b52dd7 GU |
686 | compatible = "renesas,scifa-r8a7791", |
687 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
9640cf25 | 688 | reg = <0 0xe6c80000 0 64>; |
386a9291 | 689 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 690 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; |
bb7ca195 | 691 | clock-names = "fck"; |
4aed4c9f NS |
692 | dmas = <&dmac0 0x23>, <&dmac0 0x24>, |
693 | <&dmac1 0x23>, <&dmac1 0x24>; | |
694 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 695 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
696 | status = "disabled"; |
697 | }; | |
698 | ||
699 | scifb0: serial@e6c20000 { | |
b5b52dd7 GU |
700 | compatible = "renesas,scifb-r8a7791", |
701 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
9640cf25 | 702 | reg = <0 0xe6c20000 0 64>; |
386a9291 | 703 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 704 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; |
bb7ca195 | 705 | clock-names = "fck"; |
4aed4c9f NS |
706 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, |
707 | <&dmac1 0x3d>, <&dmac1 0x3e>; | |
708 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 709 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
710 | status = "disabled"; |
711 | }; | |
712 | ||
713 | scifb1: serial@e6c30000 { | |
b5b52dd7 GU |
714 | compatible = "renesas,scifb-r8a7791", |
715 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
9640cf25 | 716 | reg = <0 0xe6c30000 0 64>; |
386a9291 | 717 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 718 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; |
bb7ca195 | 719 | clock-names = "fck"; |
4aed4c9f NS |
720 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>, |
721 | <&dmac1 0x19>, <&dmac1 0x1a>; | |
722 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 723 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
724 | status = "disabled"; |
725 | }; | |
726 | ||
727 | scifb2: serial@e6ce0000 { | |
b5b52dd7 GU |
728 | compatible = "renesas,scifb-r8a7791", |
729 | "renesas,rcar-gen2-scifb", "renesas,scifb"; | |
9640cf25 | 730 | reg = <0 0xe6ce0000 0 64>; |
386a9291 | 731 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
9640cf25 | 732 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; |
bb7ca195 | 733 | clock-names = "fck"; |
4aed4c9f NS |
734 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, |
735 | <&dmac1 0x1d>, <&dmac1 0x1e>; | |
736 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 737 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
738 | status = "disabled"; |
739 | }; | |
740 | ||
741 | scif0: serial@e6e60000 { | |
b5b52dd7 GU |
742 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
743 | "renesas,scif"; | |
9640cf25 | 744 | reg = <0 0xe6e60000 0 64>; |
386a9291 | 745 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
746 | clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>, |
747 | <&scif_clk>; | |
748 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
749 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>, |
750 | <&dmac1 0x29>, <&dmac1 0x2a>; | |
751 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 752 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
753 | status = "disabled"; |
754 | }; | |
755 | ||
756 | scif1: serial@e6e68000 { | |
b5b52dd7 GU |
757 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
758 | "renesas,scif"; | |
9640cf25 | 759 | reg = <0 0xe6e68000 0 64>; |
386a9291 | 760 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
761 | clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>, |
762 | <&scif_clk>; | |
763 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
764 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, |
765 | <&dmac1 0x2d>, <&dmac1 0x2e>; | |
766 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 767 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
768 | status = "disabled"; |
769 | }; | |
770 | ||
771 | scif2: serial@e6e58000 { | |
b5b52dd7 GU |
772 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
773 | "renesas,scif"; | |
9640cf25 | 774 | reg = <0 0xe6e58000 0 64>; |
386a9291 | 775 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
776 | clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>, |
777 | <&scif_clk>; | |
778 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
779 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, |
780 | <&dmac1 0x2b>, <&dmac1 0x2c>; | |
781 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 782 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
783 | status = "disabled"; |
784 | }; | |
785 | ||
786 | scif3: serial@e6ea8000 { | |
b5b52dd7 GU |
787 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
788 | "renesas,scif"; | |
9640cf25 | 789 | reg = <0 0xe6ea8000 0 64>; |
386a9291 | 790 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
791 | clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>, |
792 | <&scif_clk>; | |
793 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
794 | dmas = <&dmac0 0x2f>, <&dmac0 0x30>, |
795 | <&dmac1 0x2f>, <&dmac1 0x30>; | |
796 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 797 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
798 | status = "disabled"; |
799 | }; | |
800 | ||
801 | scif4: serial@e6ee0000 { | |
b5b52dd7 GU |
802 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
803 | "renesas,scif"; | |
9640cf25 | 804 | reg = <0 0xe6ee0000 0 64>; |
386a9291 | 805 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
806 | clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>, |
807 | <&scif_clk>; | |
808 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
809 | dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, |
810 | <&dmac1 0xfb>, <&dmac1 0xfc>; | |
811 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 812 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
813 | status = "disabled"; |
814 | }; | |
815 | ||
816 | scif5: serial@e6ee8000 { | |
b5b52dd7 GU |
817 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
818 | "renesas,scif"; | |
9640cf25 | 819 | reg = <0 0xe6ee8000 0 64>; |
386a9291 | 820 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
821 | clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>, |
822 | <&scif_clk>; | |
823 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
824 | dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, |
825 | <&dmac1 0xfd>, <&dmac1 0xfe>; | |
826 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 827 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
828 | status = "disabled"; |
829 | }; | |
830 | ||
831 | hscif0: serial@e62c0000 { | |
b5b52dd7 GU |
832 | compatible = "renesas,hscif-r8a7791", |
833 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
9640cf25 | 834 | reg = <0 0xe62c0000 0 96>; |
386a9291 | 835 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
836 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>, |
837 | <&scif_clk>; | |
838 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
839 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>, |
840 | <&dmac1 0x39>, <&dmac1 0x3a>; | |
841 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 842 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
843 | status = "disabled"; |
844 | }; | |
845 | ||
846 | hscif1: serial@e62c8000 { | |
b5b52dd7 GU |
847 | compatible = "renesas,hscif-r8a7791", |
848 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
9640cf25 | 849 | reg = <0 0xe62c8000 0 96>; |
386a9291 | 850 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
851 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>, |
852 | <&scif_clk>; | |
853 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
854 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, |
855 | <&dmac1 0x4d>, <&dmac1 0x4e>; | |
856 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 857 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
858 | status = "disabled"; |
859 | }; | |
860 | ||
861 | hscif2: serial@e62d0000 { | |
b5b52dd7 GU |
862 | compatible = "renesas,hscif-r8a7791", |
863 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | |
9640cf25 | 864 | reg = <0 0xe62d0000 0 96>; |
386a9291 | 865 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
394730a1 GU |
866 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>, |
867 | <&scif_clk>; | |
868 | clock-names = "fck", "brg_int", "scif_clk"; | |
4aed4c9f NS |
869 | dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, |
870 | <&dmac1 0x3b>, <&dmac1 0x3c>; | |
871 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 872 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
9640cf25 LP |
873 | status = "disabled"; |
874 | }; | |
875 | ||
2e5d55ce SS |
876 | ether: ethernet@ee700000 { |
877 | compatible = "renesas,ether-r8a7791"; | |
878 | reg = <0 0xee700000 0 0x400>; | |
386a9291 | 879 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
2e5d55ce | 880 | clocks = <&mstp8_clks R8A7791_CLK_ETHER>; |
5aa80650 | 881 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
2e5d55ce SS |
882 | phy-mode = "rmii"; |
883 | #address-cells = <1>; | |
884 | #size-cells = <0>; | |
885 | status = "disabled"; | |
886 | }; | |
887 | ||
46ece349 SS |
888 | avb: ethernet@e6800000 { |
889 | compatible = "renesas,etheravb-r8a7791", | |
890 | "renesas,etheravb-rcar-gen2"; | |
891 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; | |
386a9291 | 892 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
46ece349 | 893 | clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>; |
5aa80650 | 894 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
46ece349 SS |
895 | #address-cells = <1>; |
896 | #size-cells = <0>; | |
897 | status = "disabled"; | |
898 | }; | |
899 | ||
b8532c69 VB |
900 | sata0: sata@ee300000 { |
901 | compatible = "renesas,sata-r8a7791"; | |
902 | reg = <0 0xee300000 0 0x2000>; | |
386a9291 | 903 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
b8532c69 | 904 | clocks = <&mstp8_clks R8A7791_CLK_SATA0>; |
5aa80650 | 905 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
b8532c69 VB |
906 | status = "disabled"; |
907 | }; | |
908 | ||
909 | sata1: sata@ee500000 { | |
910 | compatible = "renesas,sata-r8a7791"; | |
911 | reg = <0 0xee500000 0 0x2000>; | |
386a9291 | 912 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
b8532c69 | 913 | clocks = <&mstp8_clks R8A7791_CLK_SATA1>; |
5aa80650 | 914 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
b8532c69 VB |
915 | status = "disabled"; |
916 | }; | |
917 | ||
1c1fee7c | 918 | hsusb: usb@e6590000 { |
8cf1d454 | 919 | compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs"; |
1c1fee7c | 920 | reg = <0 0xe6590000 0 0x100>; |
386a9291 | 921 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
1c1fee7c | 922 | clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; |
7706993e YS |
923 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
924 | <&usb_dmac1 0>, <&usb_dmac1 1>; | |
925 | dma-names = "ch0", "ch1", "ch2", "ch3"; | |
5aa80650 | 926 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
797a0626 GU |
927 | renesas,buswait = <4>; |
928 | phys = <&usb0 1>; | |
929 | phy-names = "usb"; | |
1c1fee7c YS |
930 | status = "disabled"; |
931 | }; | |
932 | ||
3b7e530d SS |
933 | usbphy: usb-phy@e6590100 { |
934 | compatible = "renesas,usb-phy-r8a7791"; | |
935 | reg = <0 0xe6590100 0 0x100>; | |
936 | #address-cells = <1>; | |
937 | #size-cells = <0>; | |
938 | clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; | |
939 | clock-names = "usbhs"; | |
5aa80650 | 940 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
3b7e530d SS |
941 | status = "disabled"; |
942 | ||
943 | usb0: usb-channel@0 { | |
944 | reg = <0>; | |
945 | #phy-cells = <1>; | |
946 | }; | |
947 | usb2: usb-channel@2 { | |
948 | reg = <2>; | |
949 | #phy-cells = <1>; | |
950 | }; | |
951 | }; | |
952 | ||
0b8d1d57 SS |
953 | vin0: video@e6ef0000 { |
954 | compatible = "renesas,vin-r8a7791"; | |
0b8d1d57 | 955 | reg = <0 0xe6ef0000 0 0x1000>; |
386a9291 | 956 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
797a0626 | 957 | clocks = <&mstp8_clks R8A7791_CLK_VIN0>; |
5aa80650 | 958 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
0b8d1d57 SS |
959 | status = "disabled"; |
960 | }; | |
961 | ||
962 | vin1: video@e6ef1000 { | |
963 | compatible = "renesas,vin-r8a7791"; | |
0b8d1d57 | 964 | reg = <0 0xe6ef1000 0 0x1000>; |
386a9291 | 965 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
797a0626 | 966 | clocks = <&mstp8_clks R8A7791_CLK_VIN1>; |
5aa80650 | 967 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
0b8d1d57 SS |
968 | status = "disabled"; |
969 | }; | |
970 | ||
971 | vin2: video@e6ef2000 { | |
972 | compatible = "renesas,vin-r8a7791"; | |
0b8d1d57 | 973 | reg = <0 0xe6ef2000 0 0x1000>; |
386a9291 | 974 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
797a0626 | 975 | clocks = <&mstp8_clks R8A7791_CLK_VIN2>; |
5aa80650 | 976 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
0b8d1d57 SS |
977 | status = "disabled"; |
978 | }; | |
979 | ||
8eefac2d LP |
980 | vsp1@fe928000 { |
981 | compatible = "renesas,vsp1"; | |
982 | reg = <0 0xfe928000 0 0x8000>; | |
386a9291 | 983 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
8eefac2d | 984 | clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>; |
5aa80650 | 985 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
8eefac2d LP |
986 | |
987 | renesas,has-lut; | |
988 | renesas,has-sru; | |
989 | renesas,#rpf = <5>; | |
990 | renesas,#uds = <3>; | |
991 | renesas,#wpf = <4>; | |
992 | }; | |
993 | ||
994 | vsp1@fe930000 { | |
995 | compatible = "renesas,vsp1"; | |
996 | reg = <0 0xfe930000 0 0x8000>; | |
386a9291 | 997 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
8eefac2d | 998 | clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>; |
5aa80650 | 999 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
8eefac2d LP |
1000 | |
1001 | renesas,has-lif; | |
1002 | renesas,has-lut; | |
1003 | renesas,#rpf = <4>; | |
1004 | renesas,#uds = <1>; | |
1005 | renesas,#wpf = <4>; | |
1006 | }; | |
1007 | ||
1008 | vsp1@fe938000 { | |
1009 | compatible = "renesas,vsp1"; | |
1010 | reg = <0 0xfe938000 0 0x8000>; | |
386a9291 | 1011 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
8eefac2d | 1012 | clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>; |
5aa80650 | 1013 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
8eefac2d LP |
1014 | |
1015 | renesas,has-lif; | |
1016 | renesas,has-lut; | |
1017 | renesas,#rpf = <4>; | |
1018 | renesas,#uds = <1>; | |
1019 | renesas,#wpf = <4>; | |
1020 | }; | |
1021 | ||
1022 | du: display@feb00000 { | |
1023 | compatible = "renesas,du-r8a7791"; | |
1024 | reg = <0 0xfeb00000 0 0x40000>, | |
1025 | <0 0xfeb90000 0 0x1c>; | |
1026 | reg-names = "du", "lvds.0"; | |
386a9291 SH |
1027 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
1028 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; | |
8eefac2d LP |
1029 | clocks = <&mstp7_clks R8A7791_CLK_DU0>, |
1030 | <&mstp7_clks R8A7791_CLK_DU1>, | |
1031 | <&mstp7_clks R8A7791_CLK_LVDS0>; | |
1032 | clock-names = "du.0", "du.1", "lvds.0"; | |
1033 | status = "disabled"; | |
1034 | ||
1035 | ports { | |
1036 | #address-cells = <1>; | |
1037 | #size-cells = <0>; | |
1038 | ||
1039 | port@0 { | |
1040 | reg = <0>; | |
1041 | du_out_rgb: endpoint { | |
1042 | }; | |
1043 | }; | |
1044 | port@1 { | |
1045 | reg = <1>; | |
1046 | du_out_lvds0: endpoint { | |
1047 | }; | |
1048 | }; | |
1049 | }; | |
1050 | }; | |
1051 | ||
3cf01884 | 1052 | can0: can@e6e80000 { |
73ae9cfe | 1053 | compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; |
3cf01884 | 1054 | reg = <0 0xe6e80000 0 0x1000>; |
386a9291 | 1055 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
3cf01884 SS |
1056 | clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, |
1057 | <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; | |
1058 | clock-names = "clkp1", "clkp2", "can_clk"; | |
5aa80650 | 1059 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
3cf01884 SS |
1060 | status = "disabled"; |
1061 | }; | |
1062 | ||
1063 | can1: can@e6e88000 { | |
73ae9cfe | 1064 | compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; |
3cf01884 | 1065 | reg = <0 0xe6e88000 0 0x1000>; |
386a9291 | 1066 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
3cf01884 SS |
1067 | clocks = <&mstp9_clks R8A7791_CLK_RCAN1>, |
1068 | <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; | |
1069 | clock-names = "clkp1", "clkp2", "can_clk"; | |
5aa80650 | 1070 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
3cf01884 SS |
1071 | status = "disabled"; |
1072 | }; | |
1073 | ||
0caa3660 | 1074 | jpu: jpeg-codec@fe980000 { |
803f7e0b | 1075 | compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu"; |
0caa3660 | 1076 | reg = <0 0xfe980000 0 0x10300>; |
386a9291 | 1077 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
0caa3660 | 1078 | clocks = <&mstp1_clks R8A7791_CLK_JPU>; |
5aa80650 | 1079 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
0caa3660 MU |
1080 | }; |
1081 | ||
59e79895 LP |
1082 | clocks { |
1083 | #address-cells = <2>; | |
1084 | #size-cells = <2>; | |
1085 | ranges; | |
1086 | ||
1087 | /* External root clock */ | |
f617604f | 1088 | extal_clk: extal { |
59e79895 LP |
1089 | compatible = "fixed-clock"; |
1090 | #clock-cells = <0>; | |
1091 | /* This value must be overriden by the board. */ | |
1092 | clock-frequency = <0>; | |
59e79895 LP |
1093 | }; |
1094 | ||
0d3dbde8 KM |
1095 | /* |
1096 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by | |
1097 | * default. Boards that provide audio clocks should override them. | |
1098 | */ | |
1099 | audio_clk_a: audio_clk_a { | |
1100 | compatible = "fixed-clock"; | |
1101 | #clock-cells = <0>; | |
1102 | clock-frequency = <0>; | |
0d3dbde8 KM |
1103 | }; |
1104 | audio_clk_b: audio_clk_b { | |
1105 | compatible = "fixed-clock"; | |
1106 | #clock-cells = <0>; | |
1107 | clock-frequency = <0>; | |
0d3dbde8 KM |
1108 | }; |
1109 | audio_clk_c: audio_clk_c { | |
1110 | compatible = "fixed-clock"; | |
1111 | #clock-cells = <0>; | |
1112 | clock-frequency = <0>; | |
0d3dbde8 KM |
1113 | }; |
1114 | ||
66c405e7 | 1115 | /* External PCIe clock - can be overridden by the board */ |
f617604f | 1116 | pcie_bus_clk: pcie_bus { |
66c405e7 PE |
1117 | compatible = "fixed-clock"; |
1118 | #clock-cells = <0>; | |
ac6908b3 | 1119 | clock-frequency = <0>; |
66c405e7 PE |
1120 | }; |
1121 | ||
394730a1 GU |
1122 | /* External SCIF clock */ |
1123 | scif_clk: scif { | |
1124 | compatible = "fixed-clock"; | |
1125 | #clock-cells = <0>; | |
1126 | /* This value must be overridden by the board. */ | |
1127 | clock-frequency = <0>; | |
394730a1 GU |
1128 | }; |
1129 | ||
b324252c | 1130 | /* External USB clock - can be overridden by the board */ |
f617604f | 1131 | usb_extal_clk: usb_extal { |
b324252c SS |
1132 | compatible = "fixed-clock"; |
1133 | #clock-cells = <0>; | |
1134 | clock-frequency = <48000000>; | |
b324252c SS |
1135 | }; |
1136 | ||
1137 | /* External CAN clock */ | |
1138 | can_clk: can_clk { | |
1139 | compatible = "fixed-clock"; | |
1140 | #clock-cells = <0>; | |
1141 | /* This value must be overridden by the board. */ | |
1142 | clock-frequency = <0>; | |
b324252c SS |
1143 | }; |
1144 | ||
59e79895 LP |
1145 | /* Special CPG clocks */ |
1146 | cpg_clocks: cpg_clocks@e6150000 { | |
1147 | compatible = "renesas,r8a7791-cpg-clocks", | |
1148 | "renesas,rcar-gen2-cpg-clocks"; | |
1149 | reg = <0 0xe6150000 0 0x1000>; | |
b324252c | 1150 | clocks = <&extal_clk &usb_extal_clk>; |
59e79895 LP |
1151 | #clock-cells = <1>; |
1152 | clock-output-names = "main", "pll0", "pll1", "pll3", | |
b324252c | 1153 | "lb", "qspi", "sdh", "sd0", "z", |
ae65a8ae | 1154 | "rcan", "adsp"; |
797a0626 | 1155 | #power-domain-cells = <0>; |
59e79895 LP |
1156 | }; |
1157 | ||
1158 | /* Variable factor clocks */ | |
f617604f | 1159 | sd2_clk: sd2@e6150078 { |
59e79895 LP |
1160 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
1161 | reg = <0 0xe6150078 0 4>; | |
1162 | clocks = <&pll1_div2_clk>; | |
1163 | #clock-cells = <0>; | |
59e79895 | 1164 | }; |
f617604f | 1165 | sd3_clk: sd3@e615026c { |
59e79895 | 1166 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
c9b22772 | 1167 | reg = <0 0xe615026c 0 4>; |
59e79895 LP |
1168 | clocks = <&pll1_div2_clk>; |
1169 | #clock-cells = <0>; | |
59e79895 | 1170 | }; |
f617604f | 1171 | mmc0_clk: mmc0@e6150240 { |
59e79895 LP |
1172 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
1173 | reg = <0 0xe6150240 0 4>; | |
1174 | clocks = <&pll1_div2_clk>; | |
1175 | #clock-cells = <0>; | |
59e79895 | 1176 | }; |
f617604f | 1177 | ssp_clk: ssp@e6150248 { |
59e79895 LP |
1178 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
1179 | reg = <0 0xe6150248 0 4>; | |
1180 | clocks = <&pll1_div2_clk>; | |
1181 | #clock-cells = <0>; | |
59e79895 | 1182 | }; |
f617604f | 1183 | ssprs_clk: ssprs@e615024c { |
59e79895 LP |
1184 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
1185 | reg = <0 0xe615024c 0 4>; | |
1186 | clocks = <&pll1_div2_clk>; | |
1187 | #clock-cells = <0>; | |
59e79895 LP |
1188 | }; |
1189 | ||
1190 | /* Fixed factor clocks */ | |
f617604f | 1191 | pll1_div2_clk: pll1_div2 { |
59e79895 LP |
1192 | compatible = "fixed-factor-clock"; |
1193 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1194 | #clock-cells = <0>; | |
1195 | clock-div = <2>; | |
1196 | clock-mult = <1>; | |
59e79895 | 1197 | }; |
f617604f | 1198 | zg_clk: zg { |
59e79895 LP |
1199 | compatible = "fixed-factor-clock"; |
1200 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1201 | #clock-cells = <0>; | |
1202 | clock-div = <3>; | |
1203 | clock-mult = <1>; | |
59e79895 | 1204 | }; |
f617604f | 1205 | zx_clk: zx { |
59e79895 LP |
1206 | compatible = "fixed-factor-clock"; |
1207 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1208 | #clock-cells = <0>; | |
1209 | clock-div = <3>; | |
1210 | clock-mult = <1>; | |
59e79895 | 1211 | }; |
f617604f | 1212 | zs_clk: zs { |
59e79895 LP |
1213 | compatible = "fixed-factor-clock"; |
1214 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1215 | #clock-cells = <0>; | |
1216 | clock-div = <6>; | |
1217 | clock-mult = <1>; | |
59e79895 | 1218 | }; |
f617604f | 1219 | hp_clk: hp { |
59e79895 LP |
1220 | compatible = "fixed-factor-clock"; |
1221 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1222 | #clock-cells = <0>; | |
1223 | clock-div = <12>; | |
1224 | clock-mult = <1>; | |
59e79895 | 1225 | }; |
f617604f | 1226 | i_clk: i { |
59e79895 LP |
1227 | compatible = "fixed-factor-clock"; |
1228 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1229 | #clock-cells = <0>; | |
1230 | clock-div = <2>; | |
1231 | clock-mult = <1>; | |
59e79895 | 1232 | }; |
f617604f | 1233 | b_clk: b { |
59e79895 LP |
1234 | compatible = "fixed-factor-clock"; |
1235 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1236 | #clock-cells = <0>; | |
1237 | clock-div = <12>; | |
1238 | clock-mult = <1>; | |
59e79895 | 1239 | }; |
f617604f | 1240 | p_clk: p { |
59e79895 LP |
1241 | compatible = "fixed-factor-clock"; |
1242 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1243 | #clock-cells = <0>; | |
1244 | clock-div = <24>; | |
1245 | clock-mult = <1>; | |
59e79895 | 1246 | }; |
f617604f | 1247 | cl_clk: cl { |
59e79895 LP |
1248 | compatible = "fixed-factor-clock"; |
1249 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1250 | #clock-cells = <0>; | |
1251 | clock-div = <48>; | |
1252 | clock-mult = <1>; | |
59e79895 | 1253 | }; |
f617604f | 1254 | m2_clk: m2 { |
59e79895 LP |
1255 | compatible = "fixed-factor-clock"; |
1256 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1257 | #clock-cells = <0>; | |
1258 | clock-div = <8>; | |
1259 | clock-mult = <1>; | |
59e79895 | 1260 | }; |
f617604f | 1261 | rclk_clk: rclk { |
59e79895 LP |
1262 | compatible = "fixed-factor-clock"; |
1263 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1264 | #clock-cells = <0>; | |
1265 | clock-div = <(48 * 1024)>; | |
1266 | clock-mult = <1>; | |
59e79895 | 1267 | }; |
f617604f | 1268 | oscclk_clk: oscclk { |
59e79895 LP |
1269 | compatible = "fixed-factor-clock"; |
1270 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; | |
1271 | #clock-cells = <0>; | |
1272 | clock-div = <(12 * 1024)>; | |
1273 | clock-mult = <1>; | |
59e79895 | 1274 | }; |
f617604f | 1275 | zb3_clk: zb3 { |
59e79895 LP |
1276 | compatible = "fixed-factor-clock"; |
1277 | clocks = <&cpg_clocks R8A7791_CLK_PLL3>; | |
1278 | #clock-cells = <0>; | |
1279 | clock-div = <4>; | |
1280 | clock-mult = <1>; | |
59e79895 | 1281 | }; |
f617604f | 1282 | zb3d2_clk: zb3d2 { |
59e79895 LP |
1283 | compatible = "fixed-factor-clock"; |
1284 | clocks = <&cpg_clocks R8A7791_CLK_PLL3>; | |
1285 | #clock-cells = <0>; | |
1286 | clock-div = <8>; | |
1287 | clock-mult = <1>; | |
59e79895 | 1288 | }; |
f617604f | 1289 | ddr_clk: ddr { |
59e79895 LP |
1290 | compatible = "fixed-factor-clock"; |
1291 | clocks = <&cpg_clocks R8A7791_CLK_PLL3>; | |
1292 | #clock-cells = <0>; | |
1293 | clock-div = <8>; | |
1294 | clock-mult = <1>; | |
59e79895 | 1295 | }; |
f617604f | 1296 | mp_clk: mp { |
59e79895 LP |
1297 | compatible = "fixed-factor-clock"; |
1298 | clocks = <&pll1_div2_clk>; | |
1299 | #clock-cells = <0>; | |
1300 | clock-div = <15>; | |
1301 | clock-mult = <1>; | |
59e79895 | 1302 | }; |
f617604f | 1303 | cp_clk: cp { |
59e79895 LP |
1304 | compatible = "fixed-factor-clock"; |
1305 | clocks = <&extal_clk>; | |
1306 | #clock-cells = <0>; | |
1307 | clock-div = <2>; | |
1308 | clock-mult = <1>; | |
59e79895 LP |
1309 | }; |
1310 | ||
1311 | /* Gate clocks */ | |
cded80f8 LP |
1312 | mstp0_clks: mstp0_clks@e6150130 { |
1313 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1314 | reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; | |
1315 | clocks = <&mp_clk>; | |
1316 | #clock-cells = <1>; | |
cb0bf851 | 1317 | clock-indices = <R8A7791_CLK_MSIOF0>; |
cded80f8 LP |
1318 | clock-output-names = "msiof0"; |
1319 | }; | |
59e79895 LP |
1320 | mstp1_clks: mstp1_clks@e6150134 { |
1321 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1322 | reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; | |
74d89d25 YH |
1323 | clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>, |
1324 | <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, | |
1325 | <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, | |
1326 | <&zs_clk>; | |
59e79895 | 1327 | #clock-cells = <1>; |
cb0bf851 | 1328 | clock-indices = < |
74d89d25 YH |
1329 | R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU |
1330 | R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG | |
1331 | R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0 | |
1332 | R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0 | |
1333 | R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0 | |
1334 | R8A7791_CLK_VSP1_S | |
59e79895 LP |
1335 | >; |
1336 | clock-output-names = | |
74d89d25 YH |
1337 | "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg", |
1338 | "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0", | |
1339 | "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy"; | |
59e79895 LP |
1340 | }; |
1341 | mstp2_clks: mstp2_clks@e6150138 { | |
1342 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1343 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; | |
1344 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, | |
4e074bc8 GU |
1345 | <&mp_clk>, <&mp_clk>, <&mp_clk>, |
1346 | <&zs_clk>, <&zs_clk>; | |
59e79895 | 1347 | #clock-cells = <1>; |
cb0bf851 | 1348 | clock-indices = < |
59e79895 | 1349 | R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0 |
cded80f8 LP |
1350 | R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 |
1351 | R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2 | |
4e074bc8 | 1352 | R8A7791_CLK_SYS_DMAC1 R8A7791_CLK_SYS_DMAC0 |
59e79895 LP |
1353 | >; |
1354 | clock-output-names = | |
0c002ef8 | 1355 | "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", |
4e074bc8 GU |
1356 | "scifb1", "msiof1", "scifb2", |
1357 | "sys-dmac1", "sys-dmac0"; | |
59e79895 LP |
1358 | }; |
1359 | mstp3_clks: mstp3_clks@e615013c { | |
1360 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1361 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; | |
2ea0d4ec | 1362 | clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>, |
b9473d9f YS |
1363 | <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
1364 | <&hp_clk>, <&hp_clk>; | |
59e79895 | 1365 | #clock-cells = <1>; |
cb0bf851 | 1366 | clock-indices = < |
c08691b5 | 1367 | R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 |
4bfb3767 PE |
1368 | R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1 |
1369 | R8A7791_CLK_SSUSB R8A7791_CLK_CMT1 | |
b9473d9f | 1370 | R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1 |
59e79895 LP |
1371 | >; |
1372 | clock-output-names = | |
c08691b5 | 1373 | "tpu0", "sdhi2", "sdhi1", "sdhi0", |
b9473d9f YS |
1374 | "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1", |
1375 | "usbdmac0", "usbdmac1"; | |
59e79895 | 1376 | }; |
62d386c0 GU |
1377 | mstp4_clks: mstp4_clks@e6150140 { |
1378 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1379 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; | |
1380 | clocks = <&cp_clk>; | |
1381 | #clock-cells = <1>; | |
1382 | clock-indices = <R8A7791_CLK_IRQC>; | |
1383 | clock-output-names = "irqc"; | |
1384 | }; | |
59e79895 LP |
1385 | mstp5_clks: mstp5_clks@e6150144 { |
1386 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1387 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; | |
ae65a8ae SS |
1388 | clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>, |
1389 | <&extal_clk>, <&p_clk>; | |
59e79895 | 1390 | #clock-cells = <1>; |
cb0bf851 BD |
1391 | clock-indices = < |
1392 | R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 | |
ae65a8ae SS |
1393 | R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL |
1394 | R8A7791_CLK_PWM | |
cb0bf851 | 1395 | >; |
ae65a8ae SS |
1396 | clock-output-names = "audmac0", "audmac1", "adsp_mod", |
1397 | "thermal", "pwm"; | |
59e79895 LP |
1398 | }; |
1399 | mstp7_clks: mstp7_clks@e615014c { | |
1400 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1401 | reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; | |
118e4e6a | 1402 | clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, |
59e79895 LP |
1403 | <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, |
1404 | <&zx_clk>, <&zx_clk>, <&zx_clk>; | |
1405 | #clock-cells = <1>; | |
cb0bf851 | 1406 | clock-indices = < |
6225b99a | 1407 | R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 |
59e79895 LP |
1408 | R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0 |
1409 | R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1 | |
1410 | R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0 | |
1411 | R8A7791_CLK_LVDS0 | |
1412 | >; | |
1413 | clock-output-names = | |
6225b99a | 1414 | "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", |
59e79895 LP |
1415 | "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0"; |
1416 | }; | |
1417 | mstp8_clks: mstp8_clks@e6150990 { | |
1418 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1419 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | |
75a499a6 | 1420 | clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>, |
eaa870b3 SS |
1421 | <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>, |
1422 | <&zs_clk>; | |
59e79895 | 1423 | #clock-cells = <1>; |
cb0bf851 | 1424 | clock-indices = < |
7408d306 | 1425 | R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB |
09c98346 | 1426 | R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 |
eaa870b3 SS |
1427 | R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER |
1428 | R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 | |
09c98346 | 1429 | >; |
65f05c38 | 1430 | clock-output-names = |
eaa870b3 SS |
1431 | "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", |
1432 | "etheravb", "ether", "sata1", "sata0"; | |
59e79895 LP |
1433 | }; |
1434 | mstp9_clks: mstp9_clks@e6150994 { | |
1435 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1436 | reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; | |
4faf9c5e GU |
1437 | clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, |
1438 | <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, | |
1439 | <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>, | |
11b48db9 LP |
1440 | <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, |
1441 | <&hp_clk>, <&hp_clk>; | |
59e79895 | 1442 | #clock-cells = <1>; |
cb0bf851 | 1443 | clock-indices = < |
4faf9c5e GU |
1444 | R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4 |
1445 | R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0 | |
c08691b5 WS |
1446 | R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5 |
1447 | R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2 | |
1448 | R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 | |
59e79895 LP |
1449 | >; |
1450 | clock-output-names = | |
4faf9c5e GU |
1451 | "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", |
1452 | "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2", | |
1453 | "i2c1", "i2c0"; | |
59e79895 | 1454 | }; |
ee914152 KM |
1455 | mstp10_clks: mstp10_clks@e6150998 { |
1456 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1457 | reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; | |
1458 | clocks = <&p_clk>, | |
1459 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, | |
1460 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, | |
1461 | <&p_clk>, | |
1462 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, | |
1463 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, | |
1464 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, | |
1465 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, | |
1466 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, | |
88401702 | 1467 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
ee914152 KM |
1468 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>; |
1469 | ||
1470 | #clock-cells = <1>; | |
1471 | clock-indices = < | |
1472 | R8A7791_CLK_SSI_ALL | |
1473 | R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5 | |
1474 | R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0 | |
1475 | R8A7791_CLK_SCU_ALL | |
1476 | R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0 | |
88401702 | 1477 | R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0 |
ee914152 KM |
1478 | R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5 |
1479 | R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0 | |
1480 | >; | |
1481 | clock-output-names = | |
1482 | "ssi-all", | |
1483 | "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", | |
1484 | "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", | |
1485 | "scu-all", | |
1486 | "scu-dvc1", "scu-dvc0", | |
88401702 | 1487 | "scu-ctu1-mix1", "scu-ctu0-mix0", |
ee914152 KM |
1488 | "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", |
1489 | "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; | |
1490 | }; | |
59e79895 LP |
1491 | mstp11_clks: mstp11_clks@e615099c { |
1492 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | |
1493 | reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; | |
1494 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>; | |
1495 | #clock-cells = <1>; | |
cb0bf851 | 1496 | clock-indices = < |
59e79895 LP |
1497 | R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5 |
1498 | >; | |
1499 | clock-output-names = "scifa3", "scifa4", "scifa5"; | |
1500 | }; | |
1501 | }; | |
4d5b59cd | 1502 | |
8574de86 GU |
1503 | sysc: system-controller@e6180000 { |
1504 | compatible = "renesas,r8a7791-sysc"; | |
1505 | reg = <0 0xe6180000 0 0x0200>; | |
1506 | #power-domain-cells = <1>; | |
1507 | }; | |
1508 | ||
6f3e4ee3 | 1509 | qspi: spi@e6b10000 { |
4d5b59cd GU |
1510 | compatible = "renesas,qspi-r8a7791", "renesas,qspi"; |
1511 | reg = <0 0xe6b10000 0 0x2c>; | |
386a9291 | 1512 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
4d5b59cd | 1513 | clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>; |
4aed4c9f NS |
1514 | dmas = <&dmac0 0x17>, <&dmac0 0x18>, |
1515 | <&dmac1 0x17>, <&dmac1 0x18>; | |
1516 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 1517 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
4d5b59cd GU |
1518 | num-cs = <1>; |
1519 | #address-cells = <1>; | |
1520 | #size-cells = <0>; | |
1521 | status = "disabled"; | |
1522 | }; | |
7713d3ab GU |
1523 | |
1524 | msiof0: spi@e6e20000 { | |
1525 | compatible = "renesas,msiof-r8a7791"; | |
cb6d08a2 | 1526 | reg = <0 0xe6e20000 0 0x0064>; |
386a9291 | 1527 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
7713d3ab | 1528 | clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; |
4aed4c9f NS |
1529 | dmas = <&dmac0 0x51>, <&dmac0 0x52>, |
1530 | <&dmac1 0x51>, <&dmac1 0x52>; | |
1531 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 1532 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
7713d3ab GU |
1533 | #address-cells = <1>; |
1534 | #size-cells = <0>; | |
1535 | status = "disabled"; | |
1536 | }; | |
1537 | ||
1538 | msiof1: spi@e6e10000 { | |
1539 | compatible = "renesas,msiof-r8a7791"; | |
cb6d08a2 | 1540 | reg = <0 0xe6e10000 0 0x0064>; |
386a9291 | 1541 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
7713d3ab | 1542 | clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; |
4aed4c9f NS |
1543 | dmas = <&dmac0 0x55>, <&dmac0 0x56>, |
1544 | <&dmac1 0x55>, <&dmac1 0x56>; | |
1545 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 1546 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
7713d3ab GU |
1547 | #address-cells = <1>; |
1548 | #size-cells = <0>; | |
1549 | status = "disabled"; | |
1550 | }; | |
1551 | ||
1552 | msiof2: spi@e6e00000 { | |
1553 | compatible = "renesas,msiof-r8a7791"; | |
cb6d08a2 | 1554 | reg = <0 0xe6e00000 0 0x0064>; |
386a9291 | 1555 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
7713d3ab | 1556 | clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; |
4aed4c9f NS |
1557 | dmas = <&dmac0 0x41>, <&dmac0 0x42>, |
1558 | <&dmac1 0x41>, <&dmac1 0x42>; | |
1559 | dma-names = "tx", "rx", "tx", "rx"; | |
5aa80650 | 1560 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
7713d3ab GU |
1561 | #address-cells = <1>; |
1562 | #size-cells = <0>; | |
1563 | status = "disabled"; | |
1564 | }; | |
811cdfae | 1565 | |
c196931e | 1566 | xhci: usb@ee000000 { |
26dba296 | 1567 | compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci"; |
c196931e | 1568 | reg = <0 0xee000000 0 0xc00>; |
386a9291 | 1569 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
c196931e | 1570 | clocks = <&mstp3_clks R8A7791_CLK_SSUSB>; |
5aa80650 | 1571 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
c196931e YS |
1572 | phys = <&usb2 1>; |
1573 | phy-names = "usb"; | |
1574 | status = "disabled"; | |
1575 | }; | |
1576 | ||
aace0809 | 1577 | pci0: pci@ee090000 { |
d4809689 | 1578 | compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; |
aace0809 | 1579 | device_type = "pci"; |
aace0809 SS |
1580 | reg = <0 0xee090000 0 0xc00>, |
1581 | <0 0xee080000 0 0x1100>; | |
386a9291 | 1582 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
797a0626 | 1583 | clocks = <&mstp7_clks R8A7791_CLK_EHCI>; |
5aa80650 | 1584 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
aace0809 SS |
1585 | status = "disabled"; |
1586 | ||
1587 | bus-range = <0 0>; | |
1588 | #address-cells = <3>; | |
1589 | #size-cells = <2>; | |
1590 | #interrupt-cells = <1>; | |
1591 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; | |
1592 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
386a9291 SH |
1593 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
1594 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH | |
1595 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
e1bce124 SS |
1596 | |
1597 | usb@0,1 { | |
1598 | reg = <0x800 0 0 0 0>; | |
1599 | device_type = "pci"; | |
1600 | phys = <&usb0 0>; | |
1601 | phy-names = "usb"; | |
1602 | }; | |
1603 | ||
1604 | usb@0,2 { | |
1605 | reg = <0x1000 0 0 0 0>; | |
1606 | device_type = "pci"; | |
1607 | phys = <&usb0 0>; | |
1608 | phy-names = "usb"; | |
1609 | }; | |
aace0809 SS |
1610 | }; |
1611 | ||
1612 | pci1: pci@ee0d0000 { | |
d4809689 | 1613 | compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; |
aace0809 | 1614 | device_type = "pci"; |
aace0809 SS |
1615 | reg = <0 0xee0d0000 0 0xc00>, |
1616 | <0 0xee0c0000 0 0x1100>; | |
386a9291 | 1617 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
797a0626 | 1618 | clocks = <&mstp7_clks R8A7791_CLK_EHCI>; |
5aa80650 | 1619 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
aace0809 SS |
1620 | status = "disabled"; |
1621 | ||
1622 | bus-range = <1 1>; | |
1623 | #address-cells = <3>; | |
1624 | #size-cells = <2>; | |
1625 | #interrupt-cells = <1>; | |
1626 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; | |
1627 | interrupt-map-mask = <0xff00 0 0 0x7>; | |
386a9291 SH |
1628 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
1629 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
1630 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
e1bce124 SS |
1631 | |
1632 | usb@0,1 { | |
1633 | reg = <0x800 0 0 0 0>; | |
1634 | device_type = "pci"; | |
1635 | phys = <&usb2 0>; | |
1636 | phy-names = "usb"; | |
1637 | }; | |
1638 | ||
1639 | usb@0,2 { | |
1640 | reg = <0x1000 0 0 0 0>; | |
1641 | device_type = "pci"; | |
1642 | phys = <&usb2 0>; | |
1643 | phy-names = "usb"; | |
1644 | }; | |
aace0809 SS |
1645 | }; |
1646 | ||
811cdfae | 1647 | pciec: pcie@fe000000 { |
bbb45f69 | 1648 | compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; |
811cdfae PE |
1649 | reg = <0 0xfe000000 0 0x80000>; |
1650 | #address-cells = <3>; | |
1651 | #size-cells = <2>; | |
1652 | bus-range = <0x00 0xff>; | |
1653 | device_type = "pci"; | |
1654 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 | |
1655 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 | |
1656 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 | |
1657 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; | |
1658 | /* Map all possible DDR as inbound ranges */ | |
1659 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 | |
1660 | 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; | |
386a9291 SH |
1661 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
1662 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, | |
1663 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; | |
811cdfae PE |
1664 | #interrupt-cells = <1>; |
1665 | interrupt-map-mask = <0 0 0 0>; | |
386a9291 | 1666 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
811cdfae PE |
1667 | clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>; |
1668 | clock-names = "pcie", "pcie_bus"; | |
5aa80650 | 1669 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
811cdfae PE |
1670 | status = "disabled"; |
1671 | }; | |
09abd1fd | 1672 | |
f1951852 | 1673 | ipmmu_sy0: mmu@e6280000 { |
3c8ab0c8 | 1674 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1675 | reg = <0 0xe6280000 0 0x1000>; |
386a9291 SH |
1676 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
1677 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
f1951852 LP |
1678 | #iommu-cells = <1>; |
1679 | status = "disabled"; | |
1680 | }; | |
1681 | ||
1682 | ipmmu_sy1: mmu@e6290000 { | |
3c8ab0c8 | 1683 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1684 | reg = <0 0xe6290000 0 0x1000>; |
386a9291 | 1685 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
f1951852 LP |
1686 | #iommu-cells = <1>; |
1687 | status = "disabled"; | |
1688 | }; | |
1689 | ||
1690 | ipmmu_ds: mmu@e6740000 { | |
3c8ab0c8 | 1691 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1692 | reg = <0 0xe6740000 0 0x1000>; |
386a9291 SH |
1693 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
1694 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; | |
f1951852 LP |
1695 | #iommu-cells = <1>; |
1696 | status = "disabled"; | |
1697 | }; | |
1698 | ||
1699 | ipmmu_mp: mmu@ec680000 { | |
3c8ab0c8 | 1700 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1701 | reg = <0 0xec680000 0 0x1000>; |
386a9291 | 1702 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
f1951852 LP |
1703 | #iommu-cells = <1>; |
1704 | status = "disabled"; | |
1705 | }; | |
1706 | ||
1707 | ipmmu_mx: mmu@fe951000 { | |
3c8ab0c8 | 1708 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1709 | reg = <0 0xfe951000 0 0x1000>; |
386a9291 SH |
1710 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
1711 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
f1951852 LP |
1712 | #iommu-cells = <1>; |
1713 | status = "disabled"; | |
1714 | }; | |
1715 | ||
1716 | ipmmu_rt: mmu@ffc80000 { | |
3c8ab0c8 | 1717 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1718 | reg = <0 0xffc80000 0 0x1000>; |
386a9291 | 1719 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
f1951852 LP |
1720 | #iommu-cells = <1>; |
1721 | status = "disabled"; | |
1722 | }; | |
1723 | ||
1724 | ipmmu_gp: mmu@e62a0000 { | |
3c8ab0c8 | 1725 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
f1951852 | 1726 | reg = <0 0xe62a0000 0 0x1000>; |
386a9291 SH |
1727 | interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, |
1728 | <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; | |
f1951852 LP |
1729 | #iommu-cells = <1>; |
1730 | status = "disabled"; | |
1731 | }; | |
1732 | ||
6c63e07d | 1733 | rcar_sound: sound@ec500000 { |
d2b541c9 KM |
1734 | /* |
1735 | * #sound-dai-cells is required | |
1736 | * | |
1737 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
1738 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
1739 | */ | |
f49cd2b3 | 1740 | compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2"; |
09abd1fd KM |
1741 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
1742 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
1743 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
8c3f903b | 1744 | <0 0xec541000 0 0x280>, /* SSI */ |
d73a5013 KM |
1745 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
1746 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
d88a6a2a | 1747 | |
09abd1fd KM |
1748 | clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>, |
1749 | <&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>, | |
1750 | <&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>, | |
1751 | <&mstp10_clks R8A7791_CLK_SSI5>, <&mstp10_clks R8A7791_CLK_SSI4>, | |
1752 | <&mstp10_clks R8A7791_CLK_SSI3>, <&mstp10_clks R8A7791_CLK_SSI2>, | |
1753 | <&mstp10_clks R8A7791_CLK_SSI1>, <&mstp10_clks R8A7791_CLK_SSI0>, | |
1754 | <&mstp10_clks R8A7791_CLK_SCU_SRC9>, <&mstp10_clks R8A7791_CLK_SCU_SRC8>, | |
1755 | <&mstp10_clks R8A7791_CLK_SCU_SRC7>, <&mstp10_clks R8A7791_CLK_SCU_SRC6>, | |
1756 | <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>, | |
1757 | <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>, | |
1758 | <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>, | |
88401702 | 1759 | <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>, |
7fd6e11d | 1760 | <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>, |
150c8ad4 | 1761 | <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>, |
09abd1fd KM |
1762 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; |
1763 | clock-names = "ssi-all", | |
1764 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", | |
1765 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", | |
1766 | "src.9", "src.8", "src.7", "src.6", "src.5", | |
1767 | "src.4", "src.3", "src.2", "src.1", "src.0", | |
88401702 | 1768 | "ctu.0", "ctu.1", |
7fd6e11d | 1769 | "mix.0", "mix.1", |
150c8ad4 | 1770 | "dvc.0", "dvc.1", |
09abd1fd | 1771 | "clk_a", "clk_b", "clk_c", "clk_i"; |
5aa80650 | 1772 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
09abd1fd KM |
1773 | |
1774 | status = "disabled"; | |
1775 | ||
150c8ad4 | 1776 | rcar_sound,dvc { |
6f9314ce | 1777 | dvc0: dvc-0 { |
63573339 KM |
1778 | dmas = <&audma0 0xbc>; |
1779 | dma-names = "tx"; | |
1780 | }; | |
6f9314ce | 1781 | dvc1: dvc-1 { |
63573339 KM |
1782 | dmas = <&audma0 0xbe>; |
1783 | dma-names = "tx"; | |
1784 | }; | |
150c8ad4 KM |
1785 | }; |
1786 | ||
7fd6e11d | 1787 | rcar_sound,mix { |
6f9314ce GU |
1788 | mix0: mix-0 { }; |
1789 | mix1: mix-1 { }; | |
7fd6e11d KM |
1790 | }; |
1791 | ||
88401702 | 1792 | rcar_sound,ctu { |
6f9314ce GU |
1793 | ctu00: ctu-0 { }; |
1794 | ctu01: ctu-1 { }; | |
1795 | ctu02: ctu-2 { }; | |
1796 | ctu03: ctu-3 { }; | |
1797 | ctu10: ctu-4 { }; | |
1798 | ctu11: ctu-5 { }; | |
1799 | ctu12: ctu-6 { }; | |
1800 | ctu13: ctu-7 { }; | |
88401702 KM |
1801 | }; |
1802 | ||
09abd1fd | 1803 | rcar_sound,src { |
6f9314ce | 1804 | src0: src-0 { |
386a9291 | 1805 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1806 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
1807 | dma-names = "rx", "tx"; | |
1808 | }; | |
6f9314ce | 1809 | src1: src-1 { |
386a9291 | 1810 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1811 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
1812 | dma-names = "rx", "tx"; | |
1813 | }; | |
6f9314ce | 1814 | src2: src-2 { |
386a9291 | 1815 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1816 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
1817 | dma-names = "rx", "tx"; | |
1818 | }; | |
6f9314ce | 1819 | src3: src-3 { |
386a9291 | 1820 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1821 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
1822 | dma-names = "rx", "tx"; | |
1823 | }; | |
6f9314ce | 1824 | src4: src-4 { |
386a9291 | 1825 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1826 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
1827 | dma-names = "rx", "tx"; | |
1828 | }; | |
6f9314ce | 1829 | src5: src-5 { |
386a9291 | 1830 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1831 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
1832 | dma-names = "rx", "tx"; | |
1833 | }; | |
6f9314ce | 1834 | src6: src-6 { |
386a9291 | 1835 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1836 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
1837 | dma-names = "rx", "tx"; | |
1838 | }; | |
6f9314ce | 1839 | src7: src-7 { |
386a9291 | 1840 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1841 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
1842 | dma-names = "rx", "tx"; | |
1843 | }; | |
6f9314ce | 1844 | src8: src-8 { |
386a9291 | 1845 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1846 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
1847 | dma-names = "rx", "tx"; | |
1848 | }; | |
6f9314ce | 1849 | src9: src-9 { |
386a9291 | 1850 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1851 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
1852 | dma-names = "rx", "tx"; | |
1853 | }; | |
09abd1fd KM |
1854 | }; |
1855 | ||
1856 | rcar_sound,ssi { | |
6f9314ce | 1857 | ssi0: ssi-0 { |
386a9291 | 1858 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1859 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
1860 | dma-names = "rx", "tx", "rxu", "txu"; | |
1861 | }; | |
6f9314ce | 1862 | ssi1: ssi-1 { |
386a9291 | 1863 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1864 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
1865 | dma-names = "rx", "tx", "rxu", "txu"; | |
1866 | }; | |
6f9314ce | 1867 | ssi2: ssi-2 { |
386a9291 | 1868 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1869 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
1870 | dma-names = "rx", "tx", "rxu", "txu"; | |
1871 | }; | |
6f9314ce | 1872 | ssi3: ssi-3 { |
386a9291 | 1873 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1874 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
1875 | dma-names = "rx", "tx", "rxu", "txu"; | |
1876 | }; | |
6f9314ce | 1877 | ssi4: ssi-4 { |
386a9291 | 1878 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1879 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
1880 | dma-names = "rx", "tx", "rxu", "txu"; | |
1881 | }; | |
6f9314ce | 1882 | ssi5: ssi-5 { |
386a9291 | 1883 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1884 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
1885 | dma-names = "rx", "tx", "rxu", "txu"; | |
1886 | }; | |
6f9314ce | 1887 | ssi6: ssi-6 { |
386a9291 | 1888 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1889 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
1890 | dma-names = "rx", "tx", "rxu", "txu"; | |
1891 | }; | |
6f9314ce | 1892 | ssi7: ssi-7 { |
386a9291 | 1893 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1894 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
1895 | dma-names = "rx", "tx", "rxu", "txu"; | |
1896 | }; | |
6f9314ce | 1897 | ssi8: ssi-8 { |
386a9291 | 1898 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1899 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
1900 | dma-names = "rx", "tx", "rxu", "txu"; | |
1901 | }; | |
6f9314ce | 1902 | ssi9: ssi-9 { |
386a9291 | 1903 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
63573339 KM |
1904 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
1905 | dma-names = "rx", "tx", "rxu", "txu"; | |
1906 | }; | |
09abd1fd KM |
1907 | }; |
1908 | }; | |
0d0771ab | 1909 | }; |