[deliverable/linux.git] / arch / arm / boot / dts / r8a7791.dtsi

/*
 * Device Tree Source for the r8a7791 SoC
 *
 * Copyright (C) 2013 Renesas Electronics Corporation
 * Copyright (C) 2013 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "renesas,r8a7791";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0>;
			clock-frequency = <1300000000>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <1>;
			clock-frequency = <1300000000>;
		};
	};

	gic: interrupt-controller@f1001000 {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0 0xf1001000 0 0x1000>,
			<0 0xf1002000 0 0x1000>,
			<0 0xf1004000 0 0x2000>,
			<0 0xf1006000 0 0x2000>;
		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
	};

	gpio0: gpio@ffc40000 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc40000 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 0 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio1: gpio@ffc41000 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc41000 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 32 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio2: gpio@ffc42000 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc42000 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 64 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio3: gpio@ffc43000 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc43000 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 96 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio4: gpio@ffc44000 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc44000 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 128 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio5: gpio@ffc45000 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc45000 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 160 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio6: gpio@ffc45400 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc45400 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 192 32>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	gpio7: gpio@ffc45800 {
		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
		reg = <0 0xffc45800 0 0x50>;
		interrupt-parent = <&gic>;
		interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		gpio-controller;
		gpio-ranges = <&pfc 0 224 26>;
		#interrupt-cells = <2>;
		interrupt-controller;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};

	irqc0: interrupt-controller@e61c0000 {
		compatible = "renesas,irqc";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0 0xe61c0000 0 0x200>;
		interrupt-parent = <&gic>;
		interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
			     <0 1 IRQ_TYPE_LEVEL_HIGH>,
			     <0 2 IRQ_TYPE_LEVEL_HIGH>,
			     <0 3 IRQ_TYPE_LEVEL_HIGH>,
			     <0 12 IRQ_TYPE_LEVEL_HIGH>,
			     <0 13 IRQ_TYPE_LEVEL_HIGH>,
			     <0 14 IRQ_TYPE_LEVEL_HIGH>,
			     <0 15 IRQ_TYPE_LEVEL_HIGH>,
			     <0 16 IRQ_TYPE_LEVEL_HIGH>,
			     <0 17 IRQ_TYPE_LEVEL_HIGH>;
	};

	pfc: pfc@e6060000 {
		compatible = "renesas,pfc-r8a7791";
		reg = <0 0xe6060000 0 0x250>;
		#gpio-range-cells = <3>;
	};
};
Commit	Line	Data
0d0771ab HN	1	/*
	2	* Device Tree Source for the r8a7791 SoC
	3	*
	4	* Copyright (C) 2013 Renesas Electronics Corporation
	5	* Copyright (C) 2013 Renesas Solutions Corp.
	6	*
	7	* This file is licensed under the terms of the GNU General Public License
	8	* version 2. This program is licensed "as is" without any warranty of any
	9	* kind, whether express or implied.
	10	*/
	11
5f75e73c LP	12	#include <dt-bindings/interrupt-controller/arm-gic.h>
	13	#include <dt-bindings/interrupt-controller/irq.h>
	14
0d0771ab HN	15	/ {
	16	compatible = "renesas,r8a7791";
	17	interrupt-parent = <&gic>;
	18	#address-cells = <2>;
	19	#size-cells = <2>;
	20
	21	cpus {
	22	#address-cells = <1>;
	23	#size-cells = <0>;
	24
	25	cpu0: cpu@0 {
	26	device_type = "cpu";
	27	compatible = "arm,cortex-a15";
	28	reg = <0>;
	29	clock-frequency = <1300000000>;
	30	};
15ab426c MD	31
	32	cpu1: cpu@1 {
	33	device_type = "cpu";
	34	compatible = "arm,cortex-a15";
	35	reg = <1>;
	36	clock-frequency = <1300000000>;
	37	};
0d0771ab HN	38	};
	39
	40	gic: interrupt-controller@f1001000 {
	41	compatible = "arm,cortex-a15-gic";
	42	#interrupt-cells = <3>;
	43	#address-cells = <0>;
	44	interrupt-controller;
	45	reg = <0 0xf1001000 0 0x1000>,
	46	<0 0xf1002000 0 0x1000>,
	47	<0 0xf1004000 0 0x2000>,
	48	<0 0xf1006000 0 0x2000>;
5f75e73c	49	interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_HIGH)>;
0d0771ab	50	};
d77db73e	51
ab87e3fc MD	52	gpio0: gpio@ffc40000 {
	53	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	54	reg = <0 0xffc40000 0 0x50>;
	55	interrupt-parent = <&gic>;
5f75e73c	56	interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	57	#gpio-cells = <2>;
	58	gpio-controller;
	59	gpio-ranges = <&pfc 0 0 32>;
	60	#interrupt-cells = <2>;
	61	interrupt-controller;
	62	};
	63
	64	gpio1: gpio@ffc41000 {
	65	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	66	reg = <0 0xffc41000 0 0x50>;
	67	interrupt-parent = <&gic>;
5f75e73c	68	interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	69	#gpio-cells = <2>;
	70	gpio-controller;
	71	gpio-ranges = <&pfc 0 32 32>;
	72	#interrupt-cells = <2>;
	73	interrupt-controller;
	74	};
	75
	76	gpio2: gpio@ffc42000 {
	77	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	78	reg = <0 0xffc42000 0 0x50>;
	79	interrupt-parent = <&gic>;
5f75e73c	80	interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	81	#gpio-cells = <2>;
	82	gpio-controller;
	83	gpio-ranges = <&pfc 0 64 32>;
	84	#interrupt-cells = <2>;
	85	interrupt-controller;
	86	};
	87
	88	gpio3: gpio@ffc43000 {
	89	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	90	reg = <0 0xffc43000 0 0x50>;
	91	interrupt-parent = <&gic>;
5f75e73c	92	interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	93	#gpio-cells = <2>;
	94	gpio-controller;
	95	gpio-ranges = <&pfc 0 96 32>;
	96	#interrupt-cells = <2>;
	97	interrupt-controller;
	98	};
	99
	100	gpio4: gpio@ffc44000 {
	101	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	102	reg = <0 0xffc44000 0 0x50>;
	103	interrupt-parent = <&gic>;
5f75e73c	104	interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	105	#gpio-cells = <2>;
	106	gpio-controller;
	107	gpio-ranges = <&pfc 0 128 32>;
	108	#interrupt-cells = <2>;
	109	interrupt-controller;
	110	};
	111
	112	gpio5: gpio@ffc45000 {
	113	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	114	reg = <0 0xffc45000 0 0x50>;
	115	interrupt-parent = <&gic>;
5f75e73c	116	interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	117	#gpio-cells = <2>;
	118	gpio-controller;
	119	gpio-ranges = <&pfc 0 160 32>;
	120	#interrupt-cells = <2>;
	121	interrupt-controller;
	122	};
	123
	124	gpio6: gpio@ffc45400 {
	125	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	126	reg = <0 0xffc45400 0 0x50>;
	127	interrupt-parent = <&gic>;
5f75e73c	128	interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	129	#gpio-cells = <2>;
	130	gpio-controller;
	131	gpio-ranges = <&pfc 0 192 32>;
	132	#interrupt-cells = <2>;
	133	interrupt-controller;
	134	};
	135
	136	gpio7: gpio@ffc45800 {
	137	compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
	138	reg = <0 0xffc45800 0 0x50>;
	139	interrupt-parent = <&gic>;
5f75e73c	140	interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
ab87e3fc MD	141	#gpio-cells = <2>;
	142	gpio-controller;
	143	gpio-ranges = <&pfc 0 224 26>;
	144	#interrupt-cells = <2>;
	145	interrupt-controller;
	146	};
	147
03586acf MD	148	timer {
03586acf MD	149	compatible = "arm,armv7-timer";
5f75e73c LP	150	interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	151	<1 14 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	152	<1 11 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>,
	153	<1 10 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_LEVEL_LOW)>;
03586acf MD	154	};
03586acf MD	155
d77db73e MD	156	irqc0: interrupt-controller@e61c0000 {
	157	compatible = "renesas,irqc";
	158	#interrupt-cells = <2>;
	159	interrupt-controller;
	160	reg = <0 0xe61c0000 0 0x200>;
	161	interrupt-parent = <&gic>;
5f75e73c LP	162	interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
	163	<0 1 IRQ_TYPE_LEVEL_HIGH>,
	164	<0 2 IRQ_TYPE_LEVEL_HIGH>,
	165	<0 3 IRQ_TYPE_LEVEL_HIGH>,
	166	<0 12 IRQ_TYPE_LEVEL_HIGH>,
	167	<0 13 IRQ_TYPE_LEVEL_HIGH>,
	168	<0 14 IRQ_TYPE_LEVEL_HIGH>,
	169	<0 15 IRQ_TYPE_LEVEL_HIGH>,
	170	<0 16 IRQ_TYPE_LEVEL_HIGH>,
	171	<0 17 IRQ_TYPE_LEVEL_HIGH>;
d77db73e	172	};
55146927 MD	173
	174	pfc: pfc@e6060000 {
	175	compatible = "renesas,pfc-r8a7791";
	176	reg = <0 0xe6060000 0 0x250>;
	177	#gpio-range-cells = <3>;
	178	};
0d0771ab	179	};