projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a42fc57a SS |
1 | /* |
| 2 | * Device Tree Source for the SILK board | |
| 3 | * | |
| 4 | * Copyright (C) 2014 Renesas Electronics Corporation | |
| 5 | * Copyright (C) 2014-2015 Renesas Solutions Corp. | |
| 6 | * Copyright (C) 2014-2015 Cogent Embedded, Inc. | |
| 7 | * | |
| 8 | * This file is licensed under the terms of the GNU General Public License | |
| 9 | * version 2. This program is licensed "as is" without any warranty of any | |
| 10 | * kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| 13 | /dts-v1/; | |
| 14 | #include "r8a7794.dtsi" | |
| 15 | ||
| 16 | / { | |
| 17 | model = "SILK"; | |
| 18 | compatible = "renesas,silk", "renesas,r8a7794"; | |
| 19 | ||
| 20 | aliases { | |
| 21 | serial0 = &scif2; | |
| 22 | }; | |
| 23 | ||
| 24 | chosen { | |
| dad5c83d | 25 | bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
| a42fc57a SS |
26 | stdout-path = &scif2; |
| 27 | }; | |
| 28 | ||
| 29 | memory@40000000 { | |
| 30 | device_type = "memory"; | |
| 31 | reg = <0 0x40000000 0 0x40000000>; | |
| 32 | }; | |
| 054531e7 SS |
33 | |
| 34 | d3_3v: regulator@0 { | |
| 35 | compatible = "regulator-fixed"; | |
| 36 | regulator-name = "D3.3V"; | |
| 37 | regulator-min-microvolt = <3300000>; | |
| 38 | regulator-max-microvolt = <3300000>; | |
| 39 | regulator-boot-on; | |
| 40 | regulator-always-on; | |
| 41 | }; | |
| a42fc57a SS |
42 | }; |
| 43 | ||
| 44 | &extal_clk { | |
| 45 | clock-frequency = <20000000>; | |
| 46 | }; | |
| 47 | ||
| 48 | &pfc { | |
| 49 | scif2_pins: serial2 { | |
| 50 | renesas,groups = "scif2_data"; | |
| 51 | renesas,function = "scif2"; | |
| 52 | }; | |
| dad5c83d SS |
53 | |
| 54 | ether_pins: ether { | |
| 55 | renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; | |
| 56 | renesas,function = "eth"; | |
| 57 | }; | |
| 58 | ||
| 59 | phy1_pins: phy1 { | |
| 60 | renesas,groups = "intc_irq8"; | |
| 61 | renesas,function = "intc"; | |
| 62 | }; | |
| 054531e7 | 63 | |
| fa070791 SS |
64 | i2c1_pins: i2c1 { |
| 65 | renesas,groups = "i2c1"; | |
| 66 | renesas,function = "i2c1"; | |
| 67 | }; | |
| 68 | ||
| 054531e7 SS |
69 | mmcif0_pins: mmcif0 { |
| 70 | renesas,groups = "mmc_data8", "mmc_ctrl"; | |
| 71 | renesas,function = "mmc"; | |
| 72 | }; | |
| 0ebdbc50 SS |
73 | |
| 74 | qspi_pins: spi0 { | |
| 75 | renesas,groups = "qspi_ctrl", "qspi_data4"; | |
| 76 | renesas,function = "qspi"; | |
| 77 | }; | |
| 8614daf2 SS |
78 | |
| 79 | vin0_pins: vin0 { | |
| 80 | renesas,groups = "vin0_data8", "vin0_clk"; | |
| 81 | renesas,function = "vin0"; | |
| 82 | }; | |
| a42fc57a SS |
83 | }; |
| 84 | ||
| 85 | &scif2 { | |
| 86 | pinctrl-0 = <&scif2_pins>; | |
| 87 | pinctrl-names = "default"; | |
| 88 | ||
| 89 | status = "okay"; | |
| 90 | }; | |
| dad5c83d SS |
91 | |
| 92 | ðer { | |
| 93 | pinctrl-0 = <ðer_pins &phy1_pins>; | |
| 94 | pinctrl-names = "default"; | |
| 95 | ||
| 96 | phy-handle = <&phy1>; | |
| 97 | renesas,ether-link-active-low; | |
| 98 | status = "okay"; | |
| 99 | ||
| 100 | phy1: ethernet-phy@1 { | |
| 101 | reg = <1>; | |
| 102 | interrupt-parent = <&irqc0>; | |
| 103 | interrupts = <8 IRQ_TYPE_LEVEL_LOW>; | |
| 104 | micrel,led-mode = <1>; | |
| 105 | }; | |
| 106 | }; | |
| 054531e7 | 107 | |
| fa070791 SS |
108 | &i2c1 { |
| 109 | pinctrl-0 = <&i2c1_pins>; | |
| 110 | pinctrl-names = "default"; | |
| 111 | ||
| 112 | status = "okay"; | |
| 113 | clock-frequency = <400000>; | |
| 8614daf2 SS |
114 | |
| 115 | composite-in@20 { | |
| 116 | compatible = "adi,adv7180"; | |
| 117 | reg = <0x20>; | |
| 118 | remote = <&vin0>; | |
| 119 | ||
| 120 | port { | |
| 121 | adv7180: endpoint { | |
| 122 | bus-width = <8>; | |
| 123 | remote-endpoint = <&vin0ep>; | |
| 124 | }; | |
| 125 | }; | |
| 126 | }; | |
| fa070791 SS |
127 | }; |
| 128 | ||
| 054531e7 SS |
129 | &mmcif0 { |
| 130 | pinctrl-0 = <&mmcif0_pins>; | |
| 131 | pinctrl-names = "default"; | |
| 132 | ||
| 133 | vmmc-supply = <&d3_3v>; | |
| 134 | vqmmc-supply = <&d3_3v>; | |
| 135 | bus-width = <8>; | |
| 136 | non-removable; | |
| 137 | status = "okay"; | |
| 138 | }; | |
| 0ebdbc50 SS |
139 | |
| 140 | &qspi { | |
| 141 | pinctrl-0 = <&qspi_pins>; | |
| 142 | pinctrl-names = "default"; | |
| 143 | ||
| 144 | status = "okay"; | |
| 145 | ||
| 146 | flash@0 { | |
| 147 | #address-cells = <1>; | |
| 148 | #size-cells = <1>; | |
| 149 | compatible = "spansion,s25fl512s", "jedec,spi-nor"; | |
| 150 | reg = <0>; | |
| 151 | spi-max-frequency = <30000000>; | |
| 152 | spi-tx-bus-width = <4>; | |
| 153 | spi-rx-bus-width = <4>; | |
| 154 | spi-cpol; | |
| 155 | spi-cpha; | |
| 156 | m25p,fast-read; | |
| 157 | ||
| 158 | partition@0 { | |
| 159 | label = "loader"; | |
| 160 | reg = <0x00000000 0x00040000>; | |
| 161 | read-only; | |
| 162 | }; | |
| 163 | partition@40000 { | |
| 164 | label = "user"; | |
| 165 | reg = <0x00040000 0x00400000>; | |
| 166 | read-only; | |
| 167 | }; | |
| 168 | partition@440000 { | |
| 169 | label = "flash"; | |
| 170 | reg = <0x00440000 0x03bc0000>; | |
| 171 | }; | |
| 172 | }; | |
| 173 | }; | |
| 8614daf2 SS |
174 | |
| 175 | /* composite video input */ | |
| 176 | &vin0 { | |
| 177 | status = "okay"; | |
| 178 | pinctrl-0 = <&vin0_pins>; | |
| 179 | pinctrl-names = "default"; | |
| 180 | ||
| 181 | port { | |
| 182 | #address-cells = <1>; | |
| 183 | #size-cells = <0>; | |
| 184 | ||
| 185 | vin0ep: endpoint { | |
| 186 | remote-endpoint = <&adv7180>; | |
| 187 | bus-width = <8>; | |
| 188 | }; | |
| 189 | }; | |
| 190 | }; |