projects / deliverable / linux.git / blame
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|---|---|---|
| d5f9f4ff BN |
1 | /* |
| 2 | * Google Veyron Jaq Rev 1+ board device tree source | |
| 3 | * | |
| 4 | * Copyright 2015 Google, Inc | |
| 5 | * | |
| 6 | * This file is dual-licensed: you can use it either under the terms | |
| 7 | * of the GPL or the X11 license, at your option. Note that this dual | |
| 8 | * licensing only applies to this file, and not this project as a | |
| 9 | * whole. | |
| 10 | * | |
| 11 | * a) This file is free software; you can redistribute it and/or | |
| 12 | * modify it under the terms of the GNU General Public License as | |
| 13 | * published by the Free Software Foundation; either version 2 of the | |
| 14 | * License, or (at your option) any later version. | |
| 15 | * | |
| 16 | * This file is distributed in the hope that it will be useful, | |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 19 | * GNU General Public License for more details. | |
| 20 | * | |
| 21 | * Or, alternatively, | |
| 22 | * | |
| 23 | * b) Permission is hereby granted, free of charge, to any person | |
| 24 | * obtaining a copy of this software and associated documentation | |
| 25 | * files (the "Software"), to deal in the Software without | |
| 26 | * restriction, including without limitation the rights to use, | |
| 27 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 28 | * sell copies of the Software, and to permit persons to whom the | |
| 29 | * Software is furnished to do so, subject to the following | |
| 30 | * conditions: | |
| 31 | * | |
| 32 | * The above copyright notice and this permission notice shall be | |
| 33 | * included in all copies or substantial portions of the Software. | |
| 34 | * | |
| 35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 42 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 43 | */ | |
| 44 | ||
| 45 | /dts-v1/; | |
| 46 | ||
| 47 | #include "rk3288-veyron-chromebook.dtsi" | |
| 48 | #include "cros-ec-sbs.dtsi" | |
| 49 | ||
| 50 | / { | |
| 51 | model = "Google Jaq"; | |
| 52 | compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", | |
| 53 | "google,veyron-jaq-rev3", "google,veyron-jaq-rev2", | |
| 54 | "google,veyron-jaq-rev1", "google,veyron-jaq", | |
| 55 | "google,veyron", "rockchip,rk3288"; | |
| 56 | ||
| 57 | panel_regulator: panel-regulator { | |
| 58 | compatible = "regulator-fixed"; | |
| 59 | enable-active-high; | |
| 60 | gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; | |
| 61 | pinctrl-names = "default"; | |
| 62 | pinctrl-0 = <&lcd_enable_h>; | |
| 63 | regulator-name = "panel_regulator"; | |
| 64 | vin-supply = <&vcc33_sys>; | |
| 65 | }; | |
| 66 | ||
| 67 | vcc18_lcd: vcc18-lcd { | |
| 68 | compatible = "regulator-fixed"; | |
| 69 | enable-active-high; | |
| 70 | gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; | |
| 71 | pinctrl-names = "default"; | |
| 72 | pinctrl-0 = <&avdd_1v8_disp_en>; | |
| 73 | regulator-name = "vcc18_lcd"; | |
| 74 | regulator-always-on; | |
| 75 | regulator-boot-on; | |
| 76 | vin-supply = <&vcc18_wl>; | |
| 77 | }; | |
| 78 | ||
| 79 | backlight_regulator: backlight-regulator { | |
| 80 | compatible = "regulator-fixed"; | |
| 81 | enable-active-high; | |
| 82 | gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>; | |
| 83 | pinctrl-names = "default"; | |
| 84 | pinctrl-0 = <&bl_pwr_en>; | |
| 85 | regulator-name = "backlight_regulator"; | |
| 86 | vin-supply = <&vcc33_sys>; | |
| 87 | startup-delay-us = <15000>; | |
| 88 | }; | |
| 89 | }; | |
| 90 | ||
| 91 | &rk808 { | |
| 92 | pinctrl-names = "default"; | |
| 93 | pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; | |
| 94 | dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>, | |
| 95 | <&gpio7 15 GPIO_ACTIVE_HIGH>; | |
| 96 | ||
| 97 | regulators { | |
| 98 | mic_vcc: LDO_REG2 { | |
| 99 | regulator-name = "mic_vcc"; | |
| 100 | regulator-always-on; | |
| 101 | regulator-boot-on; | |
| 102 | regulator-min-microvolt = <1800000>; | |
| 103 | regulator-max-microvolt = <1800000>; | |
| 104 | regulator-state-mem { | |
| 105 | regulator-off-in-suspend; | |
| 106 | }; | |
| 107 | }; | |
| 108 | }; | |
| 109 | }; | |
| 110 | ||
| 111 | &sdmmc { | |
| 112 | disable-wp; | |
| 113 | pinctrl-names = "default"; | |
| 114 | pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio | |
| 115 | &sdmmc_bus4>; | |
| 116 | }; | |
| 117 | ||
| 118 | &vcc_5v { | |
| 119 | enable-active-high; | |
| 120 | gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>; | |
| 121 | pinctrl-names = "default"; | |
| 122 | pinctrl-0 = <&drv_5v>; | |
| 123 | }; | |
| 124 | ||
| 125 | &vcc50_hdmi { | |
| 126 | enable-active-high; | |
| 127 | gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>; | |
| 128 | pinctrl-names = "default"; | |
| 129 | pinctrl-0 = <&vcc50_hdmi_en>; | |
| 130 | }; | |
| 131 | ||
| 132 | &pinctrl { | |
| 133 | backlight { | |
| 134 | bl_pwr_en: bl_pwr_en { | |
| 135 | rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; | |
| 136 | }; | |
| 137 | }; | |
| 138 | ||
| 139 | buck-5v { | |
| 140 | drv_5v: drv-5v { | |
| 141 | rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; | |
| 142 | }; | |
| 143 | }; | |
| 144 | ||
| 145 | edp { | |
| 146 | edp_hpd: edp_hpd { | |
| 147 | rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>; | |
| 148 | }; | |
| 149 | }; | |
| 150 | ||
| 151 | hdmi { | |
| 152 | vcc50_hdmi_en: vcc50-hdmi-en { | |
| 153 | rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; | |
| 154 | }; | |
| 155 | }; | |
| 156 | ||
| 157 | lcd { | |
| 158 | lcd_enable_h: lcd-en { | |
| 159 | rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; | |
| 160 | }; | |
| 161 | ||
| 162 | avdd_1v8_disp_en: avdd-1v8-disp-en { | |
| 163 | rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; | |
| 164 | }; | |
| 165 | }; | |
| 166 | ||
| 167 | pmic { | |
| 168 | dvs_1: dvs-1 { | |
| 169 | rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; | |
| 170 | }; | |
| 171 | ||
| 172 | dvs_2: dvs-2 { | |
| 173 | rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; | |
| 174 | }; | |
| 175 | }; | |
| 176 | }; |