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Merge tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm into next/dt
[deliverable/linux.git] / arch / arm / boot / dts / sama5d3.dtsi
CommitLineData
655ff266
LD		 1/*
2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
4 *
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
6db64d29 11#include "skeleton.dtsi"
c9d0f317 12#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 13#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 14#include <dt-bindings/gpio/gpio.h>
655ff266
LD		 15
16/ {
17 model = "Atmel SAMA5D3 family SoC";
18 compatible = "atmel,sama5d3", "atmel,sama5";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
27 gpio0 = &pioA;
28 gpio1 = &pioB;
29 gpio2 = &pioC;
30 gpio3 = &pioD;
31 gpio4 = &pioE;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
34 i2c0 = &i2c0;
35 i2c1 = &i2c1;
36 i2c2 = &i2c2;
37 ssc0 = &ssc0;
38 ssc1 = &ssc1;
39 };
40 cpus {
41 cpu@0 {
e757a6ee 42 device_type = "cpu";
655ff266 43 compatible = "arm,cortex-a5";
e757a6ee 44 reg = <0x0>;
655ff266
LD		 45 };
46 };
47
48 memory {
49 reg = <0x20000000 0x8000000>;
50 };
51
52 ahb {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges;
57
58 apb {
59 compatible = "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
63
64 mmc0: mmc@f0000000 {
65 compatible = "atmel,hsmci";
66 reg = <0xf0000000 0x600>;
5e8b3bc3 67 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 68 dmas = <&dma0 2 0>;
69 dma-names = "rxtx";
655ff266
LD		 70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
72 status = "disabled";
73 #address-cells = <1>;
74 #size-cells = <0>;
75 };
76
77 spi0: spi@f0004000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 compatible = "atmel,at91sam9x5-spi";
81 reg = <0xf0004000 0x100>;
5e8b3bc3 82 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_spi0>;
85 status = "disabled";
86 };
87
88 ssc0: ssc@f0008000 {
89 compatible = "atmel,at91sam9g45-ssc";
90 reg = <0xf0008000 0x4000>;
5e8b3bc3 91 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
655ff266
LD		 92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
94 status = "disabled";
95 };
96
97 can0: can@f000c000 {
98 compatible = "atmel,at91sam9x5-can";
99 reg = <0xf000c000 0x300>;
5e8b3bc3 100 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_can0_rx_tx>;
103 status = "disabled";
104 };
105
106 tcb0: timer@f0010000 {
107 compatible = "atmel,at91sam9x5-tcb";
108 reg = <0xf0010000 0x100>;
5e8b3bc3 109 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 110 };
111
112 i2c0: i2c@f0014000 {
113 compatible = "atmel,at91sam9x5-i2c";
114 reg = <0xf0014000 0x4000>;
5e8b3bc3 115 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 116 dmas = <&dma0 2 7>,
117 <&dma0 2 8>;
118 dma-names = "tx", "rx";
655ff266
LD		 119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_i2c0>;
121 #address-cells = <1>;
122 #size-cells = <0>;
123 status = "disabled";
124 };
125
126 i2c1: i2c@f0018000 {
127 compatible = "atmel,at91sam9x5-i2c";
128 reg = <0xf0018000 0x4000>;
5e8b3bc3 129 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 130 dmas = <&dma0 2 9>,
131 <&dma0 2 10>;
132 dma-names = "tx", "rx";
655ff266
LD		 133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_i2c1>;
135 #address-cells = <1>;
136 #size-cells = <0>;
137 status = "disabled";
138 };
139
140 usart0: serial@f001c000 {
141 compatible = "atmel,at91sam9260-usart";
142 reg = <0xf001c000 0x100>;
5e8b3bc3 143 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_usart0>;
146 status = "disabled";
147 };
148
149 usart1: serial@f0020000 {
150 compatible = "atmel,at91sam9260-usart";
151 reg = <0xf0020000 0x100>;
5e8b3bc3 152 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_usart1>;
155 status = "disabled";
156 };
157
158 macb0: ethernet@f0028000 {
5ade7e42 159 compatible = "cdns,pc302-gem", "cdns,gem";
655ff266 160 reg = <0xf0028000 0x100>;
5e8b3bc3 161 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
164 status = "disabled";
165 };
166
167 isi: isi@f0034000 {
168 compatible = "atmel,at91sam9g45-isi";
169 reg = <0xf0034000 0x4000>;
5e8b3bc3 170 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 171 status = "disabled";
172 };
173
174 mmc1: mmc@f8000000 {
175 compatible = "atmel,hsmci";
176 reg = <0xf8000000 0x600>;
5e8b3bc3 177 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 178 dmas = <&dma1 2 0>;
179 dma-names = "rxtx";
655ff266
LD		 180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
182 status = "disabled";
183 #address-cells = <1>;
184 #size-cells = <0>;
185 };
186
187 mmc2: mmc@f8004000 {
188 compatible = "atmel,hsmci";
189 reg = <0xf8004000 0x600>;
5e8b3bc3 190 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 191 dmas = <&dma1 2 1>;
192 dma-names = "rxtx";
655ff266
LD		 193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
195 status = "disabled";
196 #address-cells = <1>;
197 #size-cells = <0>;
198 };
199
200 spi1: spi@f8008000 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "atmel,at91sam9x5-spi";
204 reg = <0xf8008000 0x100>;
5e8b3bc3 205 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_spi1>;
208 status = "disabled";
209 };
210
211 ssc1: ssc@f800c000 {
212 compatible = "atmel,at91sam9g45-ssc";
213 reg = <0xf800c000 0x4000>;
5e8b3bc3 214 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
655ff266
LD		 215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
217 status = "disabled";
218 };
219
220 can1: can@f8010000 {
221 compatible = "atmel,at91sam9x5-can";
222 reg = <0xf8010000 0x300>;
5e8b3bc3 223 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_can1_rx_tx>;
226 };
227
228 tcb1: timer@f8014000 {
229 compatible = "atmel,at91sam9x5-tcb";
230 reg = <0xf8014000 0x100>;
5e8b3bc3 231 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 232 };
233
234 adc0: adc@f8018000 {
235 compatible = "atmel,at91sam9260-adc";
236 reg = <0xf8018000 0x100>;
5e8b3bc3 237 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 238 pinctrl-names = "default";
239 pinctrl-0 = <
240 &pinctrl_adc0_adtrg
241 &pinctrl_adc0_ad0
242 &pinctrl_adc0_ad1
243 &pinctrl_adc0_ad2
244 &pinctrl_adc0_ad3
245 &pinctrl_adc0_ad4
246 &pinctrl_adc0_ad5
247 &pinctrl_adc0_ad6
248 &pinctrl_adc0_ad7
249 &pinctrl_adc0_ad8
250 &pinctrl_adc0_ad9
251 &pinctrl_adc0_ad10
252 &pinctrl_adc0_ad11
253 >;
254 atmel,adc-channel-base = <0x50>;
255 atmel,adc-channels-used = <0xfff>;
256 atmel,adc-drdy-mask = <0x1000000>;
257 atmel,adc-num-channels = <12>;
258 atmel,adc-startup-time = <40>;
259 atmel,adc-status-register = <0x30>;
260 atmel,adc-trigger-register = <0xc0>;
261 atmel,adc-use-external;
262 atmel,adc-vref = <3000>;
263 atmel,adc-res = <10 12>;
264 atmel,adc-res-names = "lowres", "highres";
265 status = "disabled";
266
267 trigger@0 {
268 trigger-name = "external-rising";
269 trigger-value = <0x1>;
270 trigger-external;
271 };
272 trigger@1 {
273 trigger-name = "external-falling";
274 trigger-value = <0x2>;
275 trigger-external;
276 };
277 trigger@2 {
278 trigger-name = "external-any";
279 trigger-value = <0x3>;
280 trigger-external;
281 };
282 trigger@3 {
283 trigger-name = "continuous";
284 trigger-value = <0x6>;
285 };
286 };
287
288 tsadcc: tsadcc@f8018000 {
289 compatible = "atmel,at91sam9x5-tsadcc";
290 reg = <0xf8018000 0x4000>;
5e8b3bc3 291 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 292 atmel,tsadcc_clock = <300000>;
293 atmel,filtering_average = <0x03>;
294 atmel,pendet_debounce = <0x08>;
295 atmel,pendet_sensitivity = <0x02>;
296 atmel,ts_sample_hold_time = <0x0a>;
297 status = "disabled";
298 };
299
300 i2c2: i2c@f801c000 {
301 compatible = "atmel,at91sam9x5-i2c";
302 reg = <0xf801c000 0x4000>;
5e8b3bc3 303 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 304 dmas = <&dma1 2 11>,
305 <&dma1 2 12>;
306 dma-names = "tx", "rx";
655ff266
LD		 307 #address-cells = <1>;
308 #size-cells = <0>;
309 status = "disabled";
310 };
311
312 usart2: serial@f8020000 {
313 compatible = "atmel,at91sam9260-usart";
314 reg = <0xf8020000 0x100>;
5e8b3bc3 315 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_usart2>;
318 status = "disabled";
319 };
320
321 usart3: serial@f8024000 {
322 compatible = "atmel,at91sam9260-usart";
323 reg = <0xf8024000 0x100>;
5e8b3bc3 324 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_usart3>;
327 status = "disabled";
328 };
329
330 macb1: ethernet@f802c000 {
331 compatible = "cdns,at32ap7000-macb", "cdns,macb";
332 reg = <0xf802c000 0x100>;
5e8b3bc3 333 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 334 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_macb1_rmii>;
336 status = "disabled";
337 };
338
339 sha@f8034000 {
340 compatible = "atmel,sam9g46-sha";
341 reg = <0xf8034000 0x100>;
5e8b3bc3 342 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 343 };
344
345 aes@f8038000 {
346 compatible = "atmel,sam9g46-aes";
347 reg = <0xf8038000 0x100>;
348 interrupts = <43 4 0>;
349 };
350
351 tdes@f803c000 {
352 compatible = "atmel,sam9g46-tdes";
353 reg = <0xf803c000 0x100>;
5e8b3bc3 354 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 355 };
356
357 dma0: dma-controller@ffffe600 {
358 compatible = "atmel,at91sam9g45-dma";
359 reg = <0xffffe600 0x200>;
5e8b3bc3 360 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 361 #dma-cells = <2>;
655ff266
LD		 362 };
363
364 dma1: dma-controller@ffffe800 {
365 compatible = "atmel,at91sam9g45-dma";
366 reg = <0xffffe800 0x200>;
5e8b3bc3 367 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 368 #dma-cells = <2>;
655ff266
LD		 369 };
370
371 ramc0: ramc@ffffea00 {
372 compatible = "atmel,at91sam9g45-ddramc";
373 reg = <0xffffea00 0x200>;
374 };
375
376 dbgu: serial@ffffee00 {
377 compatible = "atmel,at91sam9260-usart";
378 reg = <0xffffee00 0x200>;
5e8b3bc3 379 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
655ff266
LD		 380 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_dbgu>;
382 status = "disabled";
383 };
384
385 aic: interrupt-controller@fffff000 {
386 #interrupt-cells = <3>;
387 compatible = "atmel,sama5d3-aic";
388 interrupt-controller;
389 reg = <0xfffff000 0x200>;
390 atmel,external-irqs = <47>;
391 };
392
393 pinctrl@fffff200 {
394 #address-cells = <1>;
395 #size-cells = <1>;
396 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
397 ranges = <0xfffff200 0xfffff200 0xa00>;
398 atmel,mux-mask = <
399 /* A B C */
400 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
401 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
402 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
403 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
404 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
405 >;
406
407 /* shared pinctrl settings */
408 adc0 {
409 pinctrl_adc0_adtrg: adc0_adtrg {
410 atmel,pins =
c9d0f317 411 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
655ff266
LD		 412 };
413 pinctrl_adc0_ad0: adc0_ad0 {
414 atmel,pins =
c9d0f317 415 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
655ff266
LD		 416 };
417 pinctrl_adc0_ad1: adc0_ad1 {
418 atmel,pins =
c9d0f317 419 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
655ff266
LD		 420 };
421 pinctrl_adc0_ad2: adc0_ad2 {
422 atmel,pins =
c9d0f317 423 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
655ff266
LD		 424 };
425 pinctrl_adc0_ad3: adc0_ad3 {
426 atmel,pins =
c9d0f317 427 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
655ff266
LD		 428 };
429 pinctrl_adc0_ad4: adc0_ad4 {
430 atmel,pins =
c9d0f317 431 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
655ff266
LD		 432 };
433 pinctrl_adc0_ad5: adc0_ad5 {
434 atmel,pins =
c9d0f317 435 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
655ff266
LD		 436 };
437 pinctrl_adc0_ad6: adc0_ad6 {
438 atmel,pins =
c9d0f317 439 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
655ff266
LD		 440 };
441 pinctrl_adc0_ad7: adc0_ad7 {
442 atmel,pins =
c9d0f317 443 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
655ff266
LD		 444 };
445 pinctrl_adc0_ad8: adc0_ad8 {
446 atmel,pins =
c9d0f317 447 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
655ff266
LD		 448 };
449 pinctrl_adc0_ad9: adc0_ad9 {
450 atmel,pins =
c9d0f317 451 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
655ff266
LD		 452 };
453 pinctrl_adc0_ad10: adc0_ad10 {
454 atmel,pins =
c9d0f317 455 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
655ff266
LD		 456 };
457 pinctrl_adc0_ad11: adc0_ad11 {
458 atmel,pins =
c9d0f317 459 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
655ff266
LD		 460 };
461 };
462
463 can0 {
464 pinctrl_can0_rx_tx: can0_rx_tx {
465 atmel,pins =
c9d0f317
JCPV		 466 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
467 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
655ff266
LD		 468 };
469 };
470
471 can1 {
472 pinctrl_can1_rx_tx: can1_rx_tx {
473 atmel,pins =
c9d0f317
JCPV		 474 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
475 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
655ff266
LD		 476 };
477 };
478
479 dbgu {
480 pinctrl_dbgu: dbgu-0 {
481 atmel,pins =
c9d0f317
JCPV		 482 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
483 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
655ff266
LD		 484 };
485 };
486
487 i2c0 {
488 pinctrl_i2c0: i2c0-0 {
489 atmel,pins =
c9d0f317
JCPV		 490 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
491 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
655ff266
LD		 492 };
493 };
494
495 i2c1 {
496 pinctrl_i2c1: i2c1-0 {
497 atmel,pins =
c9d0f317
JCPV		 498 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
499 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
655ff266
LD		 500 };
501 };
502
503 isi {
504 pinctrl_isi: isi-0 {
505 atmel,pins =
c9d0f317
JCPV		 506 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
507 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
508 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
509 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
510 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
511 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
512 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
513 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
514 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
515 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
516 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
517 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
518 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
655ff266
LD		 519 };
520 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
521 atmel,pins =
c9d0f317 522 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
655ff266
LD		 523 };
524 };
525
526 lcd {
527 pinctrl_lcd: lcd-0 {
528 atmel,pins =
c9d0f317
JCPV		 529 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
530 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
531 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
532 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
533 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
534 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
535 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
536 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
537 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
538 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
539 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
540 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
541 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
542 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
543 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
544 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
545 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
546 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
547 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
548 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
549 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
550 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
551 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
552 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
553 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
554 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
555 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
556 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
557 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
558 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
655ff266
LD		 559 };
560 };
561
562 macb0 {
563 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
564 atmel,pins =
c9d0f317
JCPV		 565 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
566 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
567 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
568 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
569 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
570 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
571 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
572 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
655ff266
LD		 573 };
574 pinctrl_macb0_data_gmii: macb0_data_gmii {
575 atmel,pins =
c9d0f317
JCPV		 576 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
577 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
578 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
579 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
580 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
581 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
582 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
583 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
655ff266
LD		 584 };
585 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
586 atmel,pins =
c9d0f317
JCPV		 587 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
588 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
589 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
590 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
591 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
592 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
593 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
655ff266
LD		 594 };
595 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
596 atmel,pins =
c9d0f317
JCPV		 597 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
598 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
599 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
600 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
601 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
602 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
603 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
604 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
605 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
606 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
655ff266
LD		 607 };
608
609 };
610
611 macb1 {
612 pinctrl_macb1_rmii: macb1_rmii-0 {
613 atmel,pins =
c9d0f317
JCPV		 614 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
615 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
616 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
617 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
618 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
619 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
620 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
621 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
622 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
623 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
655ff266
LD		 624 };
625 };
626
627 mmc0 {
628 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
629 atmel,pins =
c9d0f317
JCPV		 630 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
631 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
632 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
655ff266
LD		 633 };
634 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
635 atmel,pins =
c9d0f317
JCPV		 636 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
637 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
638 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
655ff266
LD		 639 };
640 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
641 atmel,pins =
c9d0f317
JCPV		 642 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
643 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
644 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
645 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
655ff266
LD		 646 };
647 };
648
649 mmc1 {
650 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
651 atmel,pins =
c9d0f317
JCPV		 652 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
653 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
654 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
655ff266
LD		 655 };
656 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
657 atmel,pins =
c9d0f317
JCPV		 658 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
659 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
660 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
655ff266
LD		 661 };
662 };
663
664 mmc2 {
665 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
666 atmel,pins =
c9d0f317
JCPV		 667 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
668 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
669 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
655ff266
LD		 670 };
671 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
672 atmel,pins =
c9d0f317
JCPV		 673 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
674 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
675 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
655ff266
LD		 676 };
677 };
678
679 nand0 {
680 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
681 atmel,pins =
c9d0f317
JCPV		 682 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
683 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
655ff266
LD		 684 };
685 };
686
655ff266
LD		 687 spi0 {
688 pinctrl_spi0: spi0-0 {
689 atmel,pins =
c9d0f317
JCPV		 690 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
691 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
692 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
655ff266
LD		 693 };
694 };
695
696 spi1 {
697 pinctrl_spi1: spi1-0 {
698 atmel,pins =
c9d0f317
JCPV		 699 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
700 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
701 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
655ff266
LD		 702 };
703 };
704
705 ssc0 {
706 pinctrl_ssc0_tx: ssc0_tx {
707 atmel,pins =
c9d0f317
JCPV		 708 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
709 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
710 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
655ff266
LD		 711 };
712
713 pinctrl_ssc0_rx: ssc0_rx {
714 atmel,pins =
c9d0f317
JCPV		 715 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
716 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
717 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
655ff266
LD		 718 };
719 };
720
721 ssc1 {
722 pinctrl_ssc1_tx: ssc1_tx {
723 atmel,pins =
c9d0f317
JCPV		 724 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
725 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
726 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
655ff266
LD		 727 };
728
729 pinctrl_ssc1_rx: ssc1_rx {
730 atmel,pins =
c9d0f317
JCPV		 731 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
732 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
733 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
655ff266
LD		 734 };
735 };
736
737 uart0 {
738 pinctrl_uart0: uart0-0 {
739 atmel,pins =
c9d0f317
JCPV		 740 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
741 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
655ff266
LD		 742 };
743 };
744
745 uart1 {
746 pinctrl_uart1: uart1-0 {
747 atmel,pins =
c9d0f317
JCPV		 748 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
749 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
655ff266
LD		 750 };
751 };
752
753 usart0 {
754 pinctrl_usart0: usart0-0 {
755 atmel,pins =
c9d0f317
JCPV		 756 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
757 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
655ff266
LD		 758 };
759
760 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
761 atmel,pins =
c9d0f317
JCPV		 762 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
763 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
655ff266
LD		 764 };
765 };
766
767 usart1 {
768 pinctrl_usart1: usart1-0 {
769 atmel,pins =
c9d0f317
JCPV		 770 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
771 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
655ff266
LD		 772 };
773
774 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
775 atmel,pins =
c9d0f317
JCPV		 776 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
777 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
655ff266
LD		 778 };
779 };
780
781 usart2 {
782 pinctrl_usart2: usart2-0 {
783 atmel,pins =
c9d0f317
JCPV		 784 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
785 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
655ff266
LD		 786 };
787
788 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
789 atmel,pins =
c9d0f317
JCPV		 790 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
791 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
655ff266
LD		 792 };
793 };
794
795 usart3 {
796 pinctrl_usart3: usart3-0 {
797 atmel,pins =
c9d0f317
JCPV		 798 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
799 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
655ff266
LD		 800 };
801
802 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
803 atmel,pins =
c9d0f317
JCPV		 804 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
805 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
655ff266
LD		 806 };
807 };
c9d0f317
JCPV		 808
809
810 pioA: gpio@fffff200 {
811 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
812 reg = <0xfffff200 0x100>;
5e8b3bc3 813 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 814 #gpio-cells = <2>;
815 gpio-controller;
816 interrupt-controller;
817 #interrupt-cells = <2>;
818 };
819
820 pioB: gpio@fffff400 {
821 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
822 reg = <0xfffff400 0x100>;
5e8b3bc3 823 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 824 #gpio-cells = <2>;
825 gpio-controller;
826 interrupt-controller;
827 #interrupt-cells = <2>;
828 };
829
830 pioC: gpio@fffff600 {
831 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
832 reg = <0xfffff600 0x100>;
5e8b3bc3 833 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 834 #gpio-cells = <2>;
835 gpio-controller;
836 interrupt-controller;
837 #interrupt-cells = <2>;
838 };
839
840 pioD: gpio@fffff800 {
841 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
842 reg = <0xfffff800 0x100>;
5e8b3bc3 843 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 844 #gpio-cells = <2>;
845 gpio-controller;
846 interrupt-controller;
847 #interrupt-cells = <2>;
848 };
849
850 pioE: gpio@fffffa00 {
851 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
852 reg = <0xfffffa00 0x100>;
5e8b3bc3 853 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 854 #gpio-cells = <2>;
855 gpio-controller;
856 interrupt-controller;
857 #interrupt-cells = <2>;
858 };
655ff266
LD		 859 };
860
861 pmc: pmc@fffffc00 {
862 compatible = "atmel,at91rm9200-pmc";
863 reg = <0xfffffc00 0x120>;
864 };
865
866 rstc@fffffe00 {
867 compatible = "atmel,at91sam9g45-rstc";
868 reg = <0xfffffe00 0x10>;
869 };
870
871 pit: timer@fffffe30 {
872 compatible = "atmel,at91sam9260-pit";
873 reg = <0xfffffe30 0xf>;
5e8b3bc3 874 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 875 };
876
877 watchdog@fffffe40 {
878 compatible = "atmel,at91sam9260-wdt";
879 reg = <0xfffffe40 0x10>;
880 status = "disabled";
881 };
882
883 rtc@fffffeb0 {
884 compatible = "atmel,at91rm9200-rtc";
885 reg = <0xfffffeb0 0x30>;
5e8b3bc3 886 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
655ff266
LD		 887 };
888 };
889
890 usb0: gadget@00500000 {
891 #address-cells = <1>;
892 #size-cells = <0>;
893 compatible = "atmel,at91sam9rl-udc";
894 reg = <0x00500000 0x100000
895 0xf8030000 0x4000>;
5e8b3bc3 896 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
655ff266
LD		 897 status = "disabled";
898
899 ep0 {
900 reg = <0>;
901 atmel,fifo-size = <64>;
902 atmel,nb-banks = <1>;
903 };
904
905 ep1 {
906 reg = <1>;
907 atmel,fifo-size = <1024>;
908 atmel,nb-banks = <3>;
909 atmel,can-dma;
910 atmel,can-isoc;
911 };
912
913 ep2 {
914 reg = <2>;
915 atmel,fifo-size = <1024>;
916 atmel,nb-banks = <3>;
917 atmel,can-dma;
918 atmel,can-isoc;
919 };
920
921 ep3 {
922 reg = <3>;
923 atmel,fifo-size = <1024>;
924 atmel,nb-banks = <2>;
925 atmel,can-dma;
926 };
927
928 ep4 {
929 reg = <4>;
930 atmel,fifo-size = <1024>;
931 atmel,nb-banks = <2>;
932 atmel,can-dma;
933 };
934
935 ep5 {
936 reg = <5>;
937 atmel,fifo-size = <1024>;
938 atmel,nb-banks = <2>;
939 atmel,can-dma;
940 };
941
942 ep6 {
943 reg = <6>;
944 atmel,fifo-size = <1024>;
945 atmel,nb-banks = <2>;
946 atmel,can-dma;
947 };
948
949 ep7 {
950 reg = <7>;
951 atmel,fifo-size = <1024>;
952 atmel,nb-banks = <2>;
953 atmel,can-dma;
954 };
955
956 ep8 {
957 reg = <8>;
958 atmel,fifo-size = <1024>;
959 atmel,nb-banks = <2>;
960 };
961
962 ep9 {
963 reg = <9>;
964 atmel,fifo-size = <1024>;
965 atmel,nb-banks = <2>;
966 };
967
968 ep10 {
969 reg = <10>;
970 atmel,fifo-size = <1024>;
971 atmel,nb-banks = <2>;
972 };
973
974 ep11 {
975 reg = <11>;
976 atmel,fifo-size = <1024>;
977 atmel,nb-banks = <2>;
978 };
979
980 ep12 {
981 reg = <12>;
982 atmel,fifo-size = <1024>;
983 atmel,nb-banks = <2>;
984 };
985
986 ep13 {
987 reg = <13>;
988 atmel,fifo-size = <1024>;
989 atmel,nb-banks = <2>;
990 };
991
992 ep14 {
993 reg = <14>;
994 atmel,fifo-size = <1024>;
995 atmel,nb-banks = <2>;
996 };
997
998 ep15 {
999 reg = <15>;
1000 atmel,fifo-size = <1024>;
1001 atmel,nb-banks = <2>;
1002 };
1003 };
1004
1005 usb1: ohci@00600000 {
1006 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1007 reg = <0x00600000 0x100000>;
5e8b3bc3 1008 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
655ff266
LD		 1009 status = "disabled";
1010 };
1011
1012 usb2: ehci@00700000 {
1013 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1014 reg = <0x00700000 0x100000>;
5e8b3bc3 1015 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
655ff266
LD		 1016 status = "disabled";
1017 };
1018
1019 nand0: nand@60000000 {
1020 compatible = "atmel,at91rm9200-nand";
1021 #address-cells = <1>;
1022 #size-cells = <1>;
1023 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1024 0xffffc070 0x00000490 /* SMC PMECC regs */
1025 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1026 0x00100000 0x00100000 /* ROM code */
1027 0x70000000 0x10000000 /* NFC Command Registers */
1028 0xffffc000 0x00000070 /* NFC HSMC regs */
1029 0x00200000 0x00100000 /* NFC SRAM banks */
1030 >;
5e8b3bc3 1031 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
655ff266
LD		 1032 atmel,nand-addr-offset = <21>;
1033 atmel,nand-cmd-offset = <22>;
1034 pinctrl-names = "default";
1035 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1036 atmel,pmecc-lookup-table-offset = <0x10000 0x18000>;
1037 status = "disabled";
1038 };
1039 };
1040};
Linux kernel - Deliverables
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