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ARM: at91: dt: add header to define at_hdmac configuration
[deliverable/linux.git] / arch / arm / boot / dts / sama5d3.dtsi
CommitLineData
655ff266
LD		 1/*
2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
4 *
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
6db64d29 11#include "skeleton.dtsi"
c9d0f317 12#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 13#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 14#include <dt-bindings/gpio/gpio.h>
655ff266
LD		 15
16/ {
17 model = "Atmel SAMA5D3 family SoC";
18 compatible = "atmel,sama5d3", "atmel,sama5";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
27 gpio0 = &pioA;
28 gpio1 = &pioB;
29 gpio2 = &pioC;
30 gpio3 = &pioD;
31 gpio4 = &pioE;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
34 i2c0 = &i2c0;
35 i2c1 = &i2c1;
36 i2c2 = &i2c2;
37 ssc0 = &ssc0;
38 ssc1 = &ssc1;
39 };
40 cpus {
41 cpu@0 {
42 compatible = "arm,cortex-a5";
43 };
44 };
45
46 memory {
47 reg = <0x20000000 0x8000000>;
48 };
49
50 ahb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55
56 apb {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <1>;
60 ranges;
61
62 mmc0: mmc@f0000000 {
63 compatible = "atmel,hsmci";
64 reg = <0xf0000000 0x600>;
5e8b3bc3 65 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 66 dmas = <&dma0 2 0>;
67 dma-names = "rxtx";
655ff266
LD		 68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
70 status = "disabled";
71 #address-cells = <1>;
72 #size-cells = <0>;
73 };
74
75 spi0: spi@f0004000 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 compatible = "atmel,at91sam9x5-spi";
79 reg = <0xf0004000 0x100>;
5e8b3bc3 80 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 81 cs-gpios = <&pioD 13 0
82 &pioD 14 0 /* conflicts with SCK0 and CANRX0 */
83 &pioD 15 0 /* conflicts with CTS0 and CANTX0 */
84 &pioD 16 0 /* conflicts with RTS0 and PWMFI3 */
85 >;
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_spi0>;
88 status = "disabled";
89 };
90
91 ssc0: ssc@f0008000 {
92 compatible = "atmel,at91sam9g45-ssc";
93 reg = <0xf0008000 0x4000>;
5e8b3bc3 94 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
655ff266
LD		 95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
97 status = "disabled";
98 };
99
100 can0: can@f000c000 {
101 compatible = "atmel,at91sam9x5-can";
102 reg = <0xf000c000 0x300>;
5e8b3bc3 103 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_can0_rx_tx>;
106 status = "disabled";
107 };
108
109 tcb0: timer@f0010000 {
110 compatible = "atmel,at91sam9x5-tcb";
111 reg = <0xf0010000 0x100>;
5e8b3bc3 112 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 113 };
114
115 i2c0: i2c@f0014000 {
116 compatible = "atmel,at91sam9x5-i2c";
117 reg = <0xf0014000 0x4000>;
5e8b3bc3 118 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 119 dmas = <&dma0 2 7>,
120 <&dma0 2 8>;
121 dma-names = "tx", "rx";
655ff266
LD		 122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_i2c0>;
124 #address-cells = <1>;
125 #size-cells = <0>;
126 status = "disabled";
127 };
128
129 i2c1: i2c@f0018000 {
130 compatible = "atmel,at91sam9x5-i2c";
131 reg = <0xf0018000 0x4000>;
5e8b3bc3 132 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 133 dmas = <&dma0 2 9>,
134 <&dma0 2 10>;
135 dma-names = "tx", "rx";
655ff266
LD		 136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_i2c1>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 status = "disabled";
141 };
142
143 usart0: serial@f001c000 {
144 compatible = "atmel,at91sam9260-usart";
145 reg = <0xf001c000 0x100>;
5e8b3bc3 146 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_usart0>;
149 status = "disabled";
150 };
151
152 usart1: serial@f0020000 {
153 compatible = "atmel,at91sam9260-usart";
154 reg = <0xf0020000 0x100>;
5e8b3bc3 155 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_usart1>;
158 status = "disabled";
159 };
160
161 macb0: ethernet@f0028000 {
162 compatible = "cnds,pc302-gem", "cdns,gem";
163 reg = <0xf0028000 0x100>;
5e8b3bc3 164 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
167 status = "disabled";
168 };
169
170 isi: isi@f0034000 {
171 compatible = "atmel,at91sam9g45-isi";
172 reg = <0xf0034000 0x4000>;
5e8b3bc3 173 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 174 status = "disabled";
175 };
176
177 mmc1: mmc@f8000000 {
178 compatible = "atmel,hsmci";
179 reg = <0xf8000000 0x600>;
5e8b3bc3 180 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 181 dmas = <&dma1 2 0>;
182 dma-names = "rxtx";
655ff266
LD		 183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
185 status = "disabled";
186 #address-cells = <1>;
187 #size-cells = <0>;
188 };
189
190 mmc2: mmc@f8004000 {
191 compatible = "atmel,hsmci";
192 reg = <0xf8004000 0x600>;
5e8b3bc3 193 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 194 dmas = <&dma1 2 1>;
195 dma-names = "rxtx";
655ff266
LD		 196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
198 status = "disabled";
199 #address-cells = <1>;
200 #size-cells = <0>;
201 };
202
203 spi1: spi@f8008000 {
204 #address-cells = <1>;
205 #size-cells = <0>;
206 compatible = "atmel,at91sam9x5-spi";
207 reg = <0xf8008000 0x100>;
5e8b3bc3 208 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 209 cs-gpios = <&pioC 25 0
210 &pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */
211 &pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */
212 &pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */
213 >;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_spi1>;
216 status = "disabled";
217 };
218
219 ssc1: ssc@f800c000 {
220 compatible = "atmel,at91sam9g45-ssc";
221 reg = <0xf800c000 0x4000>;
5e8b3bc3 222 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
655ff266
LD		 223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
225 status = "disabled";
226 };
227
228 can1: can@f8010000 {
229 compatible = "atmel,at91sam9x5-can";
230 reg = <0xf8010000 0x300>;
5e8b3bc3 231 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_can1_rx_tx>;
234 };
235
236 tcb1: timer@f8014000 {
237 compatible = "atmel,at91sam9x5-tcb";
238 reg = <0xf8014000 0x100>;
5e8b3bc3 239 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 240 };
241
242 adc0: adc@f8018000 {
243 compatible = "atmel,at91sam9260-adc";
244 reg = <0xf8018000 0x100>;
5e8b3bc3 245 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 246 pinctrl-names = "default";
247 pinctrl-0 = <
248 &pinctrl_adc0_adtrg
249 &pinctrl_adc0_ad0
250 &pinctrl_adc0_ad1
251 &pinctrl_adc0_ad2
252 &pinctrl_adc0_ad3
253 &pinctrl_adc0_ad4
254 &pinctrl_adc0_ad5
255 &pinctrl_adc0_ad6
256 &pinctrl_adc0_ad7
257 &pinctrl_adc0_ad8
258 &pinctrl_adc0_ad9
259 &pinctrl_adc0_ad10
260 &pinctrl_adc0_ad11
261 >;
262 atmel,adc-channel-base = <0x50>;
263 atmel,adc-channels-used = <0xfff>;
264 atmel,adc-drdy-mask = <0x1000000>;
265 atmel,adc-num-channels = <12>;
266 atmel,adc-startup-time = <40>;
267 atmel,adc-status-register = <0x30>;
268 atmel,adc-trigger-register = <0xc0>;
269 atmel,adc-use-external;
270 atmel,adc-vref = <3000>;
271 atmel,adc-res = <10 12>;
272 atmel,adc-res-names = "lowres", "highres";
273 status = "disabled";
274
275 trigger@0 {
276 trigger-name = "external-rising";
277 trigger-value = <0x1>;
278 trigger-external;
279 };
280 trigger@1 {
281 trigger-name = "external-falling";
282 trigger-value = <0x2>;
283 trigger-external;
284 };
285 trigger@2 {
286 trigger-name = "external-any";
287 trigger-value = <0x3>;
288 trigger-external;
289 };
290 trigger@3 {
291 trigger-name = "continuous";
292 trigger-value = <0x6>;
293 };
294 };
295
296 tsadcc: tsadcc@f8018000 {
297 compatible = "atmel,at91sam9x5-tsadcc";
298 reg = <0xf8018000 0x4000>;
5e8b3bc3 299 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 300 atmel,tsadcc_clock = <300000>;
301 atmel,filtering_average = <0x03>;
302 atmel,pendet_debounce = <0x08>;
303 atmel,pendet_sensitivity = <0x02>;
304 atmel,ts_sample_hold_time = <0x0a>;
305 status = "disabled";
306 };
307
308 i2c2: i2c@f801c000 {
309 compatible = "atmel,at91sam9x5-i2c";
310 reg = <0xf801c000 0x4000>;
5e8b3bc3 311 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 312 dmas = <&dma1 2 11>,
313 <&dma1 2 12>;
314 dma-names = "tx", "rx";
655ff266
LD		 315 #address-cells = <1>;
316 #size-cells = <0>;
317 status = "disabled";
318 };
319
320 usart2: serial@f8020000 {
321 compatible = "atmel,at91sam9260-usart";
322 reg = <0xf8020000 0x100>;
5e8b3bc3 323 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_usart2>;
326 status = "disabled";
327 };
328
329 usart3: serial@f8024000 {
330 compatible = "atmel,at91sam9260-usart";
331 reg = <0xf8024000 0x100>;
5e8b3bc3 332 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_usart3>;
335 status = "disabled";
336 };
337
338 macb1: ethernet@f802c000 {
339 compatible = "cdns,at32ap7000-macb", "cdns,macb";
340 reg = <0xf802c000 0x100>;
5e8b3bc3 341 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
655ff266
LD		 342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_macb1_rmii>;
344 status = "disabled";
345 };
346
347 sha@f8034000 {
348 compatible = "atmel,sam9g46-sha";
349 reg = <0xf8034000 0x100>;
5e8b3bc3 350 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 351 };
352
353 aes@f8038000 {
354 compatible = "atmel,sam9g46-aes";
355 reg = <0xf8038000 0x100>;
356 interrupts = <43 4 0>;
357 };
358
359 tdes@f803c000 {
360 compatible = "atmel,sam9g46-tdes";
361 reg = <0xf803c000 0x100>;
5e8b3bc3 362 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
655ff266
LD		 363 };
364
365 dma0: dma-controller@ffffe600 {
366 compatible = "atmel,at91sam9g45-dma";
367 reg = <0xffffe600 0x200>;
5e8b3bc3 368 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 369 #dma-cells = <2>;
655ff266
LD		 370 };
371
372 dma1: dma-controller@ffffe800 {
373 compatible = "atmel,at91sam9g45-dma";
374 reg = <0xffffe800 0x200>;
5e8b3bc3 375 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 376 #dma-cells = <2>;
655ff266
LD		 377 };
378
379 ramc0: ramc@ffffea00 {
380 compatible = "atmel,at91sam9g45-ddramc";
381 reg = <0xffffea00 0x200>;
382 };
383
384 dbgu: serial@ffffee00 {
385 compatible = "atmel,at91sam9260-usart";
386 reg = <0xffffee00 0x200>;
5e8b3bc3 387 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
655ff266
LD		 388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_dbgu>;
390 status = "disabled";
391 };
392
393 aic: interrupt-controller@fffff000 {
394 #interrupt-cells = <3>;
395 compatible = "atmel,sama5d3-aic";
396 interrupt-controller;
397 reg = <0xfffff000 0x200>;
398 atmel,external-irqs = <47>;
399 };
400
401 pinctrl@fffff200 {
402 #address-cells = <1>;
403 #size-cells = <1>;
404 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
405 ranges = <0xfffff200 0xfffff200 0xa00>;
406 atmel,mux-mask = <
407 /* A B C */
408 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
409 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
410 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
411 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
412 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
413 >;
414
415 /* shared pinctrl settings */
416 adc0 {
417 pinctrl_adc0_adtrg: adc0_adtrg {
418 atmel,pins =
c9d0f317 419 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
655ff266
LD		 420 };
421 pinctrl_adc0_ad0: adc0_ad0 {
422 atmel,pins =
c9d0f317 423 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
655ff266
LD		 424 };
425 pinctrl_adc0_ad1: adc0_ad1 {
426 atmel,pins =
c9d0f317 427 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
655ff266
LD		 428 };
429 pinctrl_adc0_ad2: adc0_ad2 {
430 atmel,pins =
c9d0f317 431 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
655ff266
LD		 432 };
433 pinctrl_adc0_ad3: adc0_ad3 {
434 atmel,pins =
c9d0f317 435 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
655ff266
LD		 436 };
437 pinctrl_adc0_ad4: adc0_ad4 {
438 atmel,pins =
c9d0f317 439 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
655ff266
LD		 440 };
441 pinctrl_adc0_ad5: adc0_ad5 {
442 atmel,pins =
c9d0f317 443 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
655ff266
LD		 444 };
445 pinctrl_adc0_ad6: adc0_ad6 {
446 atmel,pins =
c9d0f317 447 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
655ff266
LD		 448 };
449 pinctrl_adc0_ad7: adc0_ad7 {
450 atmel,pins =
c9d0f317 451 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
655ff266
LD		 452 };
453 pinctrl_adc0_ad8: adc0_ad8 {
454 atmel,pins =
c9d0f317 455 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
655ff266
LD		 456 };
457 pinctrl_adc0_ad9: adc0_ad9 {
458 atmel,pins =
c9d0f317 459 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
655ff266
LD		 460 };
461 pinctrl_adc0_ad10: adc0_ad10 {
462 atmel,pins =
c9d0f317 463 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
655ff266
LD		 464 };
465 pinctrl_adc0_ad11: adc0_ad11 {
466 atmel,pins =
c9d0f317 467 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
655ff266
LD		 468 };
469 };
470
471 can0 {
472 pinctrl_can0_rx_tx: can0_rx_tx {
473 atmel,pins =
c9d0f317
JCPV		 474 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
475 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
655ff266
LD		 476 };
477 };
478
479 can1 {
480 pinctrl_can1_rx_tx: can1_rx_tx {
481 atmel,pins =
c9d0f317
JCPV		 482 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
483 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
655ff266
LD		 484 };
485 };
486
487 dbgu {
488 pinctrl_dbgu: dbgu-0 {
489 atmel,pins =
c9d0f317
JCPV		 490 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
491 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
655ff266
LD		 492 };
493 };
494
495 i2c0 {
496 pinctrl_i2c0: i2c0-0 {
497 atmel,pins =
c9d0f317
JCPV		 498 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
499 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
655ff266
LD		 500 };
501 };
502
503 i2c1 {
504 pinctrl_i2c1: i2c1-0 {
505 atmel,pins =
c9d0f317
JCPV		 506 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
507 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
655ff266
LD		 508 };
509 };
510
511 isi {
512 pinctrl_isi: isi-0 {
513 atmel,pins =
c9d0f317
JCPV		 514 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
515 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
516 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
517 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
518 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
519 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
520 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
521 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
522 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
523 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
524 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
525 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
526 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
655ff266
LD		 527 };
528 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
529 atmel,pins =
c9d0f317 530 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
655ff266
LD		 531 };
532 };
533
534 lcd {
535 pinctrl_lcd: lcd-0 {
536 atmel,pins =
c9d0f317
JCPV		 537 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
538 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
539 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
540 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
541 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
542 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
543 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
544 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
545 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
546 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
547 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
548 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
549 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
550 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
551 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
552 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
553 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
554 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
555 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
556 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
557 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
558 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
559 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
560 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
561 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
562 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
563 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
564 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
565 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
566 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
655ff266
LD		 567 };
568 };
569
570 macb0 {
571 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
572 atmel,pins =
c9d0f317
JCPV		 573 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
574 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
575 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
576 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
577 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
578 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
579 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
580 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
655ff266
LD		 581 };
582 pinctrl_macb0_data_gmii: macb0_data_gmii {
583 atmel,pins =
c9d0f317
JCPV		 584 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
585 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
586 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
587 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
588 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
589 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
590 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
591 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
655ff266
LD		 592 };
593 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
594 atmel,pins =
c9d0f317
JCPV		 595 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
596 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
597 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
598 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
599 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
600 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
601 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
655ff266
LD		 602 };
603 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
604 atmel,pins =
c9d0f317
JCPV		 605 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
606 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
607 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
608 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
609 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
610 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
611 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
612 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
613 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
614 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
655ff266
LD		 615 };
616
617 };
618
619 macb1 {
620 pinctrl_macb1_rmii: macb1_rmii-0 {
621 atmel,pins =
c9d0f317
JCPV		 622 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
623 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
624 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
625 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
626 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
627 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
628 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
629 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
630 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
631 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
655ff266
LD		 632 };
633 };
634
635 mmc0 {
636 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
637 atmel,pins =
c9d0f317
JCPV		 638 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
639 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
640 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
655ff266
LD		 641 };
642 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
643 atmel,pins =
c9d0f317
JCPV		 644 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
645 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
646 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
655ff266
LD		 647 };
648 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
649 atmel,pins =
c9d0f317
JCPV		 650 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
651 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
652 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
653 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
655ff266
LD		 654 };
655 };
656
657 mmc1 {
658 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
659 atmel,pins =
c9d0f317
JCPV		 660 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
661 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
662 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
655ff266
LD		 663 };
664 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
665 atmel,pins =
c9d0f317
JCPV		 666 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
667 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
668 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
655ff266
LD		 669 };
670 };
671
672 mmc2 {
673 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
674 atmel,pins =
c9d0f317
JCPV		 675 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
676 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
677 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
655ff266
LD		 678 };
679 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
680 atmel,pins =
c9d0f317
JCPV		 681 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
682 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
683 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
655ff266
LD		 684 };
685 };
686
687 nand0 {
688 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
689 atmel,pins =
c9d0f317
JCPV		 690 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
691 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
655ff266
LD		 692 };
693 };
694
655ff266
LD		 695 spi0 {
696 pinctrl_spi0: spi0-0 {
697 atmel,pins =
c9d0f317
JCPV		 698 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
699 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
700 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
655ff266
LD		 701 };
702 };
703
704 spi1 {
705 pinctrl_spi1: spi1-0 {
706 atmel,pins =
c9d0f317
JCPV		 707 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
708 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
709 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
655ff266
LD		 710 };
711 };
712
713 ssc0 {
714 pinctrl_ssc0_tx: ssc0_tx {
715 atmel,pins =
c9d0f317
JCPV		 716 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
717 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
718 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
655ff266
LD		 719 };
720
721 pinctrl_ssc0_rx: ssc0_rx {
722 atmel,pins =
c9d0f317
JCPV		 723 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
724 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
725 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
655ff266
LD		 726 };
727 };
728
729 ssc1 {
730 pinctrl_ssc1_tx: ssc1_tx {
731 atmel,pins =
c9d0f317
JCPV		 732 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
733 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
734 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
655ff266
LD		 735 };
736
737 pinctrl_ssc1_rx: ssc1_rx {
738 atmel,pins =
c9d0f317
JCPV		 739 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
740 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
741 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
655ff266
LD		 742 };
743 };
744
745 uart0 {
746 pinctrl_uart0: uart0-0 {
747 atmel,pins =
c9d0f317
JCPV		 748 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
749 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
655ff266
LD		 750 };
751 };
752
753 uart1 {
754 pinctrl_uart1: uart1-0 {
755 atmel,pins =
c9d0f317
JCPV		 756 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
757 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
655ff266
LD		 758 };
759 };
760
761 usart0 {
762 pinctrl_usart0: usart0-0 {
763 atmel,pins =
c9d0f317
JCPV		 764 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
765 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
655ff266
LD		 766 };
767
768 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
769 atmel,pins =
c9d0f317
JCPV		 770 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
771 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
655ff266
LD		 772 };
773 };
774
775 usart1 {
776 pinctrl_usart1: usart1-0 {
777 atmel,pins =
c9d0f317
JCPV		 778 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
779 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
655ff266
LD		 780 };
781
782 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
783 atmel,pins =
c9d0f317
JCPV		 784 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
785 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
655ff266
LD		 786 };
787 };
788
789 usart2 {
790 pinctrl_usart2: usart2-0 {
791 atmel,pins =
c9d0f317
JCPV		 792 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
793 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
655ff266
LD		 794 };
795
796 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
797 atmel,pins =
c9d0f317
JCPV		 798 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
799 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
655ff266
LD		 800 };
801 };
802
803 usart3 {
804 pinctrl_usart3: usart3-0 {
805 atmel,pins =
c9d0f317
JCPV		 806 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
807 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
655ff266
LD		 808 };
809
810 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
811 atmel,pins =
c9d0f317
JCPV		 812 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
813 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
655ff266
LD		 814 };
815 };
c9d0f317
JCPV		 816
817
818 pioA: gpio@fffff200 {
819 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
820 reg = <0xfffff200 0x100>;
5e8b3bc3 821 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 822 #gpio-cells = <2>;
823 gpio-controller;
824 interrupt-controller;
825 #interrupt-cells = <2>;
826 };
827
828 pioB: gpio@fffff400 {
829 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
830 reg = <0xfffff400 0x100>;
5e8b3bc3 831 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 832 #gpio-cells = <2>;
833 gpio-controller;
834 interrupt-controller;
835 #interrupt-cells = <2>;
836 };
837
838 pioC: gpio@fffff600 {
839 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
840 reg = <0xfffff600 0x100>;
5e8b3bc3 841 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 842 #gpio-cells = <2>;
843 gpio-controller;
844 interrupt-controller;
845 #interrupt-cells = <2>;
846 };
847
848 pioD: gpio@fffff800 {
849 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
850 reg = <0xfffff800 0x100>;
5e8b3bc3 851 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 852 #gpio-cells = <2>;
853 gpio-controller;
854 interrupt-controller;
855 #interrupt-cells = <2>;
856 };
857
858 pioE: gpio@fffffa00 {
859 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
860 reg = <0xfffffa00 0x100>;
5e8b3bc3 861 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
c9d0f317
JCPV		 862 #gpio-cells = <2>;
863 gpio-controller;
864 interrupt-controller;
865 #interrupt-cells = <2>;
866 };
655ff266
LD		 867 };
868
869 pmc: pmc@fffffc00 {
870 compatible = "atmel,at91rm9200-pmc";
871 reg = <0xfffffc00 0x120>;
872 };
873
874 rstc@fffffe00 {
875 compatible = "atmel,at91sam9g45-rstc";
876 reg = <0xfffffe00 0x10>;
877 };
878
879 pit: timer@fffffe30 {
880 compatible = "atmel,at91sam9260-pit";
881 reg = <0xfffffe30 0xf>;
5e8b3bc3 882 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
655ff266
LD		 883 };
884
885 watchdog@fffffe40 {
886 compatible = "atmel,at91sam9260-wdt";
887 reg = <0xfffffe40 0x10>;
888 status = "disabled";
889 };
890
891 rtc@fffffeb0 {
892 compatible = "atmel,at91rm9200-rtc";
893 reg = <0xfffffeb0 0x30>;
5e8b3bc3 894 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
655ff266
LD		 895 };
896 };
897
898 usb0: gadget@00500000 {
899 #address-cells = <1>;
900 #size-cells = <0>;
901 compatible = "atmel,at91sam9rl-udc";
902 reg = <0x00500000 0x100000
903 0xf8030000 0x4000>;
5e8b3bc3 904 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
655ff266
LD		 905 status = "disabled";
906
907 ep0 {
908 reg = <0>;
909 atmel,fifo-size = <64>;
910 atmel,nb-banks = <1>;
911 };
912
913 ep1 {
914 reg = <1>;
915 atmel,fifo-size = <1024>;
916 atmel,nb-banks = <3>;
917 atmel,can-dma;
918 atmel,can-isoc;
919 };
920
921 ep2 {
922 reg = <2>;
923 atmel,fifo-size = <1024>;
924 atmel,nb-banks = <3>;
925 atmel,can-dma;
926 atmel,can-isoc;
927 };
928
929 ep3 {
930 reg = <3>;
931 atmel,fifo-size = <1024>;
932 atmel,nb-banks = <2>;
933 atmel,can-dma;
934 };
935
936 ep4 {
937 reg = <4>;
938 atmel,fifo-size = <1024>;
939 atmel,nb-banks = <2>;
940 atmel,can-dma;
941 };
942
943 ep5 {
944 reg = <5>;
945 atmel,fifo-size = <1024>;
946 atmel,nb-banks = <2>;
947 atmel,can-dma;
948 };
949
950 ep6 {
951 reg = <6>;
952 atmel,fifo-size = <1024>;
953 atmel,nb-banks = <2>;
954 atmel,can-dma;
955 };
956
957 ep7 {
958 reg = <7>;
959 atmel,fifo-size = <1024>;
960 atmel,nb-banks = <2>;
961 atmel,can-dma;
962 };
963
964 ep8 {
965 reg = <8>;
966 atmel,fifo-size = <1024>;
967 atmel,nb-banks = <2>;
968 };
969
970 ep9 {
971 reg = <9>;
972 atmel,fifo-size = <1024>;
973 atmel,nb-banks = <2>;
974 };
975
976 ep10 {
977 reg = <10>;
978 atmel,fifo-size = <1024>;
979 atmel,nb-banks = <2>;
980 };
981
982 ep11 {
983 reg = <11>;
984 atmel,fifo-size = <1024>;
985 atmel,nb-banks = <2>;
986 };
987
988 ep12 {
989 reg = <12>;
990 atmel,fifo-size = <1024>;
991 atmel,nb-banks = <2>;
992 };
993
994 ep13 {
995 reg = <13>;
996 atmel,fifo-size = <1024>;
997 atmel,nb-banks = <2>;
998 };
999
1000 ep14 {
1001 reg = <14>;
1002 atmel,fifo-size = <1024>;
1003 atmel,nb-banks = <2>;
1004 };
1005
1006 ep15 {
1007 reg = <15>;
1008 atmel,fifo-size = <1024>;
1009 atmel,nb-banks = <2>;
1010 };
1011 };
1012
1013 usb1: ohci@00600000 {
1014 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1015 reg = <0x00600000 0x100000>;
5e8b3bc3 1016 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
655ff266
LD		 1017 status = "disabled";
1018 };
1019
1020 usb2: ehci@00700000 {
1021 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1022 reg = <0x00700000 0x100000>;
5e8b3bc3 1023 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
655ff266
LD		 1024 status = "disabled";
1025 };
1026
1027 nand0: nand@60000000 {
1028 compatible = "atmel,at91rm9200-nand";
1029 #address-cells = <1>;
1030 #size-cells = <1>;
1031 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1032 0xffffc070 0x00000490 /* SMC PMECC regs */
1033 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1034 0x00100000 0x00100000 /* ROM code */
1035 0x70000000 0x10000000 /* NFC Command Registers */
1036 0xffffc000 0x00000070 /* NFC HSMC regs */
1037 0x00200000 0x00100000 /* NFC SRAM banks */
1038 >;
5e8b3bc3 1039 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
655ff266
LD		 1040 atmel,nand-addr-offset = <21>;
1041 atmel,nand-cmd-offset = <22>;
1042 pinctrl-names = "default";
1043 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1044 atmel,pmecc-lookup-table-offset = <0x10000 0x18000>;
1045 status = "disabled";
1046 };
1047 };
1048};
Linux kernel - Deliverables
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